CN103490656B - Carrier Modulation Method Based on H-Bridge Four-level Inverter Topology - Google Patents

Abstract

Based on the carrier modulating method of four electrical level inverter topological structures of H bridge, relate to the carrier modulating method of four electrical level inverter topological structures based on H bridge and topological structure.Solve existing inverter topology because number of devices is many and the carrier modulating method of four electrical level inverter topological structures complicated, cause the problem that structural stability is low.This topological structure comprises DC side, switch combination circuit and inverter side, and DC side is connected by switch combination circuit with inverter side.The carrier modulating method of this topological structure is: first that three frequencies is the identical and triangular wave carrier that amplitude is equal compares with a baseline sinusoidal wave respectively, obtains three pulse signal A ₁, B ₁and C ₁; Then baseline sinusoidal wave is direct and no-voltage compares and obtains pulse signal D ₁; Finally by pulse signal A ₁, B ₁, C ₁and D ₁calculate acquisition eight pulse signals by gate, these eight pulse signals control conducting and the disconnection of eight switching tubes respectively.The present invention is applicable to the high-power field of mesohigh.

Description

Carrier Modulation Method Based on H-Bridge Four-level Inverter Topology

technical field

The invention relates to an H-bridge-based four-level inverter topology and a carrier modulation method based on the H-bridge-based four-level inverter topology.

Background technique

Compared with the two-level inverter, the multi-level inverter has low device voltage stress, output voltage closer to sine wave, low voltage total harmonic distortion (THD), low switching loss of the device, high power transmission efficiency, and system electromagnetic Due to the advantages of low electromagnetic interference (EMI), etc., the multilevel power converter has become a research hotspot in the field of medium and high voltage high power applications. There are three basic multi-level topologies: H-bridge cascade type, diode clamp type, and flying capacitor type. Each module of the H-bridge cascaded type has an independent DC power supply, the system cost is high, the volume is large and the design is difficult; in the flying capacitor topology, each phase bridge arm needs to be connected to a capacitor, and the switching loss is large ; Among them, the diode-clamped (neutralpoint clamped, NPC) multilevel inverter is widely used because of its simple structure and no need for complex transformers. It divides the high voltage on the DC side into a series of lower level voltages through series diodes, and uses low voltage devices to achieve high level output. At present, the commonly used single-phase multi-level inverters are mainly single-phase neutral-point clamped voltage source three-level inverters, as shown in Figure 4, which consists of a three-level bridge arm and a two-level The bridge arms are combined, and the three-level output is realized by diode clamping. The single-phase five-level and single-phase seven-level proposed later are all realized by increasing the number of clamping diodes and capacitors on this basis, as shown in Figure 5. The schematic diagram of the diode-clamped five-level inverter topology is shown in Fig. In addition, a large number of components reduces the reliability of the inverter, thereby limiting the application of multilevel inverter technology.

Contents of the invention

In order to solve the problem of low structural stability of the existing inverter topology due to the large number of devices and the complexity of the carrier modulation method of the four-level inverter topology, the present invention proposes a four-level inverter based on an H bridge Carrier modulation method for converter topology.

The carrier modulation method based on the H-bridge four-level inverter topology is implemented based on the following H-bridge-based four-level inverter topology:

The H-bridge-based four-level inverter topology includes a DC side, a switch combination circuit and an inverter side, and the DC side includes a DC power supply E, a No. No. 1 voltage divider capacitor C3, No. 1 voltage divider capacitor C1, No. 2 voltage divider capacitor C2 and No. 3 voltage divider capacitor C3 have the same parameters, No. 1 voltage divider capacitor C1, No. 2 voltage divider capacitor C2 and No. 3 voltage divider capacitor C3 After being connected in series, they are connected in parallel at the output end of the DC power supply E. The power supply combination after parallel connection provides DC power supply for the inverter side. The output voltage of the DC power supply E is _Vin , and the inverter side is an H-bridge circuit structure. The switch combination circuit includes The No. 1 switch combination and the No. 2 switch combination, the connection point of the No. 1 voltage dividing capacitor C1 and the No. 2 voltage dividing capacitor C2 pass through the No. 1 switch combination, and the connection point of the No. The number switch combination is connected to a voltage output terminal of the H-bridge on the inverter side,

The carrier modulation method is realized by the following steps:

Step 1. Comparing three triangular wave carriers with the same frequency and equal amplitude with a reference sine wave respectively to obtain three pulse signals A ₁ , B ₁ and C ₁ , the modulation signal frequency of the reference sine wave is 50 Hz, The carrier frequency of the triangular wave is an integer multiple of the modulation signal frequency of the reference sine wave;

Step 2, directly comparing the reference sine wave in step 1 with the zero voltage to obtain the pulse signal D ₁ ;

Step 3: Calculate the pulse signals A ₁ , B ₁ , C ₁ and D ₁ obtained in Step 1 and Step 2 to obtain eight pulse signals through logic gate calculation, and the eight pulse signals respectively control the conduction and switching of the eight switching tubes. disconnect.

Beneficial effects: the inverter topology in the present invention saves the clamping diodes commonly used in the traditional inverter topology, which greatly reduces the number of devices in the topology and reduces the manufacturing cost; at the same time, for the inverter of the present invention The carrier modulation method of the converter topology can be realized by logic gate calculation after comparing three triangular wave carriers with the same frequency and amplitude with a reference sine wave, which is very simple and improves the stability of the topology by more than 5%. .

Description of drawings

Figure 1 is a schematic diagram of the circuit structure of the H-bridge-based four-level inverter topology;

Fig. 2 is the flowchart of the carrier modulation method based on the four-level inverter topology of the H bridge;

3 is a schematic diagram of three triangular wave carriers with the same frequency and equal amplitude, a reference sine wave and four pulse signals described in the second embodiment;

Fig. 4 is a circuit structure schematic diagram of a traditional single-phase three-level inverter topology;

FIG. 5 is a schematic diagram of a circuit structure of a diode-clamped five-level inverter topology.

Detailed ways

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS One, in conjunction with Fig. 1, illustrate this specific implementation, based on the four-level inverter topology of the H-bridge, it includes a DC side, a switch combination circuit and an inverter side, and the DC side includes a DC power supply E, a The parameters of No. 1 voltage dividing capacitor C1, No. 2 voltage dividing capacitor C2 and No. 3 voltage dividing capacitor C3, No. 1 voltage dividing capacitor C1, No. 2 voltage dividing capacitor C2 and No. 3 voltage dividing capacitor C3 are the same, and No. 1 voltage dividing capacitor C1 , No. 2 voltage divider capacitor C2 and No. 3 voltage divider capacitor C3 are sequentially connected in series and then connected in parallel to the output terminal of the DC power supply E. The power combination after parallel connection provides DC power supply for the inverter side, and the output voltage of the DC power supply E is V _in , the inverter side is an H-bridge circuit structure, the switch combination circuit includes the No. 1 switch combination and the No. 2 switch combination, and the connection point of the No. One voltage output end of the bridge is connected, and the connection point of the second voltage dividing capacitor C2 and the third voltage dividing capacitor C3 is connected to the other voltage output end of the H bridge on the inverter side through the second switch combination.

The output voltage of the DC power supply E in this embodiment is V _in , and the models of the No. 1 voltage dividing capacitor C1, the No. 2 voltage dividing capacitor C2 and the No. 3 voltage dividing capacitor C3 are the same, and the voltages on both sides of each voltage dividing capacitor are the same. is V _in /3.

Embodiment 2. This embodiment is described in conjunction with FIG. 1 . The difference between this embodiment and the H-bridge-based four-level inverter topology described in Embodiment 1 is that the switch combination circuit No. 1 The switch combination has the same structure as the No. 2 switch combination, wherein the No. 1 switch combination includes No. 5 switch tube S5, No. 6 switch tube S6, No. 5 diode D5 and No. 6 diode D6,

The negative pole of the No. 5 diode D5 is connected to the collector of the No. 5 switch tube S5 and the connection point between the No. 1 voltage dividing capacitor C1 and the No. 2 voltage dividing capacitor C2 as one end of the No. 1 switch combination. The anode of diode D5 is simultaneously connected to the emitter of No. 5 switch tube S5, the anode of No. 6 diode D6 and the collector of No. 6 switch tube S6, and the cathode of No. 6 diode D6 is used as the other end of the combination of No. 1 switch. The emitter of the No. 6 switch tube S6 is connected to a voltage output terminal of the H-bridge on the inverter side.

Specific Embodiment 3. This specific embodiment is described in conjunction with FIG. 1. The difference between this specific embodiment and the H-bridge-based four-level inverter topology described in Specific Embodiment 2 is that the H-bridge on the inverter side includes No. 1 switch tube S1, No. 2 switch tube S2, No. 3 switch tube S3, No. 4 switch tube S4, No. 1 diode D1, No. 2 diode D2, No. 3 diode D3, No. 4 diode D4, resistor R and inductor L,

One end of the resistor R is simultaneously connected to the emitter of the No. 1 switch tube S1, the anode of the No. 1 diode D1, the collector of the No. 2 switch tube S2, the No. 2 diode D2 and the other end of the combination of the No. 1 switch. The resistor R The other end is connected to one end of the inductor L,

The other end of the inductance L is used as the other voltage output end of the H-bridge on the inverter side to simultaneously connect with the emitter of the third switch S3, the anode of the third diode D3, the collector of the fourth switch S4 and the cathode of the fourth diode D4 connect,

The collector of the No. 1 switch tube S1 is connected to the cathode of the No. 1 diode D1, the collector of the No. 3 switch tube S3, the cathode of the No. 3 diode D3, and the positive pole of the DC power supply E at the same time.

The emitter of the second switching tube S2 is connected to the anode of the second diode D2 , the emitter of the fourth switching tube S4 , the positive pole of the fourth diode D4 and the negative pole of the DC power supply E at the same time.

The DC side of the inverter topology described in the present invention adopts three DC voltage sources connected in series, and the entire topology does not require any clamping diodes, which greatly simplifies the topology of the inverter, reduces the cost, and improves the efficiency of the inverter. reliability of the inverter.

Assuming that the output voltage between the two bridge arms is V ₀ , the output voltage V ₀ has eight levels of ±V _in , ±V _in /3, ±2V _in /3, and ± ₀ . The relationship between opening conditions is:

Specific embodiment four, in conjunction with Fig. 2 and Fig. 3 illustrate this specific embodiment, the carrier modulation method of the four-level inverter topological structure based on H bridge described in specific embodiment three, it is realized by the following steps:

Step 1. Comparing three triangular wave carriers with the same frequency and equal amplitude with a reference sine wave respectively to obtain three pulse signals A ₁ , B ₁ and C ₁ , the modulation signal frequency of the reference sine wave is 50 Hz, The carrier frequency of the triangular wave is an integer multiple of the modulation signal frequency of the reference sine wave;

Step 2, directly comparing the reference sine wave in step 1 with the zero voltage to obtain the pulse signal D ₁ ;

Step 3: Calculate the pulse signals A ₁ , B ₁ , C ₁ and D ₁ obtained in Step 1 and Step 2 to obtain eight pulse signals through logic gate calculation, and the eight pulse signals respectively control the conduction and switching of the eight switching tubes. disconnect.

The triangular wave carrier frequency described in this embodiment is an integer multiple of the modulation signal frequency of the reference sine wave. For example, the triangular wave carrier frequency can be 500Hz or 5kHz, etc., and the amplitude of the three triangular wave carriers is 1/3. The reference voltage of the triangle wave carrier is 0, the reference voltage of the triangle wave carrier in the middle is 1/3, the reference voltage of the uppermost triangle wave carrier is 2/3, and the voltage amplitude of the reference sine wave is 0.85.

Embodiment 5. The difference between this embodiment and the carrier modulation method based on the H-bridge four-level inverter topology described in Embodiment 4 is that the pulse signals A ₁ , B ₁ , C ₁ and D ₁ obtain eight pulse signals through logic gate calculations, and the relationship between the eight switching tubes controlled by the eight pulse signals and the output level status of the H-bridge on the inverter side corresponding to when each switching tube is turned on for:

Claims (4)

1., based on the carrier modulating method of four electrical level inverter topological structures of H bridge, it realizes based on the following four electrical level inverter topological structures based on H bridge:

The described four electrical level inverter topological structures based on H bridge comprise DC side, switch combination circuit and inverter side, described DC side comprises DC power supply (E), a derided capacitors (C1), No. two derided capacitors (C2) and No. three derided capacitors (C3), a derided capacitors (C1), No. two derided capacitors (C2) are identical with the parameter of No. three derided capacitors (C3), a derided capacitors (C1), the output of DC power supply (E) is connected in parallel on after No. two derided capacitors (C2) and No. three derided capacitors (C3) are sequentially connected in series, power source combination after parallel connection provides DC power supply for inverter side, the output voltage of DC power supply (E) is V _ininverter side is H-bridge circuit structure, switch combination circuit comprises a switch combination and No. two switch combinations, a derided capacitors (C1) is connected by the voltage output end of No. two switch combinations with the H bridge of inverter side by the tie point of a switch combination and No. two derided capacitors (C2) and No. three derided capacitors (C3) with the tie point of No. two derided capacitors (C2)

It is characterized in that, described carrier modulating method is realized by following steps:

Step one, by three frequencies, the identical and triangular wave carrier that amplitude is equal compares with a baseline sinusoidal wave respectively, obtains three pulse signal A ₁, B ₁and C ₁, the frequency modulating signal of described baseline sinusoidal wave is 50Hz, and triangular wave carrier frequency is the integral multiple of the frequency modulating signal of baseline sinusoidal wave;

Step 2, by the baseline sinusoidal wave in step one directly and no-voltage compare and obtain pulse signal D ₁;

Step 3, the pulse signal A will obtained in step one and step 2 ₁, B ₁, C ₁and D ₁calculate acquisition eight pulse signals by gate, these eight pulse signals control conducting and the disconnection of eight switching tubes respectively.

2. the carrier modulating method of the four electrical level inverter topological structures based on H bridge according to claim 1, is characterized in that, the pulse signal A described in step 3 ₁, B ₁, C ₁and D ₁calculate acquisition eight pulse signals by gate, the pass between these eight pulse signals with corresponding eight switching tubes controlled is:

。

3. the carrier modulating method of the four electrical level inverter topological structures based on H bridge according to claim 1, it is characterized in that, a switch combination of described switch combination circuit is identical with the structure of No. two switch combinations, a wherein said switch combination comprises No. five switching tubes (S5), No. six switching tubes (S6), No. five diodes (D5) and No. six diodes (D6)

The negative pole of described No. five diodes (D5) is connected with the tie point of No. two derided capacitors (C2) with the collector electrode of No. five switching tubes (S5) and a derided capacitors (C1) as one end of the combination of this switch simultaneously, the positive pole of described No. five diodes (D5) simultaneously with the emitter of No. five switching tubes (S5), the positive pole of No. six diodes (D6) is connected with the collector electrode of No. six switching tubes (S6), the negative pole of No. six diodes (D6) is connected with a voltage output end of the emitter of No. six switching tubes (S6) and the H bridge of inverter side as the other end of the combination of this switch simultaneously.

4. the carrier modulating method of the four electrical level inverter topological structures based on H bridge according to claim 3, it is characterized in that, described inverter side H bridge comprises a switching tube (S1), No. two switching tubes (S2), No. three switching tubes (S3), No. four switching tubes (S4), a diode (D1), No. two diodes (D2), No. three diodes (D3), No. four diodes (D4), resistance (R) and inductance (L)

One end of described resistance (R) is connected with the other end of the combination of the collector electrode of the positive pole of the emitter of a switching tube (S1), a diode (D1), No. two switching tubes (S2), No. two diodes (D2) and a switch simultaneously, the other end of resistance (R) is connected with one end of inductance (L)

The other end of inductance (L) is connected with the negative pole of the positive pole of the emitter of No. three switching tubes (S3), No. three diodes (D3), the collector electrode of No. four switching tubes (S4) and No. four diodes (D4) as another voltage output end of inverter side H bridge simultaneously

The collector electrode of a switching tube (S1) is connected with the positive pole of the collector electrode of the negative pole of a diode (D1), No. three switching tubes (S3), the negative pole of No. three diodes (D3) and DC power supply (E) simultaneously

The emitter of No. two switching tubes (S2) is connected with the negative pole of the emitter of the positive pole of No. two diodes (D2), No. four switching tubes (S4), the positive pole of No. four diodes (D4) and DC power supply (E) simultaneously.