CN105305861B - A kind of cascaded multilevel inverter - Google Patents

A kind of cascaded multilevel inverter Download PDF

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Publication number
CN105305861B
CN105305861B CN201510703309.1A CN201510703309A CN105305861B CN 105305861 B CN105305861 B CN 105305861B CN 201510703309 A CN201510703309 A CN 201510703309A CN 105305861 B CN105305861 B CN 105305861B
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bridge arm
power switch
half bridge
switch tube
inverter
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CN105305861A (en
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张建忠
徐帅
胡省
姜永将
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Southeast University
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Southeast University
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    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M7/00—Conversion of ac power input into dc power output; Conversion of dc power input into ac power output
    • H02M7/42—Conversion of dc power input into ac power output without possibility of reversal
    • H02M7/44—Conversion of dc power input into ac power output without possibility of reversal by static converters
    • H02M7/48—Conversion of dc power input into ac power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode
    • H02M7/483—Converters with outputs that each can have more than two voltages levels
    • H02M7/4835—Converters with outputs that each can have more than two voltages levels comprising two or more cells, each including a switchable capacitor, the capacitors having a nominal charge voltage which corresponds to a given fraction of the input voltage, and the capacitors being selectively connected in series to determine the instantaneous output voltage
    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M7/00—Conversion of ac power input into dc power output; Conversion of dc power input into ac power output
    • H02M7/42—Conversion of dc power input into ac power output without possibility of reversal
    • H02M7/44—Conversion of dc power input into ac power output without possibility of reversal by static converters
    • H02M7/48—Conversion of dc power input into ac power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode
    • H02M7/483—Converters with outputs that each can have more than two voltages levels
    • H02M7/4837—Flying capacitor converters
    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M7/00—Conversion of ac power input into dc power output; Conversion of dc power input into ac power output
    • H02M7/42—Conversion of dc power input into ac power output without possibility of reversal
    • H02M7/44—Conversion of dc power input into ac power output without possibility of reversal by static converters
    • H02M7/48—Conversion of dc power input into ac power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode
    • H02M7/483—Converters with outputs that each can have more than two voltages levels
    • H02M7/487—Neutral point clamped inverters

Abstract

The present invention discloses a kind of New Cascading multi-electrical level inverter, which is sequentially connected in series cascade by a kind of double-T shaped multi-level-cell topology and constitutes.The double-T shaped multi-electrical level inverter is used by two three level T-type bridge arms and is composed back-to-back, two three level T-type bridge arms share a DC bus, DC bus is in series by two electrolytic capacitors, reduces independently-powered DC power supply quantity, has saved volume and cost.Compared with traditional cascaded multilevel inverter, less power device is used by novel double-T shaped multi-electrical level inverter cascaded multilevel inverter in series, more voltage level numbers can be exported, harmonic content is lower in output voltage, has preferable Electro Magnetic Compatibility, the loss of lower power switch and higher reliability.The New Cascading multi-electrical level inverter topology also has many advantages, such as to be easy to modularization and uses soft switch technique, is more suited in the application of grid-connected system inverter.

Description

A kind of cascaded multilevel inverter
Technical field
The present invention relates to power electronics DC-AC multi-electrical level inverter fields, and in particular to how electric a kind of New Cascading is Flat inverter.
Background technique
As the in short supply and environmental pollution of world energy sources is got worse, blueness of the clean renewable energy by people It looks at, the development and application of renewable energy depend on the DC-AC inverter device of function admirable.Therefore, research knot is needed Structure is simple, and output power quality is preferable, the higher DC-to-AC converter of efficiency.Inverter is turned for realizing DC-AC electric energy The electronic device changed, according to the difference of DC side power supply natures, inverter can be divided into voltage source inverter and current source type Inverter.Traditional two-level inverter is usually applied to that low pressure is low power to use electrical domain.Future electrical energy electronic technology research Target be high power density, high efficiency, high-performance.In the solution for realizing high-power transformation, multi-electrical level inverter because Its control mode multiplicity, output waveform percent harmonic distortion is low, power device voltage stress is low, electromagnetic interference (Electro Magnetic Interference, EMI) less, the good characteristic such as inversion efficiency height have become the heat of high-power application The fields such as point, such as high-voltage motor frequency control, flexible AC transmission, D.C. high voltage transmission, Research on Unified Power Quality Conditioner. R.H.Baker proposed the concept of cascaded H-bridges Multilevel Inverters in 1975 earliest；Japanese scholars A.Nabae, H.Akagi Et al. the more level PWM inverters of neutral point clamp type are proposed in nineteen eighty-three；T.A.Meynard proposed striding capacitance in 1992 Type multi-electrical level inverter.It is respectively diode-clamped and striding capacitance Clamp multi-level inverse conversion shown in Fig. 1 (a) and Fig. 1 (b) Device topology.Diode-clamped multi-electrical level inverter shown in Fig. 1 (a) generates n level by (n-1) a capacitor series connection in DC side Phase voltage, the power switch tube of every phase bridge arm including 2 (n-1) a series connections, each power switch tube both ends reverse parallel connection There is a fast recovery diode, further include (n-1) (n-2) a clamp diode for being connected in parallel on power switch tube branch road, uses In for each power switch tube carry out voltage clamp.Fig. 1 (b) show striding capacitance Clamp multi-electrical level inverter topology, DC side generates N level phase voltage by (n-1) a capacitor series connection, and every phase bridge arm includes the power switch of 2 (n-1) a series connections Pipe, each power switch tube both ends reverse parallel connection have a fast recovery diode, and every phase bridge arm also needs (n-1) (n-2)/2 A clamping capacitance, for realizing the pressure of each power switch tube.Fig. 2 show Cascade H bridge type multi-electrical level inverter topology, by N full-bridge mutually cascades composition, including 4n power switch tube and corresponding anti-paralleled diode, n independent DC power supplies And n DC capacitor is constituted.Although first two multi-electrical level inverter topology can be realized voltage with multiple levels output, need big The clamp diode or striding capacitance of amount, to can make systems bulky, reliability is reduced, increased costs.Cascaded H-bridges are more Electrical level inverter topological structure have using device it is few, do not need clamp diode and striding capacitance, be easy to modularization and use The advantages that soft switch technique, it is considered to be relatively more suitable for the inverter of grid-connected system.
In recent years, on the basis of traditional cascaded H-bridges multi-electrical level inverter, a large amount of New Cascading multi-electrical level inverter topology It is put forward one after another, it is intended to realize the more voltage output of high level number, improve output power quality.
Summary of the invention
Goal of the invention: complicated in order to solve current traditional multi-level inverter structure, volume is larger, and reliability is lower to ask Topic, the invention discloses a kind of novel double-T shaped multi-electrical level inverter unit topology and New Cascading multi-electrical level inverters, mention simultaneously Asymmetric algorithm is mixed using DC voltage in unit topology out, constitutes novel Mixed cascading asymmetry multi-level inverse conversion Device makes a part of unit module run on high frequency mode, and another part unit module runs on low frequency mode, improves output voltage Switching loss is reduced while level number, to be further reduced EMI, improves output power quality.
A kind of technical solution: New Cascading multi-electrical level inverter, which is characterized in that the New Cascading multi-electrical level inverter by The n double-T shaped multi-electrical level inverter unit topologys of module 1 to module n are sequentially connected in series cascade and constitute.Double-T shaped more level Inverter unit topology, which is characterized in that including left side bridge arm, upper half bridge arm, lower half bridge arm, DC bus, right side bridge arm.
Left side bridge arm includes power switch tube and power switch tube, the emitter and hair of power switch tube and power switch tube Emitter-base bandgap grading is connected to DC bus capacitor C after being connecteddc1Negative polarity end.Upper half bridge arm neutral point clamp two-way power switch pipe is by two Power switch tube is constituted using common emitter connection, and the emitter of two power switch tubes is connected with emitter, and an end is connected to directly The midpoint of bus capacitor is flowed, it is another to be connected to positive polarity output terminal A.Lower half bridge arm neutral point clamp two-way power switch pipe is by two Power switch tube is constituted using common emitter connection, and the emitter of two power switch tubes is connected with emitter, and an end is connected to directly The midpoint of bus is flowed, it is another to be connected to negative polarity output B.Right side bridge arm includes power switch tube and power switch tube, power Switching tube and the collector of power switch tube are connected to DC bus capacitor C after being connected with collectordc2Positive ends.On left side The collector and right side upper half bridge arm of the collector of half bridge arm power switch tube, upper half bridge arm neutral point clamp two-way power switch pipe The emitter of power switch tube, which is connected, to be followed by positive polarity output terminal A.The collector of left side lower half bridge arm power switch tube, lower half The collector of bridge arm neutral point clamp two-way power switch pipe and the emitter of right side lower half bridge arm power switch tube be connected be followed by Negative polarity output B.DC bus is by two electrolytic capacitor Cdc1And Cdc2It is in series, Cdc1Negative polarity end be connected to left side The midpoint of bridge arm, Cdc1Positive ends and Cdc2Negative polarity end be connected, Cdc2Positive ends be connected to right side bridge arm in Point.
Novel double-T shaped multi-electrical level inverter unit is topological, constitutes when direct current survey capacitance voltage value is identical in unit module Symmetrical multi-electrical level inverter；DC capacitor voltage value does not constitute asymmetric multi-electrical level inverter simultaneously.In DC bus electricity Hold under voltage symmetry and asymmetric both of which, the switch state of inverter and corresponding output-voltage levels are as follows:
(1) dc-link capacitance voltage symmetry mode: Vdc1=Vdc2=Vdc
1 symmetric pattern lower switch state of table and output voltage
(2) dc-link capacitance asymmetrical voltage mode: Vdc2=2Vdc1=2Vdc
2 dissymmetric mode lower switch state of table and output voltage
In output phase under 7 level conditions of level number, novel double-T shaped asymmetric multi-electrical level inverter and diode clamp Type, the parameter comparison of three kinds of traditional multi-level inverters of striding capacitance Clamp and Cascade H bridge type are as shown in table 3.
The comparison of table 3 novel double-T shaped multi-electrical level inverter and traditional multi-level inverter
A kind of New single-phase cascaded multilevel inverter disclosed by the invention is by n double-T shaped multi-electrical level inverter unit moulds Block is sequentially connected in series cascade and constitutes.The negative polarity output of unit module 1 is connected to the positive polarity output terminal of unit module 2, unit mould The negative polarity output that the negative polarity output of block 2 is connected to positive polarity output terminal ... the unit module n-1 of unit module 3 is connected to The positive polarity output terminal of unit module n.
It is constituted when the direct current survey capacitance voltage value of each unit module is identical in New single-phase cascaded multilevel inverter Cascaded symmetric multi-electrical level inverter；It is not right that Mixed cascading is constituted when DC capacitor voltage value is not identical in each unit module Claim multi-electrical level inverter.Mixed cascading asymmetry multi-electrical level inverter can be by the unequal symmetrical cell of n DC voltage Module-cascade is constituted, and can also be made of n asymmetric unit module cascades.Table 4 show DC side electricity in unit module Hold the relevant parameter under three kinds of dissymmetric modes of voltage.Wherein, NlevelFor output level number, Vmax(n) in n unit module Maximum output voltage, VmaxFor the total maximum output voltage of New Cascading multi-electrical level inverter, VblockFor all power switch tubes The sum of maximum peak reverse voltage of receiving.
4 dissymmetric mode of table and corresponding parameter
The utility model has the advantages that a kind of New single-phase cascade connection multi-level disclosed by the invention is inverse compared to traditional multi-level inverter Become device to have the advantage that
(1) compared with two kinds of multi-electrical level inverters of diode-clamped and striding capacitance Clamp, in output same level In the case where number, the power switch tube quantity and isolation drive quantity used greatly reduces, and does not need additionally to increase clamp two Pole pipe or striding capacitance, therefore, reduced system bulk and complexity reduce costs.
(2) compared with traditional Cascade H bridge type multi-electrical level inverter, the novel Mixed cascading asymmetry multi-level inverse conversion Device, in the case that output phase is with level number, power switch tube quantity, the DC bus capacitor quantity used greatly reduces, and Unit module runs on low frequency state, reduces switching loss, to save system cost.
(3) double-T shaped multi-level-cell module has 14 kinds of different current flow paths, swears containing a large amount of Redundanter schalter Amount, compared to traditional multi-electrical level inverter, it is easy to accomplish the reliability of system can be improved in modularization and failure tolerant operation Energy.
Detailed description of the invention
Fig. 1 is traditional Clamp multi-level converter topology structure figure；
Fig. 2 is traditional cascaded H-bridges multi-level converter topology structure figure；
Fig. 3 is double-T shaped multi-electrical level inverter unit topology diagram；
Fig. 4 is double-T shaped multi-electrical level inverter current flow paths；
Fig. 5 is the concatenated New Cascading multi-electrical level inverter of n unit module；
Fig. 6 is two concatenated cascaded multilevel inverters of unit module.
Specific embodiment
Further explanation is done to the present invention with reference to the accompanying drawing.
If Fig. 1 (a), Fig. 1 (b) and Fig. 2 are respectively three kinds of diode-clamped, capacitor-clamped type and Cascade H bridge type tradition Multi-electrical level inverter topology.
Fig. 3 show a kind of double-T shaped multi-level converter topology structure figure disclosed by the invention, this is novel double-T shaped mostly electric Flat inverter unit topology includes left side bridge arm (1), upper half bridge arm (2), lower half bridge arm (3), DC bus (4), right side bridge arm (5)。
Left side bridge arm (1) includes power switch tube (11) and power switch tube (12), and power switch tube (11) and power are opened The emitter of pass pipe (12) is connected to DC bus capacitor C after being connected with emitterdc1Negative polarity end.Upper half bridge arm neutral point clamp Two-way power switch pipe (2) is made of two power switch tubes using common emitter connection, the emitter of two power switch tubes It is connected with emitter, an end is connected to the midpoint of dc-link capacitance, another to be connected to positive polarity output terminal A.Lower half bridge arm midpoint Clamp two-way power switch pipe (3) is made of two power switch tubes using common emitter connection, the hair of two power switch tubes Emitter-base bandgap grading is connected with emitter, and an end is connected to the midpoint of DC bus, another to be connected to negative polarity output B.Right side bridge arm (5) packet Include power switch tube (51) and power switch tube (52), the collector and current collection of power switch tube (51) and power switch tube (52) DC bus capacitor C is connected to after being extremely connecteddc2Positive ends.The collector of left side upper half bridge arm power switch tube (11), upper half The collector of bridge arm neutral point clamp two-way power switch pipe (2) and the emitter of right side upper half bridge arm power switch tube (51) are connected It is followed by positive polarity output terminal A.Collector, the two-way function of lower half bridge arm neutral point clamp of left side lower half bridge arm power switch tube (12) The collector of rate switching tube (3) and the emitter of right side lower half bridge arm power switch tube (52), which are connected, to be followed by negative polarity output B.DC bus (4) is by two electrolytic capacitor Cdc1And Cdc2It is in series, Cdc1Negative polarity end be connected to left side bridge arm in Point, Cdc1Positive ends and Cdc2Negative polarity end be connected, Cdc2Positive ends be connected to right side bridge arm midpoint.
Fig. 4 show novel double-T shaped multi-electrical level inverter current flow paths, and 8 power switch tubes share 14 kinds of electric currents Circulation path.Define electric current from positive ends A outflow be positive direction (i>0), electric current from negative polarity end B outflow be negative direction (i< 0)。
(1) it is+2V that Fig. 4 (a) and (b), which are output level,dcWhen switch state and current flow paths.Fig. 4 (a) is shown Electric current positive direction (i > 0) triggers power switch tube SP4And SN1Conducting, electric current are flowed into from negative polarity end B through SN1、Cdc1、Cdc2、SP4 It is flowed out from positive ends A；Fig. 4 (b) show electric current negative direction (i < 0), and all power switch tubes are in an off state, electric current from Positive ends A is flowed into through DP4、Cdc2、Cdc1、DN1It is flowed out from negative polarity end B.
(2) Fig. 4 (c) and (d) be the switch state and current flow paths exported when being 0 level.Fig. 4 (a) show electricity Positive direction is flowed, power switch tube S is triggeredN2、SP3Conducting, electric current are flowed into from negative polarity end B, flow through SN2–DN3–SP3–DP2, from anode Property end A outflow；Fig. 4 (d) show electric current negative direction, triggers power switch tube SP2、SN3Conducting, electric current are flowed from positive ends A Enter, flows through SP2–DP3–SN3–DN2, flowed out from negative polarity end B.
(3) it is -2V that Fig. 4 (e) and (f), which are output level,dcWhen switch state and current flow paths.Fig. 4 (e) is shown Electric current positive direction (i > 0), all power switch tubes are in an off state, and electric current is flowed into from negative polarity end B, flow through DN4–Cdc2– Cdc1–DP1, flowed out from positive ends A；Fig. 4 (f) is shown electric current negative direction (i < 0), triggers power switch tube SP1And SN4Conducting, Electric current is flowed into from positive ends A, flows through SP1、Cdc1、Cdc2、DN4, flowed out from negative polarity end B.
(4) it is-V that Fig. 4 (g) to Fig. 4 (j), which is output level,dcWhen switch state and current flow paths.Shown in Fig. 4 (g) For electric current positive direction, power switch tube S is triggeredN2Conducting controls the shutdown of remaining power switch tube.Current flow paths are as follows: SN2– DN3–Cdc1–DP1.Fig. 4 (h) show electric current negative direction, triggers power switch tube SP1、SN3Conducting, controls remaining power switch tube Shutdown.Current flow paths are as follows: SP1–Cdc1–SN3–DN2.Fig. 4 (i) show electric current positive direction, triggers power switch tube SP3It leads It is logical, control the shutdown of remaining power switch tube.Current flow paths are as follows: DP2–SP3–Cdc2–DN4.Fig. 4 (j) show electric current losing side To triggering power switch tube SP2、SN4Conducting controls the shutdown of remaining power switch tube.Current flow paths are as follows: SP2–DP3–Cdc2– SN4。
(5) it is+V that Fig. 4 (k) to Fig. 4 (n), which is output level,dcWhen switch state and current flow paths.Shown in Fig. 4 (k) For electric current positive direction, power switch tube S is triggeredP3、SN1Conducting controls the shutdown of remaining power switch tube.Current flow paths are as follows: SN1–Cdc1–SP3–DP2.Fig. 4 (l) show electric current negative direction, triggers power switch tube SP2Conducting, controls remaining power switch tube Shutdown.Current flow paths are as follows: SP2–DN3–Cdc1–DN1.Fig. 4 (m) show electric current positive direction, triggers power switch tube SP4、SN2 Conducting controls the shutdown of remaining power switch tube.Current flow paths are as follows: SN2–DN3–Cdc2–SP4.Fig. 4 (n) show electric current losing side To triggering power switch tube SN3Conducting controls the shutdown of remaining power switch tube.Current flow paths are as follows: DP4–Cdc2–SN3–DN2。
Fig. 5 show the New single-phase cascaded multilevel inverter topology containing n unit module, by n double-T shaped more level Inverter unit module mutually cascades composition.The negative polarity output of unit module 1 is connected to the positive polarity output of unit module 2 End, the negative polarity that the negative polarity output of unit module 2 is connected to positive polarity output terminal ... the unit module n-1 of unit module 3 are defeated It is connected to the positive polarity output terminal of unit module n out.The direct current of each unit module surveys electricity in New Cascading multi-electrical level inverter Cascaded symmetric multi-electrical level inverter is constituted when appearance voltage value is identical；DC capacitor voltage value not phase in each unit module Mixed cascading asymmetry multi-electrical level inverter is constituted simultaneously.Mixed cascading asymmetry multi-electrical level inverter can be by n DC side The symmetrical cell module-cascade that voltage is not mutually equal is constituted, and can also be made of n asymmetric unit module cascades.The present invention Disclose the output voltage situation of the Mixed cascading asymmetry multi-electrical level inverter under symmetric pattern and under three kinds of dissymmetric modes.
(1) under symmetric pattern, Vdc11=Vdc12=Vdc21=Vdc22=... Vdcn1=Vdcn2, DC side in each unit module Voltage is equal, the output voltage of New Cascading multi-electrical level inverter are as follows: v0=v01+v02+v03+…+v0n；The maximum of unit module Output voltage: Vmax=2Vdc；N unit module cascaded multilevel inverter maximum output voltage are as follows: Vmax=2nVdc；Output electricity Voltage level number are as follows: Nlevel=4n+1.
6 symmetric pattern lower switch state of table and output voltage
(2) dissymmetric mode 1: DC voltage value is different in each unit module, Vdc11=Vdc12=Vdc；Vdc21 =Vdc22=5Vdc；…Vdcn1=Vdcn2=(5n-1) Vdc(n=1,2,3 ...).The Maximum Output Level of unit module m: Vmax(n) =+2 × (5n-1) Vdc, maximum output voltage: Vmax=+(5n-1)/2Vdc, total output-voltage levels number are as follows: Nlevel=5n, IGBT quantity: NIGBT=8n, DC capacitor quantity: Nsource=2n
7 dissymmetric mode of table, 1 lower switch state and output voltage
(3) dissymmetric mode 2:Vdc11=Vdc, Vdc12=2Vdc；Vdc21=22Vdc, Vdc22=23Vdc；Vdcn1=22n-2Vdc, Vdcn2=22n-1Vdc(n=1,2,3 ...).The Maximum Output Level of unit module n: Vmax(n)=+ 3 × 4n-1Vdc, total output maximum Voltage: Vmax=+(4n-1)Vdc, total output-voltage levels number: Nlevel=22n+1- 1, IGBT quantity: NIGBT=8n, DC capacitor Quantity: Nsource=2n.
8 dissymmetric mode of table, 2 lower switch state and output voltage
(4) dissymmetric mode 3:
The Maximum Output Level of unit module n: Vmax(n)=+ 3 × 7n-1Vdc, always export maximum voltage: Vmax=+(7n- 1)/2Vdc, total output-voltage levels number: Nlevel=7n, IGBT quantity: NIGBT=8n, DC capacitor quantity: Nsource=2n.
9 dissymmetric mode of table, 3 lower switch state and output voltage
Fig. 6 show two double-T shaped unit modules single-phase cascaded multilevel inverter in series, using asymmetric mould The DC bus-bar voltage algorithm of formula 3, Vdc11=Vdc, Vdc12=2Vdc, Vdc21=7Vdc, Vdc22=14Vdc；It can produce 49 level Phase voltage.In state 1 to state 7, the output voltage of unit module 2 is remained unchanged, and the power switch tube of unit module 2 is run on Low frequency state.Thus in the New Cascading multi-electrical level inverter, the unit module of low-frequency operation can choose low frequency power device Part.
10 switch state of table and output voltage (mode 3)
The above is only a preferred embodiment of the present invention, it is noted that for the ordinary skill people of the art For member, various improvements and modifications may be made without departing from the principle of the present invention, these improvements and modifications are also answered It is considered as protection scope of the present invention.

Claims (2)

1. a kind of cascaded multilevel inverter, it is characterised in that: the inverter is by least two double-T shaped multi-electrical level inverter lists First topology is sequentially connected in series cascade and constitutes, and the double-T shaped multi-electrical level inverter unit topology is by left side bridge arm (1), upper half bridge arm (2), lower half bridge arm (3), DC bus (4), right side bridge arm (5) are constituted；
The left side bridge arm (1) of the double-T shaped multi-electrical level inverter includes under left side upper half bridge arm power switch tube (11) and left side Half bridge arm power switch tube (12), left side upper half bridge arm power switch tube (11) and left side lower half bridge arm power switch tube (12) Emitter is connected to the negative polarity end of DC bus capacitor Cdc1 after being connected with emitter；Upper half bridge arm (2) is by two power switch Pipe is constituted using common emitter connection, and the emitter of two power switch tubes is connected with emitter, and one end of upper half bridge arm is connected to directly The midpoint of bus capacitor is flowed, it is another to be connected to positive polarity output terminal A；Lower half bridge arm (3) is by two power switch tubes using hair altogether Emitter-base bandgap grading connection is constituted, and the emitter of two power switch tubes is connected with emitter, and one end of lower half bridge arm is connected in DC bus Point, it is another to be connected to negative polarity output B；Right side bridge arm (5) includes under right side upper half bridge arm power switch tube (51) and right side Half bridge arm power switch tube (52), right side upper half bridge arm power switch tube (51) and right side lower half bridge arm power switch tube (52) Collector is connected to the positive ends of DC bus capacitor Cdc2 after being connected with collector；Left side upper half bridge arm power switch tube (11) Collector, upper half bridge arm (2) upper power switch tube collector and right side upper half bridge arm power switch tube (51) transmitting Extremely it is connected and is followed by positive polarity output terminal A；Under the collector of left side lower half bridge arm power switch tube (12), lower half bridge arm (3) The collector of power switch tube and the emitter of right side lower half bridge arm power switch tube (52), which are connected, to be followed by negative polarity output B；DC bus (4) is in series by two electrolytic capacitors Cdc1 and Cdc2, and the negative polarity end of Cdc1 is connected to left side bridge arm Midpoint, the positive ends of Cdc1 are connected with the negative polarity end of Cdc2, and the positive ends of Cdc2 are connected to the midpoint of right side bridge arm；
It is constituted when two electrolytic capacitor Cdc1 and Cdc2 voltage values are identical in the double-T shaped multi-level-cell module symmetrical mostly electric Flat inverter, two electrolytic capacitor Cdc1 and Cdc2 voltage values do not constitute asymmetric multi-electrical level inverter simultaneously；It is described not right Multi-electrical level inverter is claimed to be made of the unequal symmetrical multi-electrical level inverter cascade of at least two DC voltages or at least two Asymmetric multi-electrical level inverter cascade is constituted.
2. cascaded multilevel inverter according to claim 1, it is characterised in that: the power of double-T shaped multi-electrical level inverter Switching tube is insulated gate bipolar transistor, the reversed peak that four power switch tubes of the left side bridge arm and right side bridge arm are born Threshold voltage value is equal, and the reverse peak voltage value that four power switch tubes of upper half bridge arm and lower half bridge arm are born is left side and the right side The half of side power switch tube.
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