CN103489909B - IGBT terminal structure with hole combination layer and preparation method thereof - Google Patents

IGBT terminal structure with hole combination layer and preparation method thereof Download PDF

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Publication number
CN103489909B
CN103489909B CN201310422648.3A CN201310422648A CN103489909B CN 103489909 B CN103489909 B CN 103489909B CN 201310422648 A CN201310422648 A CN 201310422648A CN 103489909 B CN103489909 B CN 103489909B
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ring
type
igbt
combination layer
equipotential ring
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CN103489909A (en
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李泽宏
宋文龙
邹有彪
顾鸿鸣
吴明进
张金平
任敏
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University of Electronic Science and Technology of China
Institute of Electronic and Information Engineering of Dongguan UESTC
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University of Electronic Science and Technology of China
Institute of Electronic and Information Engineering of Dongguan UESTC
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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/70Bipolar devices
    • H01L29/72Transistor-type devices, i.e. able to continuously respond to applied control signals
    • H01L29/739Transistor-type devices, i.e. able to continuously respond to applied control signals controlled by field-effect, e.g. bipolar static induction transistors [BSIT]
    • H01L29/7393Insulated gate bipolar mode transistors, i.e. IGBT; IGT; COMFET
    • H01L29/7395Vertical transistors, e.g. vertical IGBT
    • H01L29/7396Vertical transistors, e.g. vertical IGBT with a non planar surface, e.g. with a non planar gate or with a trench or recess or pillar in the surface of the emitter, base or collector region for improving current density or short circuiting the emitter and base regions
    • H01L29/7397Vertical transistors, e.g. vertical IGBT with a non planar surface, e.g. with a non planar gate or with a trench or recess or pillar in the surface of the emitter, base or collector region for improving current density or short circuiting the emitter and base regions and a gate structure lying on a slanted or vertical surface or formed in a groove, e.g. trench gate IGBT
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/02Semiconductor bodies ; Multistep manufacturing processes therefor
    • H01L29/06Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
    • H01L29/0603Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/66007Multistep manufacturing processes
    • H01L29/66075Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
    • H01L29/66227Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
    • H01L29/66234Bipolar junction transistors [BJT]
    • H01L29/66325Bipolar junction transistors [BJT] controlled by field-effect, e.g. insulated gate bipolar transistors [IGBT]
    • H01L29/66333Vertical insulated gate bipolar transistors
    • H01L29/66348Vertical insulated gate bipolar transistors with a recessed gate

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  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Ceramic Engineering (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Manufacturing & Machinery (AREA)
  • Electrodes Of Semiconductors (AREA)
  • Bipolar Transistors (AREA)

Abstract

IGBT terminal structure with hole combination layer and preparation method thereof, belongs to power semiconductor device technology field.Described IGBT terminal structure is in the P type equipotential ring of conventional IGBT terminal structure, introduce hole combination layer (annealing in process under 400 ~ 550 DEG C of temperature conditions formed by the carbon ion be injected in P type equipotential ring and oxonium ion).The introducing of hole combination layer effectively can reduce the hole current density at equipotential ring place, weakens current convergence phenomenon when device turns off, and suppresses dynamic avalanche to puncture and thermal breakdown, improves the reliability of IGBT device.Because the introducing of hole combination layer is only inner in the equipotential ring of device terminal, during device forward conduction, the conductivity modulation effect of drift region is unaffected, and therefore forward conduction voltage drop can not change.As long as described preparation method increases the ion implantation that a mask plate carries out carbon, oxygen, too much fringe cost can not be increased.

Description

IGBT terminal structure with hole combination layer and preparation method thereof
Technical field
The invention belongs to power semiconductor device technology field, relate to insulated gate bipolar transistor (InsulatedGateBipolarTransistor, IGBT), be specifically related to IGBT terminal structure.
Background technology
IGBT is the compound device of a kind of voltage-controlled MOS/BJT.From structure, the structure of IGBT is very similar to VDMOS, just by the N of VDMOS +substrate is adjusted to P +substrate, but the conductivity modulation effect introduced overcomes VDMOS conducting resistance inherently and the contradiction of puncture voltage, thus makes IGBT have the major advantage of bipolar power transistor and power MOSFET: input impedance is high, conduction voltage drop is low, current capacity is large, switching speed is fast simultaneously.Just because of IGBT uniqueness, the performance advantage do not replaced makes it just be widely used at numerous areas from releasing practical product, such as: new energy technology, with motor-car, the high ferro fields such as advanced transport facility, hybrid vehicle, office automation and household electrical appliance that are representative.
During IGBT forward conduction, positive grid voltage makes raceway groove open, emitter electronics flows to drift region through raceway groove, and due to collector electrode forward bias and electroneutral requirement, drift region is injected and and the electronics formation conductance modulation of drift region from collector electrode in a large amount of hole.IGBT is made to have low forward conduction voltage drop, high on state current, low-loss advantage just because of conductivity modulation effect during IGBT forward conduction.But in IGBT turn off process, when grid voltage is reduced to after lower than threshold voltage, channel cutoff, the vanishing of emitter electronic current.In the application circuit of the inductive load of extensive use, because inductive current can not suddenly change, that is: the electric current flowing through IGBT can not suddenly change.Therefore, the hole current that the hole that the electric current of all IGBT of flowing through must inject drift region by collector electrode is formed provides.Now, for the terminal area (as shown in Figure 1) of IGBT device, a large amount of holes in drift region can not directly be taken away from the field limiting ring of terminal floating, but concentrate at the equipotential ring place of terminal, thus form the local accumulation effect (as shown in Figure 2) of hole current at the equipotential ring place of terminal, cause the high-voltage great-current of local, device temperature is sharply raised, cause the dynamic avalanche of device to puncture and thermal breakdown, device is burnt, cause the shutoff of device to be lost efficacy.
Summary of the invention
In order to the electric current reducing IGBT device terminal equipotential ring place gathers effect, promote the reliability of IGBT device, the invention provides a kind of IGBT terminal structure with hole combination layer.This IGBT terminal structure introduces hole combination layer in terminal equipotential ring, effectively can reduce the hole current density at terminal equipotential ring place, weaken corresponding current convergence phenomenon, suppress the dynamic avalanche caused due to current convergence to puncture and thermal breakdown, improve the reliability of IGBT device.The introducing of hole combination layer is simultaneously only inner in the equipotential ring of device terminal, and during forward conduction, the conductivity modulation effect of drift region is unaffected, and therefore forward conduction voltage drop can not change.The present invention provides the preparation method of the IGBT terminal structure with hole combination layer simultaneously.
Technical solution of the present invention is as follows:
Have the IGBT terminal structure of hole combination layer, its structure as shown in Figure 3, comprises the IGBT terminal structure be connected with IGBT active area, and described IGBT terminal structure comprises N -drift region 7, N-type resilient coating 8, P +collector region 9, metal collector 10, P type equipotential ring 12, P type field limiting ring 14 and N +cut-off ring 20; Wherein N-type resilient coating 8 is positioned at N -drift region 7 and P +between collector region 9, P +collector region 9 is between N-type resilient coating 8 and metal collector 10; Described P type equipotential ring 12 is positioned at the N near IGBT active area -in drift region 7, there is in P type equipotential ring 12 P of equipotential ring +contact zone 11, the P of described equipotential ring +contact zone 11 realizes the equipotential link with metal emitting in IGBT active area by metal connecting line; Described N +cut-off ring 20 is positioned at the N away from IGBT active area -in drift region 7; P type equipotential ring 12 and N +n between cut-off ring 20 -there is in drift region 7 some P type field limiting rings 14; P type equipotential ring 12, P type field limiting ring 14, N +cut-off ring 20 and N -the surface of drift region 7 has field oxide 16, field oxide 16 surface and P type equipotential ring 12, P type field limiting ring 14 and N +the position of cut-off ring 20 correspondence has Metal field plate 13,15,18 and 19 respectively; In described P type equipotential ring 12, also have hole combination layer 21, by carbon (C) ion be injected in P type equipotential ring 12 and oxygen (O) ion, the annealing in process under 400 ~ 550 DEG C of temperature conditions formed described hole combination layer 21.
The present invention provides the preparation method of the IGBT terminal structure with hole combination layer simultaneously, comprises following processing step: terminal N in IGBT manufacturing process -in drift region 7, boron injects and pushes away trap and forms P type equipotential ring 12, P type field limiting ring 14 and N respectively +after cut-off ring 20, carry out carbon (C) ion and oxygen (O) ion implantation in P type equipotential ring 12, the annealing in process then under 400 ~ 550 DEG C of temperature conditions forms the hole combination layer 21 in P type equipotential ring 12.After forming the hole combination layer 21 in P type equipotential ring 12, (include the photoetching in source region and the etching of grid groove, the growth of gate oxide, N carrying out subsequent technique +the deposit of polysilicon and photoetching, P -the autoregistration boron of base injects and pushes away trap, N +the arsenic of emitter region injects and pushes away trap, anti-breech lock P +the boron of layer injects, the deposit of BPSG and backflow, and the photoetching of contact hole, boron are injected and annealing, the deposit of front aluminium lamination and photoetching, thinning back side, back face metalization etc.)
In the concrete manufacture craft of hole combination layer, with 80 ~ 120KeV energy, 1E15 ~ 4E15cm -2dosage carries out boron injection, after forming equipotential ring and field limiting ring, under the condition that silicon wafer horizontal is placed, inject carbon ion and oxonium ion (as shown in Figure 4) respectively to equipotential ring inner ion, wherein the energy of carbon ion implatation and dosage are respectively: 40 ~ 60KeV, 1E12 ~ 3E12cm -2, energy and the dosage of O +ion implanted are respectively: 50 ~ 70KeV, 2E12 ~ 6E12cm -2.Then anneal under 400 ~ 550 DEG C of conditions.
About concrete Implantation Energy and dosage, the annealing temperature of the ion of carbon, oxygen, need require to carry out reasonably optimizing and choosing, to reaching optimal effect according to the actual design of IGBT device.
Operation principle of the present invention:
For traditional IGBT terminal structure (as shown in Figure 1), when IGBT turns off, a large amount of holes in drift region can not directly be taken away from the field limiting ring of terminal floating, but concentrate at the equipotential ring place of terminal, thus form the local accumulation effect (as shown in Figure 2) of hole current at the equipotential ring place of terminal, cause the high-voltage great-current of local, device temperature is sharply raised, cause the dynamic avalanche of device to puncture and thermal breakdown, device is burnt, cause the shutoff of device to be lost efficacy.The IGBT terminal structure with hole combination layer provided by the invention, based on traditional IGBT terminal structure, after formation equipotential ring and field limiting ring, under the condition that silicon wafer horizontal is placed, inject carbon, oxygen (as shown in Figure 4) respectively to equipotential ring inner ion, then carry out process annealing.As carbon, the oxygen of non-conductive impurity, be coupled between silicon crystal lattice, form hole combination layer, be the part of numbering 21 indication in Fig. 3.In IGBT turn off process, a large amount of holes stored in drift region, owing to can not directly extract from the field limiting ring of floating, will be concentrated at equipotential ring place, and from the P of equipotential ring +contact zone is drawn, thus formation hole current gathers.A large amount of holes that equipotential ring place gathers are extracted and in the process of hole combination layer, part hole is disappeared by compound, thus the hole current density effectively reduced herein, weaken corresponding current convergence phenomenon, suppress the dynamic avalanche caused due to current convergence to puncture and thermal breakdown, improve the reliability of IGBT device.
In sum, the IGBT terminal structure with hole combination layer provided by the invention.This IGBT terminal structure introduces hole combination layer in terminal equipotential ring, effectively can reduce the hole current density at terminal equipotential ring place, weaken corresponding current convergence phenomenon, suppress the dynamic avalanche caused due to current convergence to puncture and thermal breakdown, improve the reliability of IGBT device.The introducing of hole combination layer is simultaneously only inner in the equipotential ring of device terminal, and during forward conduction, the conductivity modulation effect of drift region is unaffected, and therefore forward conduction voltage drop can not change.In addition, the manufacture method that the IGBT terminal structure with hole combination layer that the present invention proposes is corresponding, as long as increase the ion implantation that a mask plate carries out carbon, oxygen, under the fringe cost condition that the newly-increased processing step of reduction brings as far as possible, best IGBT device reliability improvement result can be obtained.
Accompanying drawing explanation
Fig. 1 is conventional I GBT terminal structure schematic diagram.
Fig. 2 is the hole current distribution schematic diagram of conventional I GBT terminal structure.
Fig. 3 is a kind of IGBT terminal structure schematic diagram proposed.
Fig. 4 is the ion implantation hole combination layer schematic diagram of a kind of IGBT terminal structure proposed.
In Fig. 1 to Fig. 4: comprise 1 for grid, 2 is emitter, and 3 is N +district, 4 is P +district, 5 is P -base, 6 is N +polysilicon, 7 is N -drift region, 8 is N-type resilient coating, and 9 is P +collector region, 10 is metal collector, and 11 is the P of equipotential ring +contact zone, 12 is P type equipotential ring, and 14 is P type field limiting ring, and 16 is field oxide, and 13,15,18,19 is Metal field plate, and 20 is N +cut-off ring, 21 is hole combination layer, and 22,23 is trap oxide layer.
Embodiment
Have the IGBT terminal structure of hole combination layer, its structure as shown in Figure 3, comprises the IGBT terminal structure be connected with IGBT active area, and described IGBT terminal structure comprises N -drift region 7, N-type resilient coating 8, P +collector region 9, metal collector 10, P type equipotential ring 12, P type field limiting ring 14 and N +cut-off ring 20; Wherein N-type resilient coating 8 is positioned at N -drift region 7 and P +between collector region 9, P +collector region 9 is between N-type resilient coating 8 and metal collector 10; Described P type equipotential ring 12 is positioned at the N near IGBT active area -in drift region 7, there is in P type equipotential ring 12 P of equipotential ring +contact zone 11, the P of described equipotential ring +contact zone 11 realizes the equipotential link with metal emitting in IGBT active area by metal connecting line; Described N +cut-off ring 20 is positioned at the N away from IGBT active area -in drift region 7; P type equipotential ring 12 and N +n between cut-off ring 20 -there is in drift region 7 some P type field limiting rings 14; P type equipotential ring 12, P type field limiting ring 14, N +cut-off ring 20 and N -the surface of drift region 7 has field oxide 16, field oxide 16 surface and P type equipotential ring 12, P type field limiting ring 14 and N +the position of cut-off ring 20 correspondence has Metal field plate 13,15,18 and 19 respectively; In described P type equipotential ring 12, also have hole combination layer 21, by carbon (C) ion be injected in P type equipotential ring 12 and oxygen (O) ion, the annealing in process under 400 ~ 550 DEG C of temperature conditions formed described hole combination layer 21.
The present invention provides the preparation method of the IGBT terminal structure with hole combination layer simultaneously, comprises following processing step: terminal N in IGBT manufacturing process -in drift region 7, boron injects and pushes away trap and forms P type equipotential ring 12, P type field limiting ring 14 and N respectively +after cut-off ring 20, carry out carbon (C) ion and oxygen (O) ion implantation in P type equipotential ring 12, the annealing in process then under 400 ~ 550 DEG C of temperature conditions forms the hole combination layer 21 in P type equipotential ring 12.After forming the hole combination layer 21 in P type equipotential ring 12, (include the photoetching in source region and the etching of grid groove, the growth of gate oxide, N carrying out subsequent technique +the deposit of polysilicon and photoetching, P -the autoregistration boron of base injects and pushes away trap, N +the arsenic of emitter region injects and pushes away trap, anti-breech lock P +the boron of layer injects, the deposit of BPSG and backflow, and the photoetching of contact hole, boron are injected and annealing, the deposit of front aluminium lamination and photoetching, thinning back side, back face metalization etc.)
In the concrete manufacture craft of hole combination layer, with 80 ~ 120KeV energy, 1E15 ~ 4E15cm -2dosage carries out boron injection, after forming equipotential ring and field limiting ring, under the condition that silicon wafer horizontal is placed, inject carbon ion and oxonium ion (as shown in Figure 4) respectively to equipotential ring inner ion, wherein the energy of carbon ion implatation and dosage are respectively: 40 ~ 60KeV, 1E12 ~ 3E12cm -2, energy and the dosage of O +ion implanted are respectively: 50 ~ 70KeV, 2E12 ~ 6E12cm -2.Then anneal under 400 ~ 550 DEG C of conditions.

Claims (3)

1. have the IGBT terminal structure of hole combination layer, its structure comprises the IGBT terminal structure be connected with IGBT active area, and described IGBT terminal structure comprises N -drift region (7), N-type resilient coating (8), P +collector region (9), metal collector (10), P type equipotential ring (12), P type field limiting ring (14) and N +cut-off ring (20); Wherein N-type resilient coating (8) is positioned at N -drift region (7) and P +between collector region (9), P +collector region (9) is positioned between N-type resilient coating (8) and metal collector (10); Described P type equipotential ring (12) is positioned at the N near IGBT active area -in drift region (7), there is in P type equipotential ring (12) P of equipotential ring +contact zone (11), the P of described equipotential ring +contact zone (11) realizes the equipotential link with metal emitting in IGBT active area by metal connecting line; Described N +cut-off ring (20) is positioned at the N away from IGBT active area -in drift region (7); P type equipotential ring (12) and N +n between cut-off ring (20) -there is in drift region (7) some P type field limiting rings (14); P type equipotential ring (12), P type field limiting ring (14), N +cut-off ring (20) and N -the surface of drift region (7) has field oxide (16), field oxide (16) surface and P type equipotential ring (12), P type field limiting ring (14) and N +the position of cut-off ring (20) correspondence has Metal field plate (13,15,18 and 19) respectively; In described P type equipotential ring (12), also have hole combination layer (21), by the carbon ion be injected in P type equipotential ring (12) and oxonium ion, the annealing in process under 400 ~ 550 DEG C of temperature conditions formed described hole combination layer (21).
2. there is the preparation method of the IGBT terminal structure of hole combination layer, comprise following processing step: in IGBT manufacturing process, at terminal N -utilize boron to inject in drift region (7) and push away after trap technique forms P type equipotential ring (12) and P type field limiting ring (14) respectively, in P type equipotential ring (12), carry out carbon ion and O +ion implanted, the annealing in process then under 400 ~ 550 DEG C of temperature conditions forms the hole combination layer (21) in P type equipotential ring (12).
3. the preparation method with the IGBT terminal structure of hole combination layer according to claim 2, is characterized in that, energy and the dosage of described carbon ion implatation are respectively: 40 ~ 60KeV, 1E12 ~ 3E12cm -2, energy and the dosage of described O +ion implanted are respectively: 50 ~ 70KeV, 2E12 ~ 6E12cm -2.
CN201310422648.3A 2013-09-17 2013-09-17 IGBT terminal structure with hole combination layer and preparation method thereof Expired - Fee Related CN103489909B (en)

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CN102832240A (en) * 2012-09-11 2012-12-19 电子科技大学 Insulated gate bipolar transistor with dielectric layer at collector terminal

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