CN103488221B - Output voltage control circuit - Google Patents
Output voltage control circuit Download PDFInfo
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- CN103488221B CN103488221B CN201310404558.1A CN201310404558A CN103488221B CN 103488221 B CN103488221 B CN 103488221B CN 201310404558 A CN201310404558 A CN 201310404558A CN 103488221 B CN103488221 B CN 103488221B
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Abstract
The invention discloses an output voltage control circuit. The output voltage control circuit has the advantages that information of whether two voltage stabilizing chips work or not is inputted into logic signal control circuits, so that different output voltages can be provided for a system under different conditions; power of a power supply can be saved for the system while normal running of the system is guaranteed; the output voltage control circuit is simple in structure and easy to implement, and conversion of the output voltages can be accurately controlled.
Description
Technical field
The present invention relates to circuit engineering field, particularly relate to a kind of output voltage controlling circuit.
Background technology
At present, along with the renewal day by day of product, efficient power management is one of key factor becoming circuit design.
Because system is under different operating state, be different to the demand of voltage.Such as, when needs process mass data time, use the voltage that amplitude is higher, when calculated amount is little, or when being under holding state, the voltage that amplitude is lower can be used.
If power supply provides high voltage always, then may cause the waste of electricity.If provide low voltage always, then can run by influential system, cannot extensive calculation process be carried out.
Therefore, now on the design field of power-efficient, one of them is exactly must provide different output voltages for the different operating situation of system, to realize while guarantee system is normally run, for system saves electric quantity of power supply.
Summary of the invention
The embodiment of the present invention provides a kind of output voltage controlling circuit, for realizing while guarantee system is normally run, for system saves electric quantity of power supply.
A kind of output voltage controlling circuit, it is characterized in that, comprising: the first voltage input end mouth (11), the second voltage input end mouth (12), the first logic input terminal mouth (13), the second logic input terminal mouth (14) and voltage output end mouth (15), the first voltage stabilizing chip (16), the second voltage stabilizing chip (17), the first logic control circuit (18) and the second logic control circuit (19);
First port of described first voltage stabilizing chip (16) is connected with described first voltage input end mouth (11), and the second port of described first voltage stabilizing chip (16) is connected with the five-port of the first logic control circuit (18); 3rd port of described first voltage stabilizing chip (16) is connected with described voltage output end mouth (15);
First port of described second voltage stabilizing chip (17) is connected with described second voltage input end mouth (12), and the second port of described second voltage stabilizing chip (17) is connected with the five-port of described second logic control circuit (19); 3rd port of described second voltage stabilizing chip (17) is connected with described voltage output end mouth (15);
First port of described first logic control circuit (18) is connected with described first voltage input end mouth (11), second port of described first logic control circuit (18) is connected with described second voltage input end mouth (12), 3rd port of described first logic control circuit (18) is connected with described first logic input terminal mouth (13), the 4th port ground connection of described first logic control circuit (18);
First port of described second logic control circuit (19) is connected with the first voltage input end mouth (11), second port of described second logic control circuit (19) is connected with described second voltage input end mouth (12), 3rd port of described second logic control circuit (19) is connected with described second logic input terminal mouth (14), the 4th port ground connection of described second logic control circuit (19);
Wherein, described first logic control circuit (18), by the first logic input terminal mouth (13) receive logic control signal, controls the whether conducting of described first voltage stabilizing chip (16) according to the logic control signal that receives; Described second logic control circuit (19), by the second logic input terminal mouth (14) receive logic control signal, controls the whether conducting of described second voltage stabilizing chip (17) according to the logic control signal that receives; When described first voltage stabilizing chip (16) or described second voltage stabilizing chip (17) conducting, output voltage is to described voltage output end (15).
Preferably, described first logic control circuit (18) comprising: the first resistance (181), the second resistance (182), the 3rd resistance (183) and the first triode (184);
Described first resistance (181) one end is connected with described first voltage input end mouth (11), and described first resistance (181) other end is connected with the five-port of described first logic control circuit (18); Described second resistance (182) one end is connected with described first logic input terminal mouth (13), and described second resistance (182) other end is connected with the base stage of described first triode (184); One end of described 3rd resistance (183) is connected with described second voltage input end (12), and described 3rd resistance (183) other end is connected with described first logic input terminal mouth (13); The collector of described first triode (184) is connected with the five-port of described first logic control circuit (18), the grounded emitter of described first triode (184).
Preferably, described second logic control circuit (19) comprising: the 4th resistance (191), the 5th resistance (192), the 6th resistance (193) and the second triode (194);
Described 4th resistance (191) one end is connected with described first voltage input end mouth (11), and described 4th resistance (191) other end is connected with the five-port of described second logic control circuit (19); Described 5th resistance (192) one end is connected with described second logic input terminal mouth (14), and described 5th resistance (192) other end is connected with the base stage of described second triode (194); One end of described 6th resistance (193) is connected with described second voltage input end (12), and described 6th resistance (193) other end is connected with described second logic input terminal mouth (14); The collector of described second triode (194) is connected with the five-port of described second logic control circuit (19), the grounded emitter of described second triode (194).
Whether the output voltage controlling circuit of the present embodiment, worked by two voltage stabilizing chips in input logic signal control circuit, with in varied situations for system provides different output voltages.Realize while guarantee system is normally run, for system saves electric quantity of power supply.And circuit structure is simple, realize easily, more adequately to control the conversion of output voltage.
Other features and advantages of the present invention will be set forth in the following description, and, partly become apparent from instructions, or understand by implementing the present invention.Object of the present invention and other advantages realize by structure specifically noted in write instructions, claims and accompanying drawing and obtain.
Below by drawings and Examples, technical scheme of the present invention is described in further detail.
Accompanying drawing explanation
Accompanying drawing is used to provide a further understanding of the present invention, and forms a part for instructions, together with embodiments of the present invention for explaining the present invention, is not construed as limiting the invention.In the accompanying drawings:
Fig. 1 is the structural representation of output voltage controlling circuit in the embodiment of the present invention;
Fig. 2 is the electrical block diagram of the first logic control circuit in the embodiment of the present invention;
Fig. 3 is the electrical block diagram of the second logic control circuit in the embodiment of the present invention.
Embodiment
Below in conjunction with accompanying drawing, the preferred embodiments of the present invention are described, should be appreciated that preferred embodiment described herein is only for instruction and explanation of the present invention, is not intended to limit the present invention.
Because system is under different operating state, be different to the demand of voltage.The invention provides a kind of conversion that can realize simply, quickly and accurately electric power output voltage.
As shown in Figure 1, the output voltage controlling circuit of the embodiment of the present invention, comprising:
First voltage input end mouth 11, second voltage input end mouth 12, first logic input terminal mouth 13, second logic input terminal mouth 14 and voltage output end mouth 15, first voltage stabilizing chip 16, second voltage stabilizing chip 17, first logic control circuit 18 and the second logic control circuit 19.
First port P61 of the first voltage stabilizing chip 16 is connected with the first voltage input end mouth 11, and the second port P62 of the first voltage stabilizing chip 16 is connected with the five-port P85 of the first logic control circuit 18; 3rd port P63 of the first voltage stabilizing chip 16 is connected with voltage output end mouth 15;
First port P71 of the second voltage stabilizing chip 17 is connected with the second voltage input end mouth 12, and the second port P72 of the second voltage stabilizing chip 17 is connected with the five-port P95 of the second logic control circuit 19; 3rd port P73 of the second voltage stabilizing chip 17 is connected with voltage output end mouth 15;
First port P81 of the first logic control circuit 18 is connected with the first voltage input end mouth 11, second port P82 of the first logic control circuit 18 is connected with the second voltage input end mouth 12,3rd port P83 of the first logic control circuit 18 is connected with the first logic input terminal mouth 13, the 4th port P84 ground connection of the first logic control circuit 18;
First port P91 of the second logic control circuit 19 is connected with the first voltage input end mouth 11, second port P92 of the second logic control circuit 19 is connected with the second voltage input end mouth 12,3rd port P93 of the second logic control circuit 19 is connected with the second logic input terminal mouth 14, the 4th port P94 ground connection of the second logic control circuit 19;
Wherein, the first logic control circuit 18, by the first logic input terminal mouth 13 receive logic control signal, controls the whether conducting of the first voltage stabilizing chip 16 according to the logic control signal received; Second logic control circuit 19, by the second logic input terminal mouth 14 receive logic control signal, controls the whether conducting of the second voltage stabilizing chip 17 according to the logic control signal received; When the first voltage stabilizing chip 16 or the second voltage stabilizing chip 17 conducting, output voltage is to voltage output end 15.
Preferably, as shown in Figure 2, the first logic control circuit 18 comprises: the first resistance 181, second resistance 182, the 3rd resistance 183 and the first triode 184.
First resistance 181 one end is connected with the first voltage input end mouth 11, and first resistance 181 other end is connected with the five-port of the first logic control circuit 18; Second resistance 182 one end is connected with the first logic input terminal mouth 13, and second resistance 182 other end is connected with the base stage of the first triode 184; One end of 3rd resistance 183 is connected with the second voltage input end 12, and the 3rd resistance 183 other end is connected with the first logic input terminal mouth 13; The collector of the first triode 184 is connected with the five-port of the first logic control circuit 18, the grounded emitter of the first triode 184.
Preferably, as shown in Figure 3, the second logic control circuit 19 comprises: the 4th resistance 191, the 5th resistance 192, the 6th resistance 193 and the second triode 194.
4th resistance 191 one end is connected with the first voltage input end mouth 11, and the 4th resistance 191 other end is connected with the five-port of the second logic control circuit 19; 5th resistance 192 one end is connected with the second logic input terminal mouth 14, and the 5th resistance 192 other end is connected with the base stage of the second triode 194; One end of 6th resistance 193 is connected with the second voltage input end 12, and the 6th resistance 193 other end is connected with the second logic input terminal mouth 14; The collector of the second triode 194 is connected with the five-port of the second logic control circuit 19, the grounded emitter of the second triode 194.
Below the specific works principle of the output voltage controlling circuit of the embodiment of the present invention is described.
Under different operating state, the demand of system to voltage is different.System can be operated in two kinds of voltage modes, 3.3V and 5V, when needs process mass data time, uses 5V voltage, when calculated amount is little, or when being under holding state, uses 3.3V voltage.
Arranging logic control signal is 0 or 1, controls one of them conducting in 2 voltage stabilizing chips respectively, provides the voltage of corresponding amplitude.
In the present embodiment, the first voltage input end mouth 11 input voltage is 5V, and the second voltage input end mouth 12 input voltage is 3.3V.
As shown in table 1 below, be 1 when the first logic input terminal mouth 13 receive logic control signal is the logic control signal that the 0, second logic input terminal mouth 14 receives.Be equivalent to provide a low level in the base stage of the first triode 184, first triode 184 is opened, collector, the emitter current of the first triode 184 are 0, are equivalent to the off-state of switch between collector and emitter, and the first triode 184 works in cut-off region; There is provided a high level in the base stage of the second triode 194, the second triode 194 closes, and the collector and emitter of the second triode 194 has electric current, is equivalent to the conducting state of switch between collector and emitter, and the second triode 194 works in saturation region.
Because the first triode 184 works in cut-off region, at the second port P62 of the first voltage stabilizing chip 16, obtain a high level by the first resistance 181, make the first voltage stabilizing chip 16 conducting; And the second triode 194 works in saturation region, due to the shunting of triode, make to obtain a low level at the second port P72 of the second voltage stabilizing chip 17, the second voltage stabilizing chip 17 is closed.Therefore, the voltage exported at voltage output end mouth 15 is 5V.
In like manner, when the first logic input terminal mouth 13 receive logic control signal be logic control signal that the 1, second logic input terminal mouth 14 receives is 0, be equivalent to provide a high level in the base stage of the first triode 184, the first triode 184 closes; There is provided a low level in the base stage of the second triode 194, the second triode 194 is opened.First voltage stabilizing chip 16 is closed, the second voltage stabilizing chip 17 conducting, the voltage exported at voltage output end mouth 15 is 3.3V.
Table 1
| First logic input terminal mouth | Second logic input terminal mouth | Voltage output end |
| 0 | 1 | 5V |
| 1 | 0 | 3.3V |
Whether the output voltage controlling circuit of the embodiment of the present invention, worked by two voltage stabilizing chips in input logic signal control circuit, with in varied situations for system provides different output voltages.Realize while guarantee system is normally run, for system saves electric quantity of power supply.And circuit structure is simple, realize easily, more adequately to control the conversion of output voltage.
Obviously, those skilled in the art can carry out various change and modification to the present invention and not depart from the spirit and scope of the present invention.Like this, if these amendments of the present invention and modification belong within the scope of the claims in the present invention and equivalent technologies thereof, then the present invention is also intended to comprise these change and modification.
Claims (1)
1. an output voltage controlling circuit, it is characterized in that, comprising: the first voltage input end mouth (11), the second voltage input end mouth (12), the first logic input terminal mouth (13), the second logic input terminal mouth (14) and voltage output end mouth (15), the first voltage stabilizing chip (16), the second voltage stabilizing chip (17), the first logic control circuit (18) and the second logic control circuit (19);
First port of described first voltage stabilizing chip (16) is connected with described first voltage input end mouth (11), and the second port of described first voltage stabilizing chip (16) is connected with the five-port of the first logic control circuit (18); 3rd port of described first voltage stabilizing chip (16) is connected with described voltage output end mouth (15);
First port of described second voltage stabilizing chip (17) is connected with described second voltage input end mouth (12), and the second port of described second voltage stabilizing chip (17) is connected with the five-port of described second logic control circuit (19); 3rd port of described second voltage stabilizing chip (17) is connected with described voltage output end mouth (15);
First port of described first logic control circuit (18) is connected with described first voltage input end mouth (11), second port of described first logic control circuit (18) is connected with described second voltage input end mouth (12), 3rd port of described first logic control circuit (18) is connected with described first logic input terminal mouth (13), the 4th port ground connection of described first logic control circuit (18);
First port of described second logic control circuit (19) is connected with the first voltage input end mouth (11), second port of described second logic control circuit (19) is connected with described second voltage input end mouth (12), 3rd port of described second logic control circuit (19) is connected with described second logic input terminal mouth (14), the 4th port ground connection of described second logic control circuit (19);
Wherein, described first logic control circuit (18), by the first logic input terminal mouth (13) receive logic control signal, controls the whether conducting of described first voltage stabilizing chip (16) according to the logic control signal that receives; Described second logic control circuit (19), by the second logic input terminal mouth (14) receive logic control signal, controls the whether conducting of described second voltage stabilizing chip (17) according to the logic control signal that receives; When described first voltage stabilizing chip (16) or described second voltage stabilizing chip (17) conducting, output voltage is to described voltage output end mouth (15);
Described first logic control circuit (18) comprising: the first resistance (181), the second resistance (182), the 3rd resistance (183) and the first triode (184);
Described first resistance (181) one end is connected with described first voltage input end mouth (11), and described first resistance (181) other end is connected with the five-port of described first logic control circuit (18); Described second resistance (182) one end is connected with described first logic input terminal mouth (13), and described second resistance (182) other end is connected with the base stage of described first triode (184); One end of described 3rd resistance (183) is connected with described second voltage input end mouth (12), and described 3rd resistance (183) other end is connected with described first logic input terminal mouth (13); The collector of described first triode (184) is connected with the five-port of described first logic control circuit (18), the grounded emitter of described first triode (184);
Described second logic control circuit (19) comprising: the 4th resistance (191), the 5th resistance (192), the 6th resistance (193) and the second triode (194);
Described 4th resistance (191) one end is connected with described first voltage input end mouth (11), and described 4th resistance (191) other end is connected with the five-port of described second logic control circuit (19); Described 5th resistance (192) one end is connected with described second logic input terminal mouth (14), and described 5th resistance (192) other end is connected with the base stage of described second triode (194); One end of described 6th resistance (193) is connected with described second voltage input end mouth (12), and described 6th resistance (193) other end is connected with described second logic input terminal mouth (14); The collector of described second triode (194) is connected with the five-port of described second logic control circuit (19), the grounded emitter of described second triode (194).
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| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201310404558.1A CN103488221B (en) | 2013-09-06 | 2013-09-06 | Output voltage control circuit |
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| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201310404558.1A CN103488221B (en) | 2013-09-06 | 2013-09-06 | Output voltage control circuit |
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| CN103488221A CN103488221A (en) | 2014-01-01 |
| CN103488221B true CN103488221B (en) | 2015-05-13 |
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| CN201310404558.1A Expired - Fee Related CN103488221B (en) | 2013-09-06 | 2013-09-06 | Output voltage control circuit |
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| WO2001050213A1 (en) * | 1999-12-30 | 2001-07-12 | Volterra Semiconductor Corporation | Switching regulator with multiple power transistor driving voltages |
| CN101064473A (en) * | 2006-04-26 | 2007-10-31 | 三美电机株式会社 | Gleichstrom/gleichstrom-wandler vom typ mit multiausgang |
| CN102591391A (en) * | 2011-01-10 | 2012-07-18 | 英飞凌科技股份有限公司 | Voltage regulator |
| CN102957886A (en) * | 2012-11-13 | 2013-03-06 | 广东长虹电子有限公司 | System and method for controlling television set backlight |
| CN103218003A (en) * | 2013-04-26 | 2013-07-24 | 无锡中星微电子有限公司 | Low-dropout voltage stabilizer with multiple power sources input |
| CN203444379U (en) * | 2013-09-06 | 2014-02-19 | 天脉聚源(北京)传媒科技有限公司 | Output voltage control circuit |
-
2013
- 2013-09-06 CN CN201310404558.1A patent/CN103488221B/en not_active Expired - Fee Related
Patent Citations (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| WO2001050213A1 (en) * | 1999-12-30 | 2001-07-12 | Volterra Semiconductor Corporation | Switching regulator with multiple power transistor driving voltages |
| CN101064473A (en) * | 2006-04-26 | 2007-10-31 | 三美电机株式会社 | Gleichstrom/gleichstrom-wandler vom typ mit multiausgang |
| CN102591391A (en) * | 2011-01-10 | 2012-07-18 | 英飞凌科技股份有限公司 | Voltage regulator |
| CN102957886A (en) * | 2012-11-13 | 2013-03-06 | 广东长虹电子有限公司 | System and method for controlling television set backlight |
| CN103218003A (en) * | 2013-04-26 | 2013-07-24 | 无锡中星微电子有限公司 | Low-dropout voltage stabilizer with multiple power sources input |
| CN203444379U (en) * | 2013-09-06 | 2014-02-19 | 天脉聚源(北京)传媒科技有限公司 | Output voltage control circuit |
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| CN103488221A (en) | 2014-01-01 |
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Denomination of invention: A kind of output voltage controlling circuit Effective date of registration: 20170401 Granted publication date: 20150513 Pledgee: Silicon Valley Bank Co.,Ltd. Pledgor: TVMINING (BEIJING) MEDIA TECHNOLOGY Co.,Ltd. Registration number: 2017310000019 |
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Granted publication date: 20150513 Termination date: 20210906 |