CN103488222B - Output voltage control circuit - Google Patents

Output voltage control circuit Download PDF

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Publication number
CN103488222B
CN103488222B CN201310404696.XA CN201310404696A CN103488222B CN 103488222 B CN103488222 B CN 103488222B CN 201310404696 A CN201310404696 A CN 201310404696A CN 103488222 B CN103488222 B CN 103488222B
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China
Prior art keywords
control circuit
voltage
port
logic control
resistance
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Expired - Fee Related
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CN201310404696.XA
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Chinese (zh)
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CN103488222A (en
Inventor
王羽
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TVMining Beijing Media Technology Co Ltd
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TVMining Beijing Media Technology Co Ltd
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Priority to CN201310404696.XA priority Critical patent/CN103488222B/en
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Abstract

The invention discloses an output voltage control circuit. The output voltage control circuit has the advantages that information of whether two voltage stabilizing chips work or not is inputted into logic signal control circuits, so that different output voltages can be provided for a system under different conditions; power of a power supply can be saved for the system while normal running of the system is guaranteed; the output voltage control circuit is simple in structure and easy to implement, and conversion of the output voltages can be accurately controlled.

Description

A kind of output voltage controlling circuit
Technical field
The present invention relates to circuit engineering field, particularly relate to a kind of output voltage controlling circuit.
Background technology
At present, along with the renewal day by day of product, efficient power management is one of key factor becoming circuit design.
Because system is under different operating state, be different to the demand of voltage.Such as, when needs process mass data time, use the voltage that amplitude is higher, when calculated amount is little, or when being under holding state, the voltage that amplitude is lower can be used.
If power supply provides high voltage always, then may cause the waste of electricity.If provide low voltage always, then can run by influential system, cannot extensive calculation process be carried out.
Therefore, now on the design field of power-efficient, one of them is exactly must provide different output voltages for the different operating situation of system, to realize while guarantee system is normally run, for system saves electric quantity of power supply.
Summary of the invention
The embodiment of the present invention provides a kind of output voltage controlling circuit, for realizing while guarantee system is normally run, for system saves electric quantity of power supply.
A kind of output voltage controlling circuit, it is characterized in that, comprising: the first voltage input end mouth (11), the second voltage input end mouth (12), logic input terminal mouth (13) and voltage output end mouth (14), the first voltage stabilizing chip (15), the second voltage stabilizing chip (16), the first logic control circuit (17) and the second logic control circuit (18);
First port of described first voltage stabilizing chip (15) is connected with described first voltage input end mouth (11), and the second port of described first voltage stabilizing chip (15) is connected with the five-port of the first logic control circuit (17); 3rd port of described first voltage stabilizing chip (15) is connected with described voltage output end mouth (14);
First port of described second voltage stabilizing chip (16) is connected with described second voltage input end mouth (12), and the second port of described second voltage stabilizing chip (16) is connected with the 4th port of described second logic control circuit (18); 3rd port of described second voltage stabilizing chip (15) is connected with described voltage output end mouth (14);
First port of described first logic control circuit (17) is connected with described first voltage input end mouth (11), second port of described first logic control circuit (17) is connected with described second voltage input end mouth (12), 3rd port of described first logic control circuit (17) is connected with described logic input terminal mouth (13), the 4th port ground connection of described first logic control circuit (17); The five-port of described first logic control circuit (17) is connected with the second port of described second logic control circuit (18);
First port of described second logic control circuit (18) is connected with the first voltage input end mouth (11), the 3rd port ground connection of described second logic control circuit (18);
Wherein, described first logic control circuit (17), when by described logic input terminal mouth (13) receive the first logic control signal time, control described first voltage stabilizing chip (15) conducting and output voltage to described voltage output end mouth (14); When by described logic input terminal mouth (13) receive the second logic control signal time, control described second voltage stabilizing chip (16) conducting by the second logical circuit (18) and output voltage to described voltage output end mouth (14).
Preferably, described first logic control circuit (17) comprising: the first resistance (171), the second resistance (172), the 3rd resistance (173) and the first triode (174);
Described first resistance (171) one end is connected with described first voltage input end mouth (11), and the other end of described first resistance (171) is connected with the five-port of described first logic control circuit (17); Described second resistance (172) one end is connected with described logic input terminal mouth (13), and described second resistance (172) other end is connected with the base stage of described first triode (174); One end of described 3rd resistance (173) is connected with described second voltage input end mouth (12), and the other end is connected with described logic input terminal mouth (13); The collector of described first triode (174) is connected with the five-port of described first logic control circuit (17), the grounded emitter of described first triode (174).
Preferably, described second logic control circuit (18) comprising: the 4th resistance (181), the 5th resistance (182) and the second triode (183);
One end (181) of described 4th resistance is connected with described first voltage input end mouth (11), and the other end of described 4th resistance is connected with the second port of described second voltage stabilizing chip (16); One end of described 5th resistance (182) is connected with the five-port of described first logic control circuit (17), and the other end of described 5th resistance (182) is connected with the base stage of described second triode (183); The collector of described second triode (183) is connected with the second port of described second voltage stabilizing chip (16), the grounded emitter of described second triode (183).
Whether the output voltage controlling circuit of the present embodiment, worked by two voltage stabilizing chips in input logic signal control circuit, with in varied situations for system provides different output voltages.Realize while guarantee system is normally run, for system saves electric quantity of power supply.And circuit structure is simple, realize easily, more adequately to control the conversion of output voltage.
Other features and advantages of the present invention will be set forth in the following description, and, partly become apparent from instructions, or understand by implementing the present invention.Object of the present invention and other advantages realize by structure specifically noted in write instructions, claims and accompanying drawing and obtain.
Below by drawings and Examples, technical scheme of the present invention is described in further detail.
Accompanying drawing explanation
Accompanying drawing is used to provide a further understanding of the present invention, and forms a part for instructions, together with embodiments of the present invention for explaining the present invention, is not construed as limiting the invention.In the accompanying drawings:
Fig. 1 is the structural representation of output voltage controlling circuit in the embodiment of the present invention;
Fig. 2 is the electrical block diagram of the first logic control circuit in the embodiment of the present invention;
Fig. 3 is the electrical block diagram of the second logic control circuit in the embodiment of the present invention.
Embodiment
Below in conjunction with accompanying drawing, the preferred embodiments of the present invention are described, should be appreciated that preferred embodiment described herein is only for instruction and explanation of the present invention, is not intended to limit the present invention.
Because system is under different operating state, be different to the demand of voltage.The invention provides a kind of conversion that can realize simply, quickly and accurately electric power output voltage.
As shown in Figure 1, the output voltage controlling circuit of the embodiment of the present invention, comprising:
First voltage input end mouth 11, second voltage input end mouth 12, logic input terminal mouth 13 and voltage output end mouth 14, first voltage stabilizing chip 15, second voltage stabilizing chip 16, first logic control circuit 17 and the second logic control circuit 18.
First port P51 of the first voltage stabilizing chip 15 is connected with the first voltage input end mouth 11, and the second port P52 of the first voltage stabilizing chip 15 is connected with the five-port P75 of the first logic control circuit 17; 3rd port P53 of the first voltage stabilizing chip 15 is connected with voltage output end mouth 14.
First port P61 of the second voltage stabilizing chip 16 is connected with the second voltage input end mouth 12, and the second port P62 of the second voltage stabilizing chip 16 is connected with the 4th port P84 of the second logic control circuit 18; 3rd port P63 of the second voltage stabilizing chip 15 is connected with voltage output end mouth 14.
First port P71 of the first logic control circuit 17 is connected with the first voltage input end mouth 11, second port P72 of the first logic control circuit 17 is connected with the second voltage input end mouth 12,3rd port P73 of the first logic control circuit 17 is connected with logic input terminal mouth 13, the 4th port P74 ground connection of the first logic control circuit 17; The five-port P75 of the first logic control circuit 17 is connected with the second port P82 of the second logic control circuit 18.
First port P81 of the second logic control circuit 18 is connected with the first voltage input end mouth 11, the 3rd port P83 ground connection of the second logic control circuit 18.
Wherein, the first logic control circuit 17, when receiving the first logic control signal by logic input terminal mouth 13, control the first voltage stabilizing chip 15 conducting and output voltage to voltage output end mouth 14; When receiving the second logic control signal by logic input terminal mouth 13, control the second voltage stabilizing chip 16 conducting by the second logic control circuit 18 and output voltage to voltage output end mouth 14.
Preferably, as shown in Figure 2, the first logic control circuit 17 comprises: the first resistance 171, second resistance 172, the 3rd resistance 173 and the first triode 174.
First resistance 171 one end is connected with the first voltage input end mouth 11, and the other end of the first resistance 171 is connected with the five-port of the first logic control circuit 17; Second resistance 172 one end is connected with logic input terminal mouth 13, and the other end of the second resistance 172 is connected with the base stage of the first triode 174; One end of 3rd resistance 173 is connected with the second voltage input end mouth 12, and the other end of the 3rd resistance 173 is connected with logic input terminal mouth 13; The collector of the first triode 174 is connected with the five-port of the first logic control circuit 17, the grounded emitter of the first triode 174.
Preferably, as shown in Figure 3, the second logic control circuit 18 comprises: the 4th resistance 181, the 5th resistance 182 and the second triode 183.
One end of 4th resistance 181 is connected with the first voltage input end mouth 11, and the other end of the 4th resistance 181 is connected with the second port of the second voltage stabilizing chip 16; One end of 5th resistance 182 is connected with the five-port of the first logic control circuit 17, and the 5th resistance 182 other end is connected with the base stage of the second triode 183; The collector of the second triode 183 is connected with the second port of the second voltage stabilizing chip 16, the grounded emitter of the second triode 183.
Below the specific works principle of the output voltage controlling circuit of the embodiment of the present invention is described.
Under different operating state, the demand of system to voltage is different.System can be operated in two kinds of voltage modes, 3.3V and 5V, when needs process mass data time, uses 5V voltage, when calculated amount is little, or when being under holding state, uses 3.3V voltage.
Arranging logic control signal is 0 or 1, controls one of them conducting in 2 voltage stabilizing chips respectively, provides the voltage of corresponding amplitude.
In the present embodiment, first voltage input end mouth 11 input voltage is 5V, second voltage input end mouth 12 input voltage is 3.3V, logic input terminal mouth 13 receive logic control signal 0 or 1, the result output voltage that voltage output end mouth 14 controls according to logic control signal.
As shown in table 1 below, when logic control signal is 0, be equivalent to when the first transistor base provides a low level, first triode 174 is opened, and the second triode 183 closes, and makes the first voltage stabilizing chip 15 conducting, second voltage stabilizing chip 16 is closed, and output voltage is 5V.When logic control signal is 1, be equivalent to when the first transistor base provides a high level, the first triode 174 closes, and the second triode 183 is opened, and the first voltage stabilizing chip 15 is closed, and the second voltage stabilizing chip 16 conducting, output voltage is 3.3V.
Table 1
Logic control signal Output voltage
0 5V
1 3.3V
Whether the output voltage controlling circuit of the embodiment of the present invention, worked by two voltage stabilizing chips in input logic signal control circuit, with in varied situations for system provides different output voltages.Realize while guarantee system is normally run, for system saves electric quantity of power supply.And circuit structure is simple, realize easily, more adequately to control the conversion of output voltage.
Obviously, those skilled in the art can carry out various change and modification to the present invention and not depart from the spirit and scope of the present invention.Like this, if these amendments of the present invention and modification belong within the scope of the claims in the present invention and equivalent technologies thereof, then the present invention is also intended to comprise these change and modification.

Claims (3)

1. an output voltage controlling circuit, it is characterized in that, comprising: the first voltage input end mouth (11), the second voltage input end mouth (12), logic input terminal mouth (13) and voltage output end mouth (14), the first voltage stabilizing chip (15), the second voltage stabilizing chip (16), the first logic control circuit (17) and the second logic control circuit (18);
First port of described first voltage stabilizing chip (15) is connected with described first voltage input end mouth (11), and the second port of described first voltage stabilizing chip (15) is connected with the five-port of the first logic control circuit (17); 3rd port of described first voltage stabilizing chip (15) is connected with described voltage output end mouth (14);
First port of described second voltage stabilizing chip (16) is connected with described second voltage input end mouth (12), and the second port of described second voltage stabilizing chip (16) is connected with the 4th port of described second logic control circuit (18); 3rd port of described second voltage stabilizing chip (16) is connected with described voltage output end mouth (14);
First port of described first logic control circuit (17) is connected with described first voltage input end mouth (11), second port of described first logic control circuit (17) is connected with described second voltage input end mouth (12), 3rd port of described first logic control circuit (17) is connected with described logic input terminal mouth (13), the 4th port ground connection of described first logic control circuit (17); The five-port of described first logic control circuit (17) is connected with the second port of described second logic control circuit (18);
First port of described second logic control circuit (18) is connected with the first voltage input end mouth (11), the 3rd port ground connection of described second logic control circuit (18);
Wherein, described first logic control circuit (17), when by described logic input terminal mouth (13) receive the first logic control signal time, control described first voltage stabilizing chip (15) conducting and output voltage to described voltage output end mouth (14); When by described logic input terminal mouth (13) receive the second logic control signal time, control described second voltage stabilizing chip (16) conducting by the second logic control circuit (18) and output voltage to described voltage output end mouth (14).
2. circuit according to claim 1, it is characterized in that, described first logic control circuit (17) comprising: the first resistance (171), the second resistance (172), the 3rd resistance (173) and the first triode (174);
Described first resistance (171) one end is connected with described first voltage input end mouth (11), and the other end of described first resistance (171) is connected with the five-port of described first logic control circuit (17); Described second resistance (172) one end is connected with described logic input terminal mouth (13), and described second resistance (172) other end is connected with the base stage of described first triode (174); One end of described 3rd resistance (173) is connected with described second voltage input end mouth (12), and the other end is connected with described logic input terminal mouth (13); The collector of described first triode (174) is connected with the five-port of described first logic control circuit (17), the grounded emitter of described first triode (174).
3. circuit according to claim 1, is characterized in that, described second logic control circuit (18) comprising: the 4th resistance (181), the 5th resistance (182) and the second triode (183);
One end (181) of described 4th resistance is connected with described first voltage input end mouth (11), and the other end of described 4th resistance (181) is connected with the second port of described second voltage stabilizing chip (16); One end of described 5th resistance (182) is connected with the five-port of described first logic control circuit (17), and the other end of described 5th resistance (182) is connected with the base stage of described second triode (183); The collector of described second triode (183) is connected with the second port of described second voltage stabilizing chip (16), the grounded emitter of described second triode (183).
CN201310404696.XA 2013-09-06 2013-09-06 Output voltage control circuit Expired - Fee Related CN103488222B (en)

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Application Number Priority Date Filing Date Title
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Application Number Priority Date Filing Date Title
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Family Cites Families (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
TWI339481B (en) * 2007-01-29 2011-03-21 Chimei Innolux Corp Power supplying and discharging circuit
CN101373394A (en) * 2007-08-20 2009-02-25 鸿富锦精密工业(深圳)有限公司 Power supply control signal generating apparatus
CN101470502B (en) * 2007-12-26 2011-09-28 鸿富锦精密工业(深圳)有限公司 Power supply adaptation circuit
CN202374353U (en) * 2011-10-09 2012-08-08 Tcl集团股份有限公司 Television and motherboard power supply short-circuit detection circuit thereof
CN203014994U (en) * 2012-11-13 2013-06-19 广东长虹电子有限公司 System for controlling television set backlight
CN103218003B (en) * 2013-04-26 2015-06-10 无锡中星微电子有限公司 Low-dropout voltage stabilizer with multiple power sources input
CN203444376U (en) * 2013-09-06 2014-02-19 天脉聚源(北京)传媒科技有限公司 Output voltage control circuit

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Denomination of invention: A kind of output voltage controlling circuit

Effective date of registration: 20170401

Granted publication date: 20150610

Pledgee: Silicon Valley Bank Co.,Ltd.

Pledgor: TVMINING (BEIJING) MEDIA TECHNOLOGY Co.,Ltd.

Registration number: 2017310000019

CF01 Termination of patent right due to non-payment of annual fee
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Granted publication date: 20150610

Termination date: 20210906