CN103456652A - Mixed bonding implementation method - Google Patents
Mixed bonding implementation method Download PDFInfo
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- CN103456652A CN103456652A CN2013104203848A CN201310420384A CN103456652A CN 103456652 A CN103456652 A CN 103456652A CN 2013104203848 A CN2013104203848 A CN 2013104203848A CN 201310420384 A CN201310420384 A CN 201310420384A CN 103456652 A CN103456652 A CN 103456652A
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Abstract
The invention provides a mixed bonding implementation method. The mixed bonding implementation method comprises the following steps that 1, a media layer is deposited on the surface of a substrate, graphical processing is conducted on the media layer, and a graphical structure is obtained; 2, an adhesive layer and a seedling layer are deposited on the surface of the substrate, and the graphical structure is filled in an electroplated mode; 3, a mechanical scraping mode is adopted to process the surface of the substrate so as to enable the metal on the surface of the substrate and the surface of the media layer to be in the same plane; 4, by means of the method, the two manufactured layers of the substrates are opposite to each other so as to enable the metal on the surfaces of the two layers of the substrates and the media layers on the surfaces of the two layers of the substrates to be aligned with each other, and bonding of the two layers of the substrates is achieved through implementation of pressure and temperature conditions. The mixed bonding implementation method has the advantages that a mechanical scraping mode is adopted to process the surface of the substrate, the mixed bonding structure is obtained, the whole technical process does not need the CMP technique, and difficulty and cost of the mixed bonding technique are reduced.
Description
Technical field
The present invention relates to a kind of hybrid bonded implementation method, belong to technical field of manufacturing semiconductors.
Background technology
The conductivity bonding is the critical aspects in three-dimensional integration technology, it directly realizes two-layerly treating that the mechanical connection of bonded substrate is connected with electricity, generally pass through metal bonding, as the Cu-Cu bonding, or comprise the hybrid bonded of metal structure, hybrid bonded as copper and silica, or copper and polymer is hybrid bonded etc., realize, simple Cu-Cu bonding is difficult to obtain sufficiently high bond strength, and, in conjunction with the hybrid bonded bond strength that can effectively guarantee of silica or polymer, more and more be subject to industry and pay close attention to.Existing hybrid bonded method generally adopts the mode treatment surface of CMP, need to optimize the CMP process, comprise equipment control parameter and polishing fluid optimizing components etc., cost is high on the one hand, dishing effect is difficult to control on the other hand, be difficult to obtain metal structure consistent with the height on other bonding auxiliary material surfaces, affect bonding quality.
Summary of the invention
The objective of the invention is to overcome the deficiencies in the prior art, a kind of low cost is provided and holds manageable hybrid bonded implementation method, guarantee hybrid bonded effectively carrying out.
According to technical scheme provided by the invention, described hybrid bonded implementation method comprises the steps: that (1) is in the substrate surface metallization medium layer, and carries out graphical treatment, obtains patterned structures; (2) in substrate surface deposition of adhesion and Seed Layer, and electroplate and fill described patterned structures; (3) mode that adopts machinery to strike off, process substrate surface, makes substrate surface metal and dielectric layer surface in one plane; (4) make to adopt the two-layer substrate of above method making relative, two-layer substrate surface metal and dielectric layer are aimed at, and realized the bonding of two-layer substrate by exerting pressure with temperature conditions.
Described dielectric layer can be silica material or polymeric material.
Described polymeric material requires fully not curing before bonding, and curing ratio is no more than 60%.
The metal of described pattern filling structure is one or more combination in copper, nickel, tin, sn-ag alloy, SAC alloy.
Advantage of the present invention is: the mode that adopts machinery to strike off is processed substrate surface, obtains hybrid bonded structure, and whole technological process does not need CMP technique, reduces difficulty and the cost of hybrid bonded technique.
The accompanying drawing explanation
Shown in Fig. 1, be process chart corresponding to the embodiment of the present invention.
Fig. 2 is generalized section after embodiment of the present invention step 1 is processed.
Fig. 3 is generalized section after embodiment of the present invention step 2 is processed.
Fig. 4 is generalized section after embodiment of the present invention step 3 is processed.
Fig. 5 is generalized section after embodiment of the present invention step 4 two-layer substrate bonding.
Embodiment
Below in conjunction with drawings and Examples, the invention will be further described.
Be a process chart that embodiment is corresponding provided by the invention shown in Fig. 1, for better explanation the present invention, below describe in detail step by step.
(1) step 1: i.e. S1 shown in Fig. 1.As shown in Figure 2, the processing circuit layer 102 on Semiconductor substrate 101 surfaces, as transistor, diode, resistance, electric capacity, metal line etc., Semiconductor substrate 101 thickness are at 50 ~ 800 micrometer ranges, and circuit layer 102 thickness are at 0.5 ~ 5 micrometer range.On this basis, at described Semiconductor substrate 101 surface deposition dielectric layers 103, thickness surpasses 2 microns, and carries out graphical treatment, obtains patterned structures.Described dielectric layer 103 can be silica or polymeric material, while using silica material, and the preferred CVD mode of coprecipitation mode, the preferred dry etching of graphical treatment is as the mode of reactive ion etching; While using polymeric material (as polyimides, phenylpropyl alcohol cyclobutane, SU8 etc.), the preferred spin coating mode of depositional mode, the mode of the preferred photoetching development of graphical treatment.If the employing polymeric material, this polymeric material is before step 4 bonding, and fully not curing, curing ratio is no more than 60%.
(2) step 2: i.e. S2 shown in Fig. 1.As shown in Figure 3, substrate 101 surfaces that complete in step 1 are deposition of adhesion, Seed Layer again, and implements electroplating technology, the patterned structures that adopts metal material 104 to fill in described dielectric layer, the mode that preferably copper is electroplated.Metal material 104 can adopt in copper, nickel, tin, sn-ag alloy, SAC alloy one or more combination.
(3) step 3: i.e. S3 shown in Fig. 1.The mode that adopts machinery to strike off is processed substrate 101 surfaces, after striking off, the dielectric layer 103 on substrate 101 surfaces also has certain thickness, residual thickness is over 1 micron, to guarantee the needs of electric insulation, after striking off processing in one plane, surface average roughness is less than 20 nanometers, as shown in Figure 4 for filling metal material 104 and dielectric layer 103 surfaces.Surface strikes off and can adopt the surface evening machine (Surface Planer) that Japanese Disco company provides to realize, it strikes off the rear surface roughness and can be controlled at below 20nm.
(4) step 4: i.e. S4 shown in Fig. 1.Two substrates that adopt above method to make are relative, two-layer substrate 101,201 surface metal materials and dielectric layer are aimed at mutually, and applied suitable temperature and pressure, realize the bonding of two-layer substrate.More specifically, use the temperature of 200 ~ 400 degrees centigrade, the bonding pressure that applies 0.05 ~ 0.5MPa carries out bonding; Before implementing bonding technology, treat bonded substrate and carry out surface treatment, as ultrasonic cleaning, plasma cleaning etc., remove surface particles and oxide layer, guarantees the bonded interface performance.
As shown in Figure 5, second layer substrate 201 has and the similar structure of substrate 101, comprises second layer substrate surface circuit layer 202, second layer substrate surface dielectric layer 203, second layer substrate surface metal material 204.Two-layer substrate surface metal material 104,204 is aimed at, and surface media 103,203 is aimed at.
Can see, the present invention possesses following features: the mode that adopts machinery to strike off is processed bonding surface; The mixed structure that the bonding structure surface comprises metal and dielectric layer composition.Like this, whole technological process does not need CMP technique, has reduced difficulty and the cost of hybrid bonded technique.
The foregoing is only a preferred embodiment of the present invention, not in order to limit the present invention.Within the spirit and principles in the present invention all, any modification of making, be equal to replacement, improvement etc., within all should being included in protection scope of the present invention.
Claims (5)
1. hybrid bonded implementation method, is characterized in that, comprises the steps:
In the substrate surface metallization medium layer, and carry out graphical treatment, obtain patterned structures;
In substrate surface deposition of adhesion and Seed Layer, and plated metal is filled described patterned structures;
The mode that adopts machinery to strike off, process substrate surface, makes substrate surface metal and dielectric layer surface in one plane;
Make to adopt the two-layer substrate of above method making relative, two-layer substrate surface metal and dielectric layer are aimed at, and realized the bonding of two-layer substrate by exerting pressure with temperature conditions.
2. hybrid bonded implementation method as claimed in claim 1, is characterized in that, described dielectric layer is silica material.
3. hybrid bonded implementation method as claimed in claim 1, is characterized in that, described dielectric layer is polymeric material.
4. hybrid bonded implementation method as claimed in claim 3, is characterized in that, described polymeric material is fully not curing before bonding, and curing ratio is no more than 60%.
5. hybrid bonded implementation method as claimed in claim 1, is characterized in that, the metal of described pattern filling structure is one or more combination in copper, nickel, tin, sn-ag alloy, SAC alloy.
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| CN2013104203848A CN103456652A (en) | 2013-09-13 | 2013-09-13 | Mixed bonding implementation method |
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| CN2013104203848A CN103456652A (en) | 2013-09-13 | 2013-09-13 | Mixed bonding implementation method |
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Cited By (13)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN103762197A (en) * | 2013-12-24 | 2014-04-30 | 华进半导体封装先导技术研发中心有限公司 | Method for manufacturing novel Damascus copper and copper bonding structure |
| CN104167372A (en) * | 2014-08-08 | 2014-11-26 | 武汉新芯集成电路制造有限公司 | Mixed bonding method |
| CN104752239A (en) * | 2013-12-31 | 2015-07-01 | 中芯国际集成电路制造(上海)有限公司 | Semiconductor device, preparation method and packaging method |
| CN104821281A (en) * | 2014-01-30 | 2015-08-05 | 中芯国际集成电路制造(上海)有限公司 | Method for forming semiconductor device |
| CN104979226A (en) * | 2015-06-24 | 2015-10-14 | 武汉新芯集成电路制造有限公司 | Copper mixed bonding method |
| CN105006441A (en) * | 2015-06-24 | 2015-10-28 | 武汉新芯集成电路制造有限公司 | High-air-pressure thermal-annealing hybrid bonding method |
| CN105097427A (en) * | 2014-04-23 | 2015-11-25 | 中芯国际集成电路制造(上海)有限公司 | Method for monitoring pre-cleaning technology of metal intermediate layer before wafer bonding |
| CN105140144A (en) * | 2015-09-02 | 2015-12-09 | 武汉新芯集成电路制造有限公司 | Medium pressurized thermal annealing mixed bonding method |
| CN105502967A (en) * | 2014-10-17 | 2016-04-20 | 北京自动化控制设备研究所 | Quartz bonding method based on gold-tin co-crystal |
| CN107154450A (en) * | 2016-03-02 | 2017-09-12 | 映瑞光电科技(上海)有限公司 | A kind of multilayer bonding method for light emitting diode (LED) chip with vertical structure |
| CN109148261A (en) * | 2018-07-23 | 2019-01-04 | 上海集成电路研发中心有限公司 | A kind of hybrid bonded structure of autoregistration and preparation method thereof |
| CN109935568A (en) * | 2019-03-29 | 2019-06-25 | 长江存储科技有限责任公司 | Semiconductor devices and preparation method thereof |
| CN113299601A (en) * | 2021-05-21 | 2021-08-24 | 浙江集迈科微电子有限公司 | Wafer-level welding process for multilayer adapter plate |
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| CN102656110A (en) * | 2009-07-03 | 2012-09-05 | 法国原子能与替代能委员会 | Simplified copper-copper bonding |
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| CN1678708A (en) * | 2002-08-29 | 2005-10-05 | 微米技术有限公司 | Method and apparatus for chemically, mechanically, and/or electrolytically removing material from microelectronic substrates |
| US20070296073A1 (en) * | 2006-06-27 | 2007-12-27 | Taiwan Semiconductor Manufacturing Co., Ltd. | Three dimensional integrated circuit and method of making the same |
| US20090294916A1 (en) * | 2008-06-02 | 2009-12-03 | Hong Kong Applied Science and Technology Research Institute Company, Ltd. | Bonding method for through-silicon-via based 3d wafer stacking |
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Cited By (16)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN103762197B (en) * | 2013-12-24 | 2016-03-16 | 华进半导体封装先导技术研发中心有限公司 | The manufacture method of a kind of novel Damascus copper copper bonding structure |
| CN103762197A (en) * | 2013-12-24 | 2014-04-30 | 华进半导体封装先导技术研发中心有限公司 | Method for manufacturing novel Damascus copper and copper bonding structure |
| CN104752239A (en) * | 2013-12-31 | 2015-07-01 | 中芯国际集成电路制造(上海)有限公司 | Semiconductor device, preparation method and packaging method |
| CN104821281A (en) * | 2014-01-30 | 2015-08-05 | 中芯国际集成电路制造(上海)有限公司 | Method for forming semiconductor device |
| CN105097427A (en) * | 2014-04-23 | 2015-11-25 | 中芯国际集成电路制造(上海)有限公司 | Method for monitoring pre-cleaning technology of metal intermediate layer before wafer bonding |
| CN104167372A (en) * | 2014-08-08 | 2014-11-26 | 武汉新芯集成电路制造有限公司 | Mixed bonding method |
| CN105502967A (en) * | 2014-10-17 | 2016-04-20 | 北京自动化控制设备研究所 | Quartz bonding method based on gold-tin co-crystal |
| CN104979226A (en) * | 2015-06-24 | 2015-10-14 | 武汉新芯集成电路制造有限公司 | Copper mixed bonding method |
| CN105006441A (en) * | 2015-06-24 | 2015-10-28 | 武汉新芯集成电路制造有限公司 | High-air-pressure thermal-annealing hybrid bonding method |
| CN104979226B (en) * | 2015-06-24 | 2018-09-07 | 武汉新芯集成电路制造有限公司 | A kind of hybrid bonded method of copper |
| CN105140144A (en) * | 2015-09-02 | 2015-12-09 | 武汉新芯集成电路制造有限公司 | Medium pressurized thermal annealing mixed bonding method |
| CN107154450A (en) * | 2016-03-02 | 2017-09-12 | 映瑞光电科技(上海)有限公司 | A kind of multilayer bonding method for light emitting diode (LED) chip with vertical structure |
| CN109148261A (en) * | 2018-07-23 | 2019-01-04 | 上海集成电路研发中心有限公司 | A kind of hybrid bonded structure of autoregistration and preparation method thereof |
| CN109148261B (en) * | 2018-07-23 | 2021-03-02 | 上海集成电路研发中心有限公司 | Self-aligned hybrid bonding structure and manufacturing method thereof |
| CN109935568A (en) * | 2019-03-29 | 2019-06-25 | 长江存储科技有限责任公司 | Semiconductor devices and preparation method thereof |
| CN113299601A (en) * | 2021-05-21 | 2021-08-24 | 浙江集迈科微电子有限公司 | Wafer-level welding process for multilayer adapter plate |
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