CN103426839A - 半导体封装 - Google Patents

半导体封装 Download PDF

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CN103426839A
CN103426839A CN2013101969658A CN201310196965A CN103426839A CN 103426839 A CN103426839 A CN 103426839A CN 2013101969658 A CN2013101969658 A CN 2013101969658A CN 201310196965 A CN201310196965 A CN 201310196965A CN 103426839 A CN103426839 A CN 103426839A
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circuit board
semiconductor packages
semiconductor chip
heat dissipating
semiconductor
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CN103426839B (zh
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陈泰宇
李钟发
许文松
林世钦
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MediaTek Inc
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Abstract

本发明公开一种半导体封装。半导体封装包括：电路板，具有相对的第一表面与第二表面；半导体芯片，形成于所述电路板的所述第一表面的中央部分上，具有第一剖面尺寸；间隔物，形成于所述半导体芯片的中央部分上，具有小于所述第一剖面尺寸的第二剖面尺寸；包覆层，形成于所述电路板上，覆盖所述半导体芯片且环绕所述间隔物；散热层，形成于所述包覆层与所述间隔物上；以及多个锡球，形成于所述电路板的所述第二表面上。本发明所公开的半导体封装，可避免或至少降低翘曲问题的发生。

Description

半导体封装
技术领域
本发明有关于集成电路(integrated circuit，IC)装置，且特别是关于具有较少翘曲问题(reduced warpage problem)以及较佳热效能(improved thermal enhancement)的一种半导体封装。 
背景技术
一般的球栅阵列(ball grid array，BGA)半导体封装包括了安装于绝缘的印刷电路板(printed circuit board，PCB)的上表面的半导体芯片。印刷电路板可由如FR4板、FR5板、或双马来酰亚胺-三氮杂苯(bismaleimide triazine，BT)板的经玻璃纤维填充的有机堆叠物（organic laminate）所制成，且具有位于其上表面与下表面的内连导电线路图案（interconnected conductive circuit pattern）。在半导体芯片、基板上表面、以及延伸于半导体芯片与基板上表面的导电图案之间的导电物（electrical conductor）（例如，焊线）之上，则覆盖有固化的包覆材料(hardened encapsulating material)。在基板的下表面的导电图案上则形成有导电球状物（conductive ball）或其他的输入/输出端子。 
为了符合封装的更小与更薄的趋势，在如球栅阵列半导体封装所遇到的困难之一为，由于制造过程中的温度循环以及不同封装材料的热膨胀特性的差异（例如，基板与包覆材料间的热膨胀特性的差异）所造成的半导体封装的翘曲(warpage)情形。而在封装基板翘曲处，位于基板的下表面处的这些导电球状物或其他输入/输出端子(input/output terminals)将会不平整的。如此在安装半导体封装至主机板时将形成困难。而随着封装尺寸的增加，其翘曲程度随之增加，且因此限制了封装的尺寸的上限。另一期望则是，随着先进的晶圆制程节点的缩减与功率密度的增加，以提高封装的热表现。为了保持集成电路的功能与可靠度，集成电路的功率消耗需配合所使用封装的功率限制，而因此集成电路的功能复杂程度则将受限于此功率限制。 
发明内容
有鉴于此，本发明提供一种半导体封装。 
依据本发明一实施方式，提供一种半导体封装，包括：电路板，具有相对的第一表面与第二表面；半导体芯片，形成于所述电路板的所述第一表面的中央部分上，具有第一剖面尺寸；间隔物，形成于所述半导体芯片的中央部分上，具有小于所述第一剖面尺寸的第二剖面尺寸；包覆层，形成于所述电路板上，覆盖所述半导体芯片且环绕所述间隔物；散热层，形成于所述包覆层与所述间隔物上；以及多个锡球，形成于所述电路板的所述第二表面上。 
依据本发明另一实施方式，提供一种半导体封装，包括：电路板，具有相对的第一表面与第二表面；半导体芯片，形成于所述电路板的所述第一表面的中央部分上；加强板，形成于所述电路板的所述第一表面的边缘部分上，环绕所述半导体芯片；包覆层，形成于所述电路板上，覆盖所述半导体芯片且被所述加强板所环绕；散热层，形成于所述包覆层与所述加强板上；以及多个锡球，形成于所述电路板的所述第二表面上。 
依据本发明又一实施方式，提供一种半导体封装，包括：电路板，具有相对的第一表面与第二表面；半导体芯片，形成于所述电路板的所述第一表面的中央部分上；包覆层，形成于所述电路板上，覆盖所述半导体芯片；类U形散热层，形成于所述电路板上，包括覆盖所述包覆层顶面的第一部与埋设于所述包覆层内的第二部分；以及多个锡球，形成于所述电路板的所述第二表面上。 
本发明所提供的半导体封装，可避免或至少降低翘曲问题的发生。 
对于已经阅读后续由各附图及内容所显示的较佳实施方式的本领域的技术人员来说，本发明的各目的是明显的。 
附图说明
图1为依据本发明一实施例的半导体封装的剖视图。 
图2为如图1所示的半导体封装的俯视图。 
图3为依据本发明另一实施例的半导体封装的剖视图。 
图4为依据本发明又一实施例的半导体封装的剖视图。 
图5为如图4所示的半导体封装的俯视图。 
图6为依据本发明另一实施例的半导体封装的剖视图。 
图7为如图6所示的半导体封装的散热层的立体示意图。 
图8为如图6所示的半导体封装的俯视图。 
图9为适用于制作如图1、3、4、6所示的半导体封装的一种条状电路板的俯视图。 
具体实施方式
在权利要求书及说明书中使用了某些词汇来指称特定的组件。所属领域中的技术人员应可理解，硬件制造商可能会用不同的名词来称呼同样的组件。本权利要求书及说明书并不以名称的差异来作为区分组件的方式，而是以组件在功能上的差异来作为区分的准则。在权利要求书及说明书中所提及的「包括」为开放式的用语，故应解释成「包括但不限定于」。另外，「耦接」一词在此包括任何直接及间接的电气连接手段。因此，若文中描述第一装置耦接于第二装置，则代表所述第一装置可直接电连接于所述第二装置，或通过其他装置或连接手段间接地电连接至所述第二装置。 
图1为依据本发明的一实施例的具有较少翘曲问题的一种半导体封装10，其包括电路板12、半导体芯片20、间隔物(spacer)28、包覆层（encapsulant layer）30、散热层(heat spreading layer)32、以及多个导电球状物36。 
请参照图1，半导体芯片20为功能性芯片(functional chip)，如微处理器(microprocessor)芯片、存储器(memory)芯片或其他功能芯片，半导体芯片20具有主动的（active）第一表面22与非主动的（inactive）第二表面24。半导体芯片20的第一表面22包括位于邻近第一表面22的周边区处的多个输入/输出焊垫(input/output pad)A。半导体芯片20则可通过研磨（polishing）第二表面24而减薄。在一实施例中，半导体芯片20可具有约为2*10-6m/m-K～4*10-6m/m-K的热膨胀系数(coefficient of thermal expansion，CTE)。 
半导体芯片20通过第一粘着层18而安装于电路板12的中央部分。电路板12具有相对的第一表面14与第二表面16，而第一粘着层18与半导体芯片20依序形成于电路板12的第一表面14的中央部分上。电路板12主要由如BT板、FR4板、FR5板的树脂层(图未示)或其他的经玻璃纤维填充的有机(如环氧树脂)堆叠物类型的用于制造半导体封装的印刷电路板所制成。此外，在电路板12内还形成有多个导电线路与多个导电内连物(图未示)，进而形成了在半导体芯片20与导电球状物36之间的适当电性连结。在一实施例中，电路板12可具有约为4*10-6m/m-K～25*10-6m/m-K的整体热膨胀系数(overall CTE)。而第一粘着层 18可包括如环氧树脂(epoxy)的材料，且具有约为30*10-6m/m-K～65*10-6m/m-K的热膨胀系数。 
如图1所示，在电路板12的第一表面14上形成有多个焊垫B以及多个导电的电路图案(图未示)，而在电路板12的第二表面16上则形成有多个导电球状物36。半导体芯片20的输出/输入焊垫A通过导电连接物34而电性连结至焊垫B，此导电连接物34则延伸于半导体芯片20与焊垫B之间。如图1所示，导电连接物34可为由金或铝所形成的焊线(bond wire)。 
此外，间隔物28通过第二粘着层26而安装于半导体芯片20的第一表面22的中央部分上。间隔物28为由空白半导体晶圆所形成的如长方形的非功能性芯片，且可包括相同于半导体芯片20的半导体层(图未示)的半导体材料。间隔物28的剖面尺寸，例如宽度W1，其小于半导体芯片20的剖面尺寸，例如宽度W2，而上述W1与W2之间具有约1:2-1:6的比例关系。在一实施例中，间隔物28可具有约2*10-6m/m-K～5*10-6m/m-K的热膨胀系数。包覆层30则覆盖了半导体芯片20的第一表面22以及电路板12的第一表面14，且环绕了间隔物28但没有覆盖间隔物28的顶面。包覆层30可通过模塑与固化（molding and curing）树脂(例如环氧树脂)材料所形成，或通过浇注与固化（pouring and curing）液态树脂(例如环氧树脂)材料所形成。散热层32则覆盖了包覆层30的顶面以及第二半导体芯片28的顶面。在一实施例中，包覆层30可具有约5*10-6m/m-K～20*10-6m/m-K的热膨胀系数。而散热层32可由如铜、铝或其他金属合金所形成，且具有约12*10-6m/m-K～30*10-6m/m-K的热膨胀系数、约50-350微米的厚度以及约50-420W/m-k的热导率(thermal conductivity)。 
导电球状物36可由如铅锡焊料(lead tin solder)或其他金属所形成，并可作为半导体封装10的输出/输入端子。导电球状物36通过导电连接物34、形成于电路板12上的焊垫B以及形成于电路板12内的导电线路与导电内连物(两者图未示)而分别电性连结至半导体芯片20的输入/输出焊垫A。导电球状物36使得半导体封装10可安装于主机板(图未示)上。也可使用导电球状物36以外的其他形态的输出/输入端子。 
在图1所示的半导体封装10中，通过间隔物28以及散热层32的形成，可避免或至少降低翘曲问题的发生。间隔物28以及散热层32提供了直接接合于半导体芯片20的坚固框架，且因而限制了来自于电路板12的可能翘曲情形。 
图2为如图1所示的半导体封装10的俯视图，而图1显示了沿图2内线段 1-1的剖视图。在此实施例中，散热层32整个覆盖电路板12，且基于简化图式的目的，在图式中仅采用虚线方式绘示出半导体芯片20与间隔物28。 
图3为依据本发明的另一实施例的具有较少翘曲问题的一种半导体封装40，而此半导体封装40由修改如图1-2所示的半导体封装10所得到。且基于简化目的，在此相同标号代表相同组件，且在下文中仅讨论半导体封装10与半导体封装40之间的差异处。 
如图3所示，在散热层32与第二半导体芯片28之间形成有热中间层(thermal interlayer)42。在一实施例中，热中间层42可由如环氧树脂的材料所形成，且可具有约30*10-6m/m-K～65*10-6m/m-K的热膨胀系数以及约5-100微米的厚度。 
在图3所示的半导体封装40中，通过间隔物28、热中间层42以及散热层32的形成可避免或至少降低翘曲问题的发生。第二半导体芯片28、热中间层42、以及散热层32提供了可释放累积于电路板12内的可能造成翘曲的热应力的垂直散热通道。 
图4为依据本发明的又一实施例的具有较少翘曲问题的一种半导体封装50，半导体封装50由修改如图3所示半导体封装40所得到。基于简化目的，相同标号代表相同组件，且在下文中仅讨论半导体封装40与半导体封装50之间的差异处。 
如图4所示，在半导体封装50内并未形成有间隔物28与第二粘着层26。取而代之的是，在电路板12的第一表面14的周围部分上形成加强板(stiffener)52，以环绕半导体芯片20，而形成于电路板12上的包覆层30则覆盖了半导体芯片20且被加强板52所环绕。散热层32形成于包覆层30与加强板52之上，且热中间层42形成于散热层32、包覆层30与加强板52之间。在一实施例中，加强板52可由如铜、铝、或其他金属合金所形成，且可具有约50*10-6m/m-K～420*10-6m/m-K的热膨胀系数。 
在图4所示的半导体封装50中，通过加强板52、热中间层42以及散热层32可避免或至少降低翘曲问题的发生。加强板52、热中间层42、以及散热层32的形成提供了直接接合于半导体芯片20的坚固框架，且因而限制了来自于电路板12的可能翘曲情形。 
图5为俯视图，显示了图4内所示的半导体封装50，而图4显示了沿图5内线段4-4的剖视图。在此实施例中，散热层32整个覆盖了电路板12。同时，基于简化的目的，在图式中仅采用虚线绘示了第一半导体芯片20与加强板52。 
图6为依据本发明的另一实施例的具有较少翘曲问题的一种半导体封装60，半导体封装60由修改如图1所示的半导体封装10所得到。基于简化目的，在此相同标号代表相同组件，且在下文中仅讨论半导体封装10与60之间的差异处。 
如图6所示，在半导体封装60内并未形成有间隔物28、第二粘着层26以及散热层32。取而代之的是，在电路板12上形成了类U形散热层(U-like shaped heat spreading layer)62，其包括了形成于包覆层30的顶面上的第一部分62a以及埋设于包覆层30之内的第二部分62b。类U形散热层62的第二部分62b通过第三粘着层68而安装于半导体芯片20之上。在类U形散热层62的第二部62b之内则形成有多个开口64，以使得形成包覆层30的材料可在其形成时流动并通过这些开口64。 
在一实施例中，类U形散热片62可由如铜、铝、或其他金属合金的材料所形成，且具有约50*10-6m/m-K～420*10-6m/m-K的热膨胀系数。第三粘着层68可由如环氧树脂的材料所形成，且具有约30*10-6m/m-K～65*10-6m/m-K的热膨胀系数。图7为图6所示的半导体封装60内所应用的类U形散热片62的立体示意图。 
在图6所示的半导体封装60中，通过类U形散热层62的形成，可避免或至少降低翘曲问题的发生。此类U形散热层62提供了直接接合于半导体芯片20的坚固框架，且因而限制了来自于电路板12的可能翘曲情形。 
图8为如图6内的半导体封装60的俯视图，而图6显示了沿图8内线段6-6的半导体封装60的剖视图。在此实施例中，类U形散热层62完全覆盖了电路板12，而基于简化图示目的，在此仅绘示了类U形散热层62、形成于其内的开口64以及半导体芯片20，。 
前述的可具有较少翘曲问题的半导体封装10、40、50、60的可通过切割型引线接合球栅阵列(sawing-type wire-bond BGA)封装工艺所制成。而半导体封装10、40、50、60的组件可由条状电路板(circuit board strip)所制成。第9图为俯视图，显示了依据本发明的一实施例的一种条状电路板70，其适用于制作上述的半导体封装10、40、50、60。条状电路板70包括由五个电路板74所形成的主要条状物72。主要条状物72的周边区域的相对的行方向上形成有穿透的多个孔洞76。这些孔洞76可使得条状电路板70在自动加工设备中的对准与前进。在这些半导体封装10、40、50、60的多个组件中则可自动地制作且形成于五个 电路板74之内，并接着通过切割工艺(图未示)而分割形成单一的半导体封装10、40、50或60。 
以上所述仅为本发明的较佳实施方式，凡依本发明权利要求所做的均等变化和修饰，均应属本发明的涵盖范围。 

Claims (20)

1.一种半导体封装，其特征在于，包括：
电路板，具有相对的第一表面与第二表面；
半导体芯片，形成于所述电路板的所述第一表面的中央部分上，具有第一剖面尺寸；
间隔物，形成于所述半导体芯片的中央部分上，具有小于所述第一剖面尺寸的第二剖面尺寸；
包覆层，形成于所述电路板上，覆盖所述半导体芯片且环绕所述间隔物；
散热层，形成于所述包覆层与所述间隔物上；以及
多个锡球，形成于所述电路板的所述第二表面上。
2.如权利要求1所述的半导体封装，其特征在于，还包括热中间层，设置于所述散热层与所述包覆层及所述间隔物之间。
3.如权利要求2所述的半导体封装，其特征在于，所述热中间层包括环氧树脂。
4.如权利要求1所述的半导体封装，其特征在于，还包括第一粘着层，形成于所述电路板的所述第一表面与所述半导体芯片之间。
5.如权利要求4所述的半导体封装，其特征在于，还包括第二粘着层，形成于所述间隔物与所述半导体芯片之间。
6.如权利要求1所述的半导体封装，其特征在于，所述第一剖面尺寸与所述第二剖面尺寸之间的比例为约1:2-1:6。
7.如权利要求1所述的半导体封装，其特征在于，所述半导体芯片为功能性芯片，而所述间隔物为非功能性芯片，且所述半导体芯片与所述间隔物包括相同的半导体材料。
8.如权利要求1所述的半导体封装，其特征在于，所述散热层包括铜或铝。
9.一种半导体封装，其特征在于，包括：
电路板，具有相对的第一表面与第二表面；
半导体芯片，形成于所述电路板的所述第一表面的中央部分上；
加强板，形成于所述电路板的所述第一表面的边缘部分上，环绕所述半导体芯片；
包覆层，形成于所述电路板上，覆盖所述半导体芯片且被所述加强板所环绕；
散热层，形成于所述包覆层与所述加强板上；以及
多个锡球，形成于所述电路板的所述第二表面上。
10.如权利要求9所述的半导体封装，其特征在于，还包括热中间层，设置于所述散热层与所述包覆层之间。
11.如权利要求10所述的半导体封装，其特征在于，其中所述热中间层包括环氧树脂。
12.如权利要求9所述的半导体封装，其特征在于，还包括第一粘着层，设置于所述电路板的所述第一表面与所述半导体芯片之间。
13.如权利要求9所述的半导体封装，其特征在于，其中所述散热层包括铜或铝。
14.一种半导体封装，其特征在于，包括：
电路板，具有相对的第一表面与第二表面；
半导体芯片，形成于所述电路板的所述第一表面的中央部分上；
包覆层，形成于所述电路板上，覆盖所述半导体芯片；
类U形散热层，形成于所述电路板上，包括覆盖所述包覆层顶面的第一部与埋设于所述包覆层内的第二部分；以及
多个锡球，形成于所述电路板的所述第二表面上。
15.如权利要求14所述的半导体封装，其特征在于，所述类U形散热层的所述第二部形成于所述半导体芯片上。
16.如权利要求14所述的半导体封装，其特征在于，还包括第一粘着层，形成于所述电路板的所述第一表面与所述半导体芯片之间。
17.如权利要求16所述的半导体封装，其特征在于，还包括第二粘着层，形成于所述类U形散热层的所述第二部与所述半导体芯片之间。
18.如权利要求14所述的半导体封装，其特征在于，所述散热层包括铜或铝。
19.如权利要求14所述的半导体封装，其特征在于，还包括多个开口，形成于所述类U形散热层的所述第二部分内。
20.如权利要求19所述的半导体封装，其特征在于，其中所述开口允许所述包覆层的材料流动并穿透所述类U形散热层。
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US20150115429A1 (en) 2015-04-30
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