CN103400840A - Super barrier rectifier and preparation method thereof - Google Patents
Super barrier rectifier and preparation method thereof Download PDFInfo
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Abstract
The invention mainly relates to a power semiconductor rectifier. To be more precise, the invention relates to a super barrier rectifier and provides an optimization method for preparing the super barrier rectifier. A groove type super barrier rectifier (SBR) device is prepared in a semiconductor substrate and provided with a PN junction connected with a metal oxide semiconductor (MOS) transistor in parallel. Threshold voltage of the barrier MOS transistor is lower than barrier voltage of a conventional PN junction, and forward conduction voltage of the SBR is lower than forward conduction voltage of a conventional PN diode, thereby enabling the SBR to have a high switching speed.
Description
Technical field
The present invention relates generally to the power semiconductor rectifier, or rather, is that a kind of superpotential of design is built rectifier and provided the preparation superpotential to build the optimization method of rectifier.
Background technology
The power semiconductor rectifier that is widely used in power supply and power converter has multiple, common for example Schottky diode (Schottky Barrier Diode), the characteristics such as have that electric conduction forces down and turn-off that speed is fast, end during reverse biased.Cardinal principle is to form the metal-silicon potential barrier, different from the metal ohmic contact of routine in the most of situation of barrier metal, to such an extent as to need to regulate barrier height, certainly will need to regulate barrier metal and form and provide comparatively complicated manufacturing process to meet this point, this does not also meet cost requirement and preferably properties of product can't be provided.Especially the Schottky barrier rectifier diode exists that due to leakage current is excessive causes reverse power consumption high, and leakage current is directly proportional to ambient temperature roughly, and nominal parameter very easily is subject to the interference of external factor.
based on rectifier having been proposed to new requirement, be exactly on the one hand to do one's utmost to keep the advantage that Schottky diode is used to have and weaken its inferior position, some prior aries disclose the superpotential of all multiple types and have built rectifier (Super Barrier Rectifier), between anode and negative electrode, integrate rectifier diode in parallel and MOS transistor and form superpotential base rectifier SBR, for example Chinese patent application 01143693.X discloses " manufacturing power rectifier device to change improving one's methods and the device of gained of running parameter ", and for example U.S. Patent application US6331455B1 discloses a kind of " power rectifier and manufacture method thereof " etc.Yet the current problem that solves that needs is improve the structure cell density of MOS transistor and optimize the rectifier that preparation technology is better with the manufacturing property parameter, cost is lower, in aforementioned documents, all be to provide the SBR device of planar gate, the application's subsequent content is to provide a kind of SBR device of plough groove type.
Summary of the invention
In one embodiment, the invention provides a kind of superpotential and build rectifier, comprising: semi-conductive substrate, an epitaxial loayer that comprises a base substrate and grow on base substrate, wherein, at the top of epitaxial loayer, be formed with this tagma, and be formed with a doped region at this top, tagma; Be formed in epitaxial loayer and in bottom and sidewall, be lined with the gate trench of grid oxic horizon and be formed on the control grid in gate trench, gate trench runs through described doped region and described this tagma downwards until its bottom extends in the epitaxial loayer of this below, tagma; Run through described doped region and extend downward the contact hole in this tagma, and being implanted in the body contact zone of described contact hole bottom periphery; Cover on described epitaxial loayer and keep an anode metal layer of electrical contact with described doped region, the part of described anode metal layer is filled in described contact hole and forms metal plug; An and cathodic metal layer that covers the bottom surface of described base substrate.
Above-mentioned superpotential is built rectifier, described base substrate, epitaxial loayer, doped region are the first conduction type, described this tagma is the second conduction type with the first conductivity type opposite, and described body contact zone is that the second conduction type and its doping content are higher than this tagma.
Above-mentioned superpotential is built rectifier, also comprises an annular isolation groove that is formed in epitaxial loayer, and isolated groove extends through doped region downwards and this tagma extends in the epitaxial loayer of this below, tagma to its bottom; Thereby Semiconductor substrate comprises the active area that is positioned at the isolated groove inboard and the termination environment that is positioned at the isolated groove outside, and described gate trench, contact hole and anode metal layer are arranged in described active area.
Above-mentioned superpotential is built rectifier, in isolated groove, be provided with the transition grid that top protrudes from the epitaxial loayer end face, the peripheral part of anode metal layer covers on the top of inboard part of close active area of transition grid, and the over top of the Outboard Sections of the close termination environment of transition grid is not covered by anode metal layer.
Above-mentioned superpotential is built rectifier, and the width of described isolated groove is greater than described gate trench, terminal trenches width separately.
Above-mentioned superpotential is built rectifier, also comprise a plurality of terminal trenches in the epitaxial loayer that is formed on termination environment, each terminal trenches all runs through described doped region and described this tagma downwards until its bottom extends in the epitaxial loayer of this below, tagma, and in terminal trenches, is formed with floating grid.
Above-mentioned superpotential is built rectifier, and the top of controlling grid extends upwardly to the end face that protrudes from epitaxial loayer, and controls that the grid top extends upward and the part that exceeds the epitaxial loayer end face is covered by in described anode metal layer.
The present invention also provides a kind of superpotential to build the preparation method of rectifier, comprise the following steps: step S1, provide semi-conductive substrate, an epitaxial loayer that comprises a base substrate and the growth of base substrate top, utilization covers the hard mask with patterns of openings of epitaxial loayer top, in epitaxial loayer, etches a plurality of gate trenchs; Step S2, in the bottom of gate trench and sidewall, generate grid oxic horizon, then formation control grid in gate trench, remove described hard mask afterwards, makes the top of grid extend upwardly to the end face that protrudes from epitaxial loayer; Step S3, at the top of epitaxial loayer, implant alloy and form this tagma, and then at the top in this tagma, implant alloy and form a doped region; Step S4, at the end face of epitaxial loayer with above controlling grid, generate a cushion oxide layer, control the top of grid and control that the grid top extends upward and the sidewall that exceeds the part of epitaxial loayer end face is all covered by cushion oxide layer; Step S5, return to carve described cushion oxide layer, form to cover and control the grid top and extend upward and exceed the side wall on the sidewall of part of epitaxial loayer end face, and expose the zone that the upper surface of described doped region is not covered by side wall; Step S6, in doped region, this tagma, etch and run through doped region and extend downward the contact hole in this tagma; Step S7, in this tagma of contact hole bottom periphery, implant the body contact zone, then remove side wall; Step S8, on described epitaxial loayer the deposition one anode metal layer, the part of described anode metal layer is filled in described contact hole and forms metal plug, controls that the grid top extends upward and the part that exceeds the epitaxial loayer end face is covered by in described anode metal layer.
Above-mentioned method, in step S1, when forming described gate trench, also utilize described hard mask in epitaxial loayer, to etch an annular isolation groove and a plurality of terminal trenches, gate trench and terminal trenches are respectively formed at inboard and the outside of isolated groove, thereby Semiconductor substrate is isolated the termination environment that groove is divided into the active area that is positioned at the isolated groove inboard and is positioned at the isolated groove outside.
Above-mentioned method, in step S2, before forming grid oxic horizon, first in the sidewall of groove and bottom by thermal oxidation method one deck sacrificial oxide layer of growing, by wet etching, this sacrificial oxide layer is removed thereafter.
Above-mentioned method, in step S2, after forming grid oxic horizon, further comprising the steps of: deposit spathic silicon above hard mask, polysilicon also is filled in the opening in hard mask and is filled in gate trench, isolated groove and terminal trenches simultaneously; Eat-back the polysilicon of hard mask top, the polysilicon of filling in overlapping opening above it in gate trench and hard mask forms one and controls the polysilicon of filling in overlapping opening above it in grid, isolated groove and hard mask and form the polysilicon of filling in overlapping opening above it in a transition grid, terminal trenches and hard mask and form a floating grid; Remove afterwards described hard mask.
Above-mentioned method, in step S8, first on the epitaxial loayer of active area and termination environment, deposit a metal level, then the metal level that etches away termination environment only remains with the metal level in source region, the peripheral part that is retained in the metal level of active area covers on the top of inboard part of close active area of transition grid, as an anode metal layer, the metal level of the over top of the Outboard Sections of the close termination environment of transition grid is etched away in the lump together with the metal level of termination environment.
Above-mentioned method, described base substrate, epitaxial loayer and doped region are the doping type of the first conduction type, and described this tagma and body contact zone are the second conduction type with described the first conductivity type opposite.
Above-mentioned method, in step S2, before removing described hard mask, first form a buffer oxide layer on the top end face of controlling grid; And in step S4, the buffer oxide layer of controlling the grid top is covered by described cushion oxide layer; And in step S5, return and carve the composite bed of controlling grid upper pad oxide layer and buffer oxide layer, form and be retained in a screen oxide of controlling the grid top, thereby in step S6, utilize screen oxide and side wall to form contact hole as etch mask.
Above-mentioned method, in step S2, before removing described hard mask, first controlling formation one buffer oxide layer on grid, transition grid and floating grid top end face separately; And in step S4, control grid, transition grid and the floating grid buffer oxide layer of top are separately all covered by described cushion oxide layer; And in step S5, return to carve control grid, transition grid and the floating grid composite bed of upper pad oxide layer and buffer oxide layer separately, formation is retained in their screen oxide of top separately, thereby in step S6, utilizes screen oxide and side wall to form contact hole as etch mask.
Above-mentioned method, adjust the distance between the adjacent end groove and adjust terminal trenches of the most close isolated groove and the distance between isolated groove; The a pair of floating grid that makes arbitrary neighborhood top separately protrudes from the gap between the part of epitaxial loayer end face, and a floating grid top of the most close transition grid protrudes from the gap between the part of epitaxial loayer end face and part that transition grid top protrudes from the epitaxial loayer end face, all in step S4, by the part of cushion oxide layer, filled full fully; Thereby the part that cushion oxide layer is filled in described gap in step S5 can not returned and carve fully, with the epitaxial loayer that prevents termination environment, in step S6, etches contact hole.
The accompanying drawing explanation
Read following describe in detail and with reference to after the following drawings, Characteristics and advantages of the present invention will be apparent:
Figure 1A is the structural representation of SBR.
Figure 1B is the electrical block diagram of SBR in Figure 1A.
Fig. 2 A～2P is the process flow diagram for preparing the SBR of Figure 1A.
Embodiment
Superpotential referring to Figure 1A is built rectifier SBR, SBR comprises semi-conductive substrate, this Semiconductor substrate comprises a base substrate 101 and is carried on an epitaxial loayer 102 of base substrate 101 tops, at the top of epitaxial loayer 102, be formed with this tagma 103, and be formed with a doped region 104 at these 103 tops, tagma.The end face of epitaxial loayer 102 is Semiconductor substrate or the front that claims wafer, and the bottom surface of base substrate 101 is Semiconductor substrate and a back side its vis-a-vis.In the present invention, doped region 104 can be called again source/leakage doped region.For the convenience of narrating, definition base substrate 101 is heavily doped N+ type, and the doping content of epitaxial loayer 102 is the N-type lower than base substrate, and this tagma 103 is that P type and doped region 104 are the higher N+ type of doping content.Gate trench 106a is formed in epitaxial loayer 102, and gate trench 106a runs through doped region 104 and this tagma 103 downwards until the bottom of gate trench 106a extends in the epitaxial loayer 102 of these 103 belows, tagma, doped region 104 be centered around gate trench 106a than around top.In the bottom of gate trench 106a and sidewall, be lined with grid oxic horizon 106b, in gate trench 106a, be formed with and control grid 106.In some optional execution modes, the top end face of controlling grid 106 can be also that the upper surface of doped region 104 is roughly coplanar with the end face of epitaxial loayer 102; And at other preferably in execution mode, the top of controlling grid 106 extends upward, until its top has the part of the end face that protrudes from epitaxial loayer 102.In doped region 104 between adjacent gate trench 106a and this tagma 103, be provided with contact hole 107, in the gate trench 106a of the most close isolated groove 106a-1 and the doped region between isolated groove 106a-1 104 and this tagma 103, also be provided with contact hole 107(this will discuss in detail in subsequent content), contact hole 107 runs through doped region 104 and extends downward in this tagma 103, in this tagma 103 of the bottom periphery of contact hole 107, is injected with a body contact zone 1030.SBR also comprises and is arranged on epitaxial loayer 103 and keeps the anode metal layer 105 of electrical contact with the upper surface of doped region 104, and in contact hole 107, is provided with metal plug 1050.In some embodiments, the part of anode metal layer 105 is filled in the interior formation metal plug 1050 of contact hole 107, in other execution modes, metal plug 1050 not forms simultaneously or has different materials from anode metal layer 105, but metal plug 1050 keeps being electrically connected with anode metal layer 105.Body contact zone 1030 is centered around the bottom periphery of metal plug 1050, if control the end face that the top of grid 106 exceeds epitaxial loayer 103, it extends upward the part that exceeds epitaxial loayer 103 end faces and is covered by in anode metal layer 105.In the present invention, epitaxial loayer 102 and the base substrate 101 of these 103 belows, tagma can be called leakage/source dopant region again, and be in the MOSFET unit, corresponding with the doped region 104 as source/leakage doped region.In the bottom surface of base substrate 101 toward the contact sputter or deposit a cathodic metal layer of anticipating out not shown in the figures, an anode tap (Anode) 105a that anode metal layer 105 can be drawn the SBR device, can draw a cathode terminal (Cathode) 101a on the bottom surface of base substrate 101.The side circuit that the integrated circuit structural representation of Figure 1A embodies is showed (diode and a MOSFET unit only being shown as demonstration in figure) as Figure 1B, thereby realized paralleling MOS FET150 and rectifier diode 151 between anode tap 105a and cathode terminal 101a, the anode of diode 151 and negative electrode are connected on anode tap 105a and cathode terminal 101a.
Fig. 2 A～2P is the method flow diagram for preparing SBR in Figure 1A.At the end face of this epitaxial loayer 10, cover a hard mask 201, the selection of hard mask 201 is various, for example comprises the composite bed of oxide skin(coating) and silicon nitride, the stress difference between silicon nitride and Semiconductor substrate that can cushion or prevent of the oxide skin(coating) below silicon nitride.In Fig. 2 B, spin coating photoresist 202 above hard mask 201, exposure imaging by photoetching process is transferred to the channel patterns on a photo mask board in photoresist 202, and the photoresist 202 of usining with channel patterns carrys out the hard mask 201 of etching as an etching screen, thereby form the opening figure with channel patterns in hard mask 201, remove afterwards photoresist 202, because these technology are known by those skilled in the art, so the present invention repeats no more.As Fig. 2 C, with anisotropic mode etching epitaxial loayer 102, form the groove of several expections, mainly to form gate trench 106a, isolated groove 106a-1 and terminal trenches 106a-2, wherein isolated groove 106a-1 and each terminal trenches 106a-2 are all the ring-shaped groove of a closure in fact, and gate trench 106a and terminal trenches 106a-2 are respectively formed at inboard and the outside of isolated groove 106a-1.In some optional execution modes, can utilize isotropic etching mode to form the bottom of each groove, to improve the round and smooth degree at its bottom corners place, it is etched near fillet.In Fig. 2 C, thereby being isolated groove 106a-1, Semiconductor substrate is divided into the active area 180 that is positioned at the inboard 106a-1 of isolated groove and the termination environment 185 that is positioned at the isolated groove 106a-1 outside.The width of isolated groove 106a-1 is generally all much wide than gate trench 106a and terminal trenches 106a-2, and in some execution mode, gate trench 106a can all can than terminal trenches 106a-2 is slightly wide or slightly narrow.in the present invention, as Fig. 2 C～2D, in some embodiments, in order to provide a smooth surface to each groove and to form the trench bottom corner of corners, while is physical damnification and the various defect in order to reduce flute surfaces also, need first at gate trench 106a, isolated groove 106a-1 and terminal trenches 106a-2 bottom and sidewall growth one deck sacrificial oxide layer (not illustrating) separately, for example can be the steam oxidation of 850 degrees centigrade 80 minutes, because sacrificial oxide layer is a transition zone, need afterwards to remove, so can adopt the little and short wet oxygen growth method consuming time of heat budget here, then can in the mode of wet method, erode sacrificial oxide layer with mixed solutions such as HF and ammonium fluorides.
As Fig. 2 E, generation covers the sidewall separately of gate trench 106a, isolated groove 106a-1 and terminal trenches 106a-2 and the grid oxic horizon 106b of bottom, grid oxic horizon 106b is because need to bear high pressure to a certain degree, often needing is compactness film preferably, can be for example the layer of silicon dioxide layer that thermal oxidation method generates, dry-oxygen oxidation 81 minutes under the condition of 1000 degrees centigrade for example.Notice that the SiO2 of grid oxic horizon 106b employing here is only as demonstration, grid oxic horizon 106b can also be the quality insulation film of silicon nitride and so on preferably in fact, its preparation method is except thermal oxidation method, also have the methods such as chemical vapor deposition or physical vapor deposition to form, for example the thickness of grid oxic horizon 106b is between 50 nanometer to 1500 nanometers.
Referring to Fig. 2 F, be deposited on packing material polysilicon 1060 on hard mask 201 and be filled in simultaneously in gate trench 106a, isolated groove 106a-1 and terminal trenches 106a-2, note also by crystal silicon 1060, being filled in each opening in hard mask 201.Obtain polysilicon 1060 can by chemical vapor deposition (CVD) or epitaxial growth or physical vapour deposition (PVD) etc. mode realize, in this step, need to some alloys of doping in polysilicon 1060, doping way can be in-situ doped or first deposit afterwards and adulterate.After this, need to remove the polysilicon 1060 that is positioned at hard mask 201 tops and only keep the polysilicon 1060 that is positioned at each groove and each opening, typically for example polysilicon 1060 enforcement cmps (CMP) or dry etchback all can.If preferably eat-back, etching terminal is the upper surface of hard mask 201, but often because the over etching effect, the top end face that causes the polysilicon 1060 in each opening in hard mask 201, is rendered as below the upper surface that top end face is positioned at hard mask 201 slightly to lower recess from the upper surface of hard mask 201.After the grinding or etch-back technics of polysilicon 1060, in the interior and hard mask 201 of each gate trench 106a, for etching, preparing the polysilicon 1060 of filling in the corresponding opening 201a of this gate trench 106a is retained, its purpose is, makes in the polysilicon 1060 of filling in gate trench 106a and hard mask 201 polysilicon 1060 of filling in the opening 201a that overlaps on directly over gate trench 106a form one and controls grid 106.Based on same technique, in isolated groove 106a-1 and in hard mask 201, for etching, prepare the polysilicon 1060 of filling in the corresponding opening 201a-1 of this isolated groove 106a-1 and be retained, in the polysilicon 1060 of namely filling in isolated groove 106a-1 and hard mask 201, overlap on the polysilicon 1060 of filling in the opening 201a-1 directly over isolated groove 106a-1 and form a transition grid 106'.And, in the interior and hard mask 201 of terminal trenches 106a-2, for etching, preparing the polysilicon 1060 of filling in the corresponding opening 201a-2 of this terminal trenches 106a-2 is retained, be that the polysilicon 1060 of filling in the opening 201a-2 that overlaps in the polysilicon 1060 of filling in terminal trenches 106a-2 and hard mask 201 directly over terminal trenches 106a-2 forms a floating grid 106'', as shown in Figure 2 G.In some optional and nonessential embodiment, in order to ensure that the polysilicon 1060 of filling in opening 201a, 201a-1,201a-2 is not fallen by over etching in the etching technics of follow-up formation contact hole, after also need to the polysilicon 1060 above removing hard mask 201, carry out again the step of oxidation step, namely control formation one deck buffer oxide layer 206 on grid 106, transition grid 106' and floating grid 106'' top end face separately, and then peeling off hard mask 201.If the part that each grid top protrudes from the doped region upper surface has enough height, the part of this protrusion can not be etched away fully in the preparation technology of contact hole, and buffer oxide layer 206 can dispense.Afterwards as Fig. 2 H, utilize the corrosive liquid as H3PO4, erode hard mask 201, make to control grid 106, transition grid 106' and floating grid 106'' top separately and extend upwardly to the end face that protrudes from epitaxial loayer 102, be readily appreciated that, the part that control grid 106, transition grid 106' and floating grid 106'' top separately protrude from epitaxial loayer 102 end faces also namely originally was filled in respectively the polysilicon in opening 201a, 201a-1 and 201a-2.
as Fig. 2 I, doping ion the high temperature anneal of first at the top of epitaxial loayer 102, injecting the P type form this tagma 103, the defects such as lattice damage that elimination brings due to Implantation, this tagma 103 after diffusion simultaneously activates be centered around gate trench 106a around, but the bottom of gate trench 106a extends downwardly in the epitaxial loayer 102 of these 103 belows, tagma, and then form the doped region 104 that the degree of depth is more shallow at the heavily doped N-type doping of 103De top, this tagma implantation ion, and high annealing DIFFUSION TREATMENT, doped region 104 be centered around gate trench 106a than top.It should be noted that, no matter be this tagma 103 or doped region 104, all without extra injection mask, because the P type in this tagma 103 doping ion is to be infused in the whole top of epitaxial loayer 102 but not the regional area at its top, equally, the N-type of doped region 104 doping ion is to be infused in the whole top in this tagma 103 but not the regional area at its top.
As Fig. 2 J, it at the end face of epitaxial loayer 102, is also cushion oxide layer 203 of deposition above the upper surface of doped region 104, cushion oxide layer 203 covers equally controls grid 106, transition grid 106' and floating grid 106'' top, the most important thing is, the sidewall that makes by this top of each grid 106,106', 106'' exceed the part of epitaxial loayer 102 end faces is also covered by cushion oxide layer 203, and this is very important in follow-up self-registered technology.As shown in Fig. 2 K, carry out vertical unidirectional time etching, return to carve cushion oxide layer 203, the buffer oxide layer 206 of the stack of over top and the composite bed of cushion oxide layer 203 are also returned etching separately to control grid 106, transition grid 106' and floating grid 106''.In this etchback step, cover each grid separately the cushion oxide layer 203 of vertically extending that exceeds on the sidewall of part of epitaxial loayer 102 end faces of top be retained, take this to form to cover and control grid 106, transition grid 106' and floating grid 106'' and exceed the side wall 2030 on the sidewall of part of epitaxial loayer 102 end faces in top separately, so, in active area, the cushion oxide layer 203 that the along continuous straight runs that the upper surface of doped region 104 other tops, remaining zone except the zone that is covered by side wall 2030 are covered extends all is etched away.After completing back etching, the zone of other remainders of doped region 104 upper surfaces except the zone that is covered by side wall 2030 is exposed, and this is that vertical one-way is returned the effect that the characteristic of etching is brought.it should be noted that, after deposit liner oxide layer 203, originally the buffer oxide layer 206 that exists on each grid, make on each grid the thickness of the composite bed of having integrated buffer oxide layer 206 and cushion oxide layer 203 be greater than the single thickness of the cushion oxide layer 203 that in active area, doped region 104 upper surfaces top along continuous straight runs extend, so even if the cushion oxide layer 203 of other the zone tops of doped region 104 upper surfaces except the zone that is covered by side wall 2030 is etched away, make the zone of other remainders of its upper surface except the zone that is covered by side wall 2030 out exposed, the top end face of each grid this moment can be out not exposed yet, because the thickness of the part that the composite bed of buffer oxide layer 206 and cushion oxide layer 203 is etched away, the thickness of the cushion oxide layer 203 that the along continuous straight runs that the top, remainder zone with 104 upper surfaces of doped region in active area except the zone that is covered by side wall 2030 is etched away extends is roughly the same, etching terminal is the end face of epitaxial loayer, so that also remain with one deck screen oxide 206' on the top of each grid.The thickness of side wall 2030 is slightly thin than the original thickness that cushion oxide layer 203 covers the part of vertically extending on described side wall in fact, because cover the impact that cushion oxide layer 203 on described side wall also is subject to etching, but the present invention is based on the anisotropic character that utilizes dry etching, vertically eat-back, make side wall 2030 to keep and to be attached to control grid 106, transition grid 106' and floating grid 106'' to exceed on the sidewall of part of end face of epitaxial loayer 102 on top separately, and be not etched away.
as Fig. 2 L, utilize screen oxide 206' and side wall 2030 mask as etching, in self aligned mode, carry out the etching technics of contact hole, notice that need not additionally provide independent etch mask this moment again, in active area 180, in epitaxial loayer 102 between adjacent gate trench 106a, be etched and formed a plurality of contact holes 107, near in the gate trench 106a of isolated groove 106a-1 and the epitaxial loayer 102 between isolated groove 106a-1 also etching formed contact hole 107, mainly to etch and run through doped region 104 and extend downward the contact hole in this tagma 103 in doped region 104 in epitaxial loayer 102 and this tagma 103.If do not prepare buffer oxide layer 206 so that can't form screen oxide 206', the part of each grid top protrusion can directly be etched away a part in the preparation process of contact hole, if set the part of protruding on each grid top, have enough height, lose a part also not severe, just be only that side wall 2030 is realized autoregistration as etch mask this moment.
In some optional but non-execution modes that are construed as limiting, regulate the distance between terminal trenches 106a-2 in termination environment 185 and regulate terminal trenches 106a-2 of the most close isolated groove 106a-1 and the distance between isolated groove 106a-1, and regulate in active area 180 distance between gate trench 106a and regulate the gate trench 106a of the most close isolated groove 106a-1 and the distance between isolated groove 106a-1.The gap of setting between the part that adjacent pair of control grid 106 protrudes from doped region 104 upper surfaces separately has width W
S1, the gap that the control grid 106 of the most close transition grid 106' protrudes between the part of doped region 104 upper surfaces and part that transition grid 106' protrudes from doped region 104 upper surfaces has width W
S2, the gap that adjacent a pair of floating grid 106'' protrudes between the part of doped region 104 upper surfaces separately has width W
T1, the gap that the floating grid 106'' of the most close transition grid 106' protrudes between the part of doped region 104 upper surfaces and part that transition grid 106' protrudes from doped region 104 upper surfaces has width W
T2, W
S1And W
S2All than W
T1And W
T2Want much wide.
W
T1And W
T2Being adjusted to narrow result is, the part gap each other that makes adjacent a pair of floating grid 106'' respectively protrude from doped region 104 upper surfaces is almost filled up by the part of cushion oxide layer 203, and the gap that the floating grid 106'' of the most close transition grid 106' is protruded between the part of doped region 104 upper surfaces and part that transition grid 106' protrudes from doped region 104 upper surfaces is also almost filled up by cushion oxide layer 203.obviously, cushion oxide layer 203 is filled in the thickness of the part in the gap between the projection of adjacent floating grid 106'' top in termination environment 185, or be filled in the thickness of the part in the gap between floating grid 106'' top projection and transition grid 106' top projection, thickness than the cushion oxide layer 203 of the 104 upper surface along continuous straight runs extensions of doped region in active area 180 is much thick, after so time etching of cushion oxide layer 203 stops, in gap between gap in termination environment between the projection of adjacent floating grid 106'' top or floating grid 106'' projection and transition grid 106' projection, still remain with the part of cushion oxide layer 203, and be not etched back fully, as shown in Fig. 2 K.This structure of Fig. 2 K, can think: in the gap between near the floating grid 106'' top projection transition grid 106' top projection and transition grid 106', side wall 2030 on the sidewall of the side wall 2030 on the sidewall of floating grid 106'' top projection and transition grid 106' top projection the two mutually in the face of the other side, to such an extent as to and these two side walls 2030 due to the excessive bottom near them, directly combine; And at a pair of adjacent floating grid 106'' separately in the gap between the projection of top, side wall 2030 on the sidewall of the top projection of one of two adjacent floating grid 106'' is in the face of the side wall 2030 on the sidewall of another floating grid 106'' top projection, to such an extent as to and these two side walls 2030 also due to the excessive bottom near them, directly combine.This pattern is that eat-backing of cushion oxide layer 203 is formed, and in termination environment, the upper surface of doped region 104 is covered by side wall 2030 fully.
although so in active area 180, form contact hole 107, in the doped region 104 of termination environment 185 and this tagma 103, do not form contact hole 107, although adjacent floating grid 106'' respectively protrudes from the cushion oxide layer 203 in the gap between the part of doped region 104 upper surfaces, and the floating grid 106'' of the most close transition grid 106' protrudes from the cushion oxide layer 203 in the gap between the part of doped region 104 upper surfaces and part that transition grid 106' protrudes from doped region 104 upper surfaces, in the etching technics of contact hole, all lose, but the cushion oxide layer in these gaps is through etching and remaining cushion oxide layer 203 parts still are enough to the upper surface of the doped region of termination environment 185 104 is covered.Then as shown in Fig. 2 M, need not utilize any injection shield mask, just directly implant the body contact zone 1030 of P+ type near this tagma 103 the bottom of contact hole 107, and carry out high annealing and activate body contact zone 1030, the doping content of body contact zone 1030 is greater than the concentration in this tagma 103.In the step of Implantation, because the shielding action of side wall 2030, alloy can not be injected in the doped region 104 or this tagma 103 under side wall 2030, but directly is injected into the bottom periphery of contact hole 107, so can save one, injects mask.Then utilize wet etching to remove side wall 2030 and screen oxide 206', as shown in Fig. 2 N, make each grid 106,106', 106'' top upwards exceed top end face and the sidewall of part of epitaxial loayer 102 end faces all out exposed.
obviously, utilize screen oxide 206' and side wall 2030 to prepare contact hole as the shielding barrier layer of etching, realized without introducing extra mask directly with self-registered technology, coming etching to form contact hole 107, also be equivalent to save one for the implantation of follow-up body contact zone 1030 and inject mask, in the present invention, the light shield that it saves, the cost control that mask and the processing procedure of abandoning by this bring is very considerable, and the contact hole that causes of the masking process that adopts in routine techniques or inject the defect such as skew and also be readily solved, especially in the preparation method of some published power devices, advantage of the present invention is that current known technology can't match in excellence or beauty.
As shown in Figure 2 O, first on the epitaxial loayer 102 of active area 180 and termination environment 185, deposit a metal level (for simplicity, this step is not listed separately), then etch away the metal level of termination environment 185, and only remain with the metal level in source region 180, the peripheral part that is retained in the metal level of active area 180 covers on the top of inboard part of close active area 180 of transition grid 106', usings as an anode metal layer 105.Transition grid 106' is not covered by anode metal layer 105 near the over top of the Outboard Sections of termination environment 185, because transition grid 106' is etched away in the lump near the metal level of the over top of the Outboard Sections of termination environment 185 metal level together with termination environment 185.after this, as shown in Fig. 2 P, insulating barrier 204 of deposition above the upper surface of the doped region 104 of termination environment 185 and floating grid 106'' again, insulating barrier 204 is generally and comprises low temperature oxide layer and borated silica glass layer (BPSG), the part that the top of floating grid 106'' is protruded to epitaxial loayer 102 end faces is coated in insulating barrier 204, insulating barrier 204 also covers on anode metal layer 105 simultaneously, a part of insulating barrier 204 to major general's anode metal layer 105 tops etches away from insulating barrier 204, to expose the regional area of anode metal layer 105 upper surfaces subsequently.It should be noted that, transition grid 106' is near the part that protrudes from epitaxial loayer 102 end faces of the Outboard Sections of termination environment 185, be also the zone that is not covered by anode metal layer 105 that transition grid 106' protrudes from the part of epitaxial loayer 102 end faces, also be insulated the layer 204 be coated in.After this also be included in base substrate 101 bottom surfaces and carry out the step that metallization forms the cathodic metal layer.
In some optional execution modes, when contact hole 107 had wider size, the part of metal level can directly be filled in contact hole 107, and namely metal plug 1050 is integrated formation with anode metal layer 105, and both materials are identical.and in other optional execution modes, need in the interior filling metal material of contact hole 107 (as tungsten), to form metal plug (claiming again interconnection structure) 1050 in advance, common means for example can be filled in contact hole 107 by plated metal tungsten, unnecessary metal material also can cover epitaxial loayer 102 and each grid top simultaneously, implement the unnecessary metal material of etch-back eating away thereafter, only keep the metal plug 1050 that is positioned at contact hole 107, after this, on metal plug 135 and doped region 104 and each grid, deposit a metal level again, again metal level is carried out to etching afterwards and form anode metal layer 105.
in metal level is carried out to etch step, we set perpendicular to the dotted line 205 of the Width of isolated groove 106a-1 and the planar quadrature at Semiconductor substrate place now, the edge of anode metal layer 105 is alignd with dotted line 205, dotted line 205 can and move near between the lateral wall 106''a-1 of termination environment 185 at the madial wall 106'a-1 of the close active area 180 of isolated groove 106a-1, be that we can design expansion or dwindle the area of anode metal layer 105, the described inboard part of transition grid 106' also namely is clipped in the transition grid 106' zone between the madial wall 106'a-1 of dotted line 205 and isolated groove 106a-1, the Outboard Sections of transition grid 106' also namely is clipped in the transition grid 106' zone between the lateral wall 106''a-1 of dotted line 205 and isolated groove 106a-1, the width ratio of inboard part and Outboard Sections can be regulated.Preferred but in unrestriced execution mode at one, dotted line 205 equals the distance between dotted line 205 to lateral wall 106''a-1 to the distance of madial wall 106'a-1, be the width that the width of the inboard part of transition grid 106' equals its Outboard Sections, be equivalent to width that transition grid 106' and anode metal layer 105 form overlapping inboard part equal transition grid 106' remainder not with the width of the overlapping Outboard Sections of anode metal layer 105 formation.because transition grid 106' also is electrically connected to anode metal layer 10, it can be used as a cambic control grid, in case apply forward voltage on transition grid 106', just in can near this tagma 103 the madial wall 106'a-1 of isolated groove 106a-1, grid oxic horizon 160b along liner on madial wall 106'a-1 forms a vertical channel region, electric current can be via this channel region, self-isolation groove 106a-1 flows to isolated groove 106a-1 than near the epitaxial loayer 102 the madial wall of bottom than near the doped region 104 the madial wall on top, such configuration, can increase quantity and the density of MOSFET on unit volume.And at active area 180, on control grid 106, apply forward voltage, just in can near this tagma 103 each sidewall of gate trench 106a, along the interior grid oxic horizon that is lining on each sidewall of gate trench 106a, form vertical channel region, electric current can be via this channel region, from gate trench 106a, than near the doped region 104 each sidewall on top, flow to gate trench 106a than near the epitaxial loayer 102 each sidewall of bottom in.In the present invention, floating grid 106'' and 185De Zhe tagma, termination environment 103, doped region 104 keep floating setting in the SBR operating conditions, do not apply voltage.
While between anode tap 105a and cathode terminal 101a, applying forward voltage, the grid drain electrode short circuit of vertical MOSFET in parallel is in same current potential, namely control grid 106, transition grid 106' and doped region 104 short circuits, the raceway groove of any one MOSFET unit can be opened immediately, between the epitaxial loayer 102 of these 103 belows, tagma and base substrate 101 and doped region 104, be switched on, current flowing, lower apply conducting under voltage conditions at one between the anode tap 105a of SBR and cathode terminal 101a.Particularly, the threshold voltage of barrier MOS pipe is slightly lower than the threshold voltage of conventional metal-oxide-semiconductor, also lower than the barrier voltage of conventional PN junction, the voltage of SBR forward conduction is often lower than the forward conduction voltage of conventional PN diode, the PN junction in parallel of barrier MOS pipe SBR when also not opening fully just opens, to such an extent as to SBR has a switching speed faster.In case apply reverse voltage between anode tap 105a and cathode terminal 101a, gate-source is in same current potential, control grid 106, transition grid 106' and doped region 104 short circuits, each MOSFET unit cut-off, the PN junction that is connected in parallel on metal-oxide-semiconductor carries reverse biased, reverse leakage current is by the characteristic decision of PN junction, and this moment, SBR can bear larger reverse pressure drop.high density structure cell SBR based on plough groove type, in a kind of optional execution mode of the present invention, control grid 106(or transition grid 106') top have the part that protrudes from doped region 104 upper surfaces, this part and the anode metal layer 105 protruded have larger contact area, when applying forward voltage drop, promote greatly and control grid 106(or transition grid 106') from this tagma 103, extract the speed that charge carrier forms inversion layer, this is very important to SBR, because the PN junction in parallel with metal-oxide-semiconductor metal-oxide-semiconductor before opening is further accelerated with regard to this process of conducting, thereby has splendid SBR forward switch transition speed.
Above, by explanation and accompanying drawing, provided the exemplary embodiments of the ad hoc structure of embodiment, foregoing invention has proposed existing preferred embodiment, but these contents are not as limitation.For a person skilled in the art, after reading above-mentioned explanation, various changes and modifications undoubtedly will be apparent.Therefore, appending claims should be regarded whole variations and the correction of containing true intention of the present invention and scope as.Any and all scope of equal value and contents, all should think and still belong to the intent and scope of the invention in claims scope.
Claims (16)
1. a superpotential is built rectifier, it is characterized in that, comprising:
Semi-conductive substrate, comprise the epitaxial loayer on a base substrate and base substrate, wherein, at the top of epitaxial loayer, is formed with this tagma, and is formed with a doped region at this top, tagma;
Be formed in epitaxial loayer and in bottom and sidewall, be lined with the gate trench of grid oxic horizon and be formed on the control grid in gate trench, gate trench runs through described doped region and described this tagma downwards until its bottom extends in the epitaxial loayer of this below, tagma;
Run through described doped region and extend downward the contact hole in this tagma, and being implanted in the body contact zone of described contact hole bottom periphery;
Cover on described epitaxial loayer and keep an anode metal layer of electrical contact with described doped region, in described contact hole, being provided with metal plug; And
Cover a cathodic metal layer of the bottom surface of described base substrate.
2. superpotential as claimed in claim 1 is built rectifier, it is characterized in that, described base substrate, epitaxial loayer, doped region are the first conduction type, described this tagma is the second conduction type with the first conductivity type opposite, and described body contact zone is that the second conduction type and its doping content are higher than this tagma.
3. superpotential as claimed in claim 1 is built rectifier, it is characterized in that, also comprises an annular isolation groove that is formed in epitaxial loayer, and isolated groove extends through doped region downwards and this tagma extends in the epitaxial loayer of this below, tagma to its bottom; Thereby
Semiconductor substrate comprises the active area that is positioned at the isolated groove inboard and the termination environment that is positioned at the isolated groove outside, and described gate trench, contact hole and anode metal layer are arranged in described active area.
4. superpotential as claimed in claim 3 is built rectifier, it is characterized in that, in isolated groove, be provided with the transition grid that top protrudes from the epitaxial loayer end face, the peripheral part of anode metal layer covers on the top of inboard part of close active area of transition grid, and the over top of the Outboard Sections of the close termination environment of transition grid is not covered by anode metal layer.
5. superpotential as claimed in claim 3 is built rectifier, it is characterized in that, the width of described isolated groove is greater than the width of described gate trench and terminal trenches.
6. superpotential as claimed in claim 3 is built rectifier, it is characterized in that, also comprise a plurality of terminal trenches in the epitaxial loayer that is formed on termination environment, each terminal trenches all runs through described doped region and described this tagma downwards until its bottom extends in the epitaxial loayer of this below, tagma, and in terminal trenches, is formed with floating grid.
7. superpotential as claimed in claim 1 is built rectifier, it is characterized in that, the top of controlling grid extends upwardly to the end face that protrudes from epitaxial loayer, and controls that the grid top extends upward and the part that exceeds the epitaxial loayer end face is covered by in described anode metal layer.
8. the preparation method that superpotential is built rectifier, is characterized in that, comprises the following steps:
Step S1, provide semi-conductive substrate, comprise an epitaxial loayer of a base substrate and the growth of base substrate top, utilize the hard mask with patterns of openings that covers the epitaxial loayer top, in epitaxial loayer, etch a plurality of gate trenchs;
Step S2, in the bottom of gate trench and sidewall, generate grid oxic horizon, then formation control grid in gate trench, remove described hard mask afterwards, and the top that makes to control grid extends upwardly to the end face that protrudes from epitaxial loayer;
Step S3, at the top of epitaxial loayer, implant alloy and form this tagma, and then at the top in this tagma, implant alloy and form a doped region;
Step S4, at the end face of epitaxial loayer with above controlling grid, generate a cushion oxide layer, control the top of grid and control that the grid top extends upward and the sidewall that exceeds the part of epitaxial loayer end face is all covered by cushion oxide layer;
Step S5, return to carve described cushion oxide layer, form to cover and control the grid top and extend upward and exceed the side wall on the sidewall of part of epitaxial loayer end face, and expose the zone that the upper surface of described doped region is not covered by side wall;
Step S6, in doped region, this tagma, etch and run through doped region and extend downward the contact hole in this tagma;
Step S7, in this tagma of contact hole bottom periphery, implant the body contact zone, then remove side wall;
Step S8, in described contact hole, form metal plug and on described epitaxial loayer deposition one anode metal layer, control that the grid top extends upward and the part that exceeds the epitaxial loayer end face is covered by in described anode metal layer.
9. method as claimed in claim 8, it is characterized in that, in step S1, when forming described gate trench, also utilize described hard mask in epitaxial loayer, to etch an annular isolation groove and a plurality of terminal trenches, gate trench and terminal trenches are respectively formed at inboard and the outside of isolated groove, thereby Semiconductor substrate is isolated the termination environment that groove is divided into the active area that is positioned at the isolated groove inboard and is positioned at the isolated groove outside.
10. method as claimed in claim 8, is characterized in that, in step S2, before forming grid oxic horizon, first, at sidewall and bottom growth one deck sacrificial oxide layer of groove, by wet etching, this sacrificial oxide layer removed thereafter.
11. method as claimed in claim 9, is characterized in that, and is in step S2, after forming grid oxic horizon, further comprising the steps of:
Deposit spathic silicon above hard mask, polysilicon also are filled in the opening in hard mask and are filled in gate trench, isolated groove and terminal trenches;
Remove the polysilicon of hard mask top, the polysilicon of filling in overlapping opening above it in gate trench and hard mask forms one and controls the polysilicon of filling in overlapping opening above it in grid, isolated groove and hard mask and form the polysilicon of filling in overlapping opening above it in a transition grid, terminal trenches and hard mask and form a floating grid;
Remove afterwards described hard mask.
12. method as claimed in claim 11, it is characterized in that, in step S8, first on the epitaxial loayer of active area and termination environment, deposit a metal level, then the metal level that etches away termination environment only remains with the metal level in source region, the peripheral part that is retained in the metal level of active area covers on the top of inboard part of close active area of transition grid, as an anode metal layer, the metal level of the over top of the Outboard Sections of the close termination environment of transition grid is etched away in the lump together with the metal level of termination environment.
13. method as claimed in claim 8, is characterized in that, described base substrate, epitaxial loayer and doped region are the doping type of the first conduction type, and described this tagma and body contact zone are the second conduction type with described the first conductivity type opposite.
14. method as claimed in claim 8, is characterized in that, in step S2, before removing described hard mask, first on the top end face of controlling grid, forms a buffer oxide layer; And
In step S4, the buffer oxide layer of controlling the grid top is covered by described cushion oxide layer; And
In step S5, return and carve the composite bed of controlling grid upper pad oxide layer and buffer oxide layer, form and be retained in a screen oxide of controlling the grid top, thereby in step S6, utilize screen oxide and side wall to form contact hole as etch mask.
15. method as claimed in claim 11, is characterized in that, in step S2, before removing described hard mask, first controlling formation one buffer oxide layer on grid, transition grid and floating grid top end face separately; And
In step S4, control grid, transition grid and the floating grid buffer oxide layer of top are separately all covered by described cushion oxide layer; And
In step S5, return to carve control grid, transition grid and the floating grid composite bed of upper pad oxide layer and buffer oxide layer separately, formation is retained in their screen oxide of top separately, thereby in step S6, utilizes screen oxide and side wall to form contact hole as etch mask.
16. method as claimed in claim 11, is characterized in that, adjusts the distance between the adjacent end groove and adjust near the terminal trenches of isolated groove and the distance between isolated groove;
The a pair of floating grid that makes arbitrary neighborhood top separately protrudes from the gap between the part of epitaxial loayer end face, and protrude from the gap between the part of epitaxial loayer end face and part that transition grid top protrudes from the epitaxial loayer end face near the floating grid top of transition grid, all in step S4, by the part of cushion oxide layer, filled expire fully;
Thereby ensure that the part that cushion oxide layer is filled in described gap can not returned and carve fully in step S5, with the epitaxial loayer that prevents termination environment, in step S6, etch contact hole.
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| CN109873029A (en) * | 2017-12-04 | 2019-06-11 | 贵州恒芯微电子科技有限公司 | A kind of trench gate super barrier rectifier |
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| CN104091826A (en) * | 2014-06-17 | 2014-10-08 | 江苏中科君芯科技有限公司 | Trench isolation IGBT device |
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| CN109427909A (en) * | 2017-08-25 | 2019-03-05 | 帅群微电子股份有限公司 | Semiconductor element and its manufacturing method |
| CN109509721A (en) * | 2017-09-14 | 2019-03-22 | 联华电子股份有限公司 | Semiconductor element and preparation method thereof |
| CN109509721B (en) * | 2017-09-14 | 2021-05-25 | 联华电子股份有限公司 | Semiconductor element and manufacturing method thereof |
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| WO2020063919A1 (en) * | 2018-09-29 | 2020-04-02 | 苏州东微半导体有限公司 | Semiconductor power device |
| CN113555416A (en) * | 2021-09-22 | 2021-10-26 | 四川上特科技有限公司 | Power diode device |
| CN113555416B (en) * | 2021-09-22 | 2021-12-31 | 四川上特科技有限公司 | Power diode device |
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