CN103400800A - Bosch etching method - Google Patents
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- CN103400800A CN103400800A CN2013103546709A CN201310354670A CN103400800A CN 103400800 A CN103400800 A CN 103400800A CN 2013103546709 A CN2013103546709 A CN 2013103546709A CN 201310354670 A CN201310354670 A CN 201310354670A CN 103400800 A CN103400800 A CN 103400800A
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Abstract
The invention provides a Bosch etching method. The method comprises the following steps: a substrate is fixed on a base in a reaction chamber, and a mask layer with an opening is formed on the substrate; etching is performed: etching gas is piped in, a source radio frequency power source is applied to the reaction chamber so as to maintain plasma concentration in the reaction chamber, meanwhile, a first bias power source is applied to the base, and partial substrate is etched along the opening so as to form an etching hole; deposition is performed: deposition gas is piped in, a second bias power source is applied to the base, deposition is performed on the side wall surface of the etching hole and the surface of the mask layer so as to form a polymer, wherein the frequency of the second bias power source is larger than that of the first bias power source; etching and deposition are performed repeatedly until a through hole is formed in the substrate. The Bosch etching method provided by the invention can guarantee the etching rate, and meanwhile has higher stability.
Description
Technical field
The present invention relates to field of semiconductor fabrication, particularly a kind of Bosch lithographic method.
Background technology
Along with the semiconductor technology development, the characteristic size of semiconductor device has become very little at present, hope increases semiconductor device in the encapsulating structure of two dimension quantity becomes more and more difficult, so three-dimension packaging becomes a kind of method that can effectively improve chip integration.Present three-dimension packaging comprises chip-stacked (Die Stacking), the encapsulation stacking (Package Stacking) and stacking based on the three-dimensional (3D) of silicon through hole (Through Silicon Via, TSV) based on the gold thread bonding.Wherein, utilize the three-dimensional stacked technology of silicon through hole to have following three advantages: (1) High Density Integration; (2) shorten significantly the length of electrical interconnection, thereby can solve well the problems such as signal delay that appear in two-dimentional system level chip (SOC) technology; (3) utilize silicon through hole technology, can integrate to realize the multi-functional of packaged chip to the chip with difference in functionality (as radio frequency, internal memory, logic, MEMS etc.).Therefore, the described three-dimensional stacked technology of silicon through hole interconnect structure of utilizing becomes a kind of comparatively popular chip encapsulation technology day by day.
In silicon through hole technology application, usually to carry out the deep via etching to materials such as silicon, the deep via that forms by etching is between chip and chip, make vertical conducting between silicon chip and silicon chip, thereby realizes the interconnection between chip and chip.In most of the cases, the silicon through hole is made all to be needed to get through different material layers, and the through hole that forms thus must meet profile control requirement (as verticality of side wall and roughness etc.), so the silicon via etch process becomes the key of silicon through hole manufacturing technology.
For the perpendicularity of the sidewall that improves through hole and the requirement of roughness, usually adopt the Bosch(Bosch during existing etch silicon through hole) etching technics, its detailed process is: Semiconductor substrate is provided, is formed with the photoresist mask layer with opening on described Semiconductor substrate; Carry out etch step: to passing into etching gas in etching cavity (such as SF
6), etching gas is dissociated into plasma, and described Semiconductor substrate is carried out etching, forms etched hole; Carry out deposition step: to passing into deposition gases in etching cavity (such as CF
4), deposition gases is dissociated into plasma, form polymer at the sidewall of etched hole, described polymer protects the sidewall of established etched hole can not be etched into when next etch step, thereby guarantees whole Bosch(Bosch) anisotropy of etching process; Repeat above-mentioned etch step and deposition step, until form the silicon through hole in Semiconductor substrate.
But, prior art Bosch(Bosch) and in etching process, the stability of etching technics still remains to be improved.
Summary of the invention
The problem that the present invention solves is to provide the Bosch(Bosch) stability of etching technics.
For addressing the above problem, the invention provides a kind of Bosch lithographic method, comprising: fixed substrate, to the interior pedestal of reaction chamber, is formed with the mask layer with opening on described substrate; Carry out etch step, pass into etching gas, apply the source radio frequency power source to reaction chamber to keep the plasma concentration in reaction chamber, the first bias power source that applies simultaneously to described pedestal, forms etched hole along the described substrate of opening etched portions; Carry out deposition step, pass into deposition gases, the second bias power source that applies is to described pedestal, and at sidewall surfaces and the mask layer surface deposition formation polymer of etched hole, the frequency in the second bias power source is greater than the frequency in the first bias power source; Repeat etch step and deposition step, until form through hole in described substrate.。
Optionally, the frequency in the second bias power source is greater than 2.5 times of the frequency in the first bias power source.
Optionally, the frequency in the first bias power source is less than or equal to 4Mhz, and the frequency in the second bias power source is more than or equal to 10Mhz.
Optionally, the frequency in the first bias power source is 360Khz～4Mhz, and the frequency in the second bias power source is 10Mhz～30Mhz.
Optionally, the frequency in the first bias power source is 400Khz～2Mhz, and the frequency in the second bias power source is 13Mhz～27Mhz.
Optionally, the etching gas of described etch step employing is SF
6And/or CF
4
Optionally, the gas of described etch step employing also comprises O
2
Optionally, the deposition gases of described deposition step employing is C
4F
8, C
4F
6, CHF
3, CH
2F
2, C
5F
8Or one or more in COS.
Optionally, the etch step time is 0.3～30 second, and the time of deposition step is 0.3～30 second.
Optionally, in etching process, the watt level of source radio frequency power source is 500～5000W, and the first bias power source or the second bias source power are 500～5000W.
Optionally, the material of described mask layer is photoresist, amorphous carbon, SiO
2, SiN, SiON, TiN, TaN, SiN, SiCN, SiC or BN.
Compared with prior art, technical scheme of the present invention has the following advantages:
Bosch lithographic method of the present invention, when carrying out etch step, the first bias power source frequency adopts lower frequency, make plasma have higher bombarding energy, thereby guarantee good etching directivity and etch rate faster, when carrying out deposition step, higher frequency is adopted in the second bias power source, the energy of the isoionic bombardment while making deposition is less, guarantee the stability of the polymer deposition of etched hole sidewall, reduce simultaneously the bombardment to mask layer, and can also can deposit the formation polymer on mask layer, protect mask layer in the subsequent etching step, therefore, Bosch lithographic method of the present invention, in the higher etch rate of maintenance, make mask layer can not be depleted in deposition step, and loss is less in etch step, make the etch topography of through hole of final formation better.
Further, the frequency in the second bias power source is more than or equal to 10Mhz, the frequency in described the second bias power source is 10Mhz～30Mhz, the second bias power source frequency is higher, under Same Efficieney, a little less than the acceleration of the second bias power source article on plasma, make isoionic bombarding energy very little, plasma deposition forms polymer at sidewall surfaces and the mask layer surface deposition of etched hole.Therefore in deposition step; plasma can be ignored to etching or the bombardment effect of mask layer; and the mask layer surface also can form certain thickness polymer; follow-up etch step can protect mask layer can internal consumption or the speed of consumption descend; in the stability that guarantees polymer deposition, reduced the bombardment to mask layer.
Further, the frequency in the first bias power source is less than or equal to 4Mhz, and the frequency in described the first bias power source is 360Khz～4Mhz.When carrying out etch step, the frequency in the first bias power source is low frequency, the frequency in the second bias power source of the frequency in the first bias power source during less than etch step, make under Same Efficieney, the time that plasma is accelerated is longer, plasma can obtain larger bombarding energy, good directivity and etch rate faster when guaranteeing etching.
Description of drawings
Fig. 1 is the schematic flow sheet of embodiment of the present invention Bosch lithographic method;
Fig. 2～Fig. 6 is the structural representation of embodiment of the present invention Bosch etching process.
Embodiment
existing Bosch(Bosch) in etching process, in order to obtain etch rate and better etched hole etching appearance faster, when etch step and deposition step, usually adopt the bias power source frequency of lower frequency, when etch step: when the bias power source frequency is low, accelerating time in equal power below-center offset power source article on plasma is elongated, thereby plasma can obtain larger bombarding energy, make the speed of etching very fast and keep good directivity, thereby improved etch rate and made the sidewall of etched hole keep pattern preferably, but, when plasma obtains larger bombarding energy, when the Semiconductor substrate etch rate is increased, can also can increase the etch rate of the photoresist mask on Semiconductor substrate equally, the wear rate of photoresist mask accelerates, when the photoresist mask is depleted to certain thickness, its effect as mask significantly weakens or does not exist, be unfavorable for that through hole continues etching, equally, when deposition step, when the bias power source frequency was low, the bombarding energy of plasma was also larger, and the thickness that makes the polymer that etched hole forms also can be thinner and the less stable of deposition, be unfavorable in etching process the protection to the etched hole sidewall, simultaneously, the bombarding energy of plasma is also larger, and plasma also can bombard photoresist layer, not only again on photoresist mask layer for the protection of polymeric layer, on the contrary photoresist mask layer is caused loss.
Although can improve the problems referred to above by the size that increases the bias power source frequency in etch step and biasing step, but the increase of bias power source frequency can make the speed of etching to reduce, and, because the bombarding energy of plasma reduces, can make the sidewall pattern variation of the etched hole of formation.
the present invention proposes a kind of Bosch lithographic method for this reason, when carrying out etch step, the first bias power source frequency adopts lower frequency, make plasma have higher bombarding energy, thereby guarantee good etching directivity and etch rate faster, when carrying out deposition step, higher frequency is adopted in the second bias power source, the energy of the isoionic bombardment while making deposition is less, guarantee the stability of the polymer deposition of etched hole sidewall, reduce simultaneously the bombardment to mask layer, and can also can deposit the formation polymer on mask layer, protect mask layer in the subsequent etching step, therefore, Bosch lithographic method of the present invention, in the higher etch rate of maintenance, make mask layer can not be depleted in deposition step, and loss is less in etch step, make the etch topography of through hole of final formation better.
, for above-mentioned purpose of the present invention, feature and advantage can more be become apparent, below in conjunction with accompanying drawing, specific embodiments of the invention are described in detail.When the embodiment of the present invention was described in detail in detail, for ease of explanation, schematic diagram can be disobeyed general ratio and be done local the amplification, and described schematic diagram is example, and it should not limit the scope of the invention at this.The three-dimensional space that should comprise in addition, length, width and the degree of depth in actual fabrication.
Fig. 1 is the schematic flow sheet of embodiment of the present invention Bosch lithographic method, comprising:
Step S101, fixed substrate, to the interior pedestal of reaction chamber, is formed with the mask layer with opening on described substrate;
Step S102, carry out etch step, passes into etching gas, apply the source radio frequency power source to reaction chamber to keep the plasma concentration in reaction chamber, the first bias power source that applies simultaneously to described pedestal, forms etched hole along the described substrate of opening etched portions;
Step S103, carry out deposition step, passes into deposition gases, and the second bias power source that applies is to described pedestal, and at sidewall surfaces and the mask layer surface deposition formation polymer of etched hole, the frequency in the second bias power source is greater than the frequency in the first bias power source;
Step S104, repeat etch step and deposition step, until form through hole in described substrate.
Be described in detail below in conjunction with the detailed process of accompanying drawing to above-mentioned Bosch lithographic method.Fig. 2～Fig. 6 is the structural representation of embodiment of the present invention Bosch etching process.
With reference to figure 2, substrate 200 is provided, be formed with the mask layer 201 with opening on described substrate 200.
Follow-up formation through hole in described substrate 200.The material of described substrate 200 is to be silicon (Si), germanium (Ge) or SiGe (GeSi), carborundum (SiC); Can be also silicon-on-insulator (SOI), germanium on insulator (GOI); Perhaps can also be for other material, such as the III such as GaAs-V compounds of group.In the present embodiment, the material of described substrate 200 is monocrystalline silicon.
In other embodiments of the invention, described substrate can also be the dielectric layer material, such as: silica, silicon nitride, advanced low-k materials or polymer etc.
In other embodiments of the invention, described substrate material can also be metal, such as: copper or aluminium etc.
The mask of described mask layer 201 during as subsequent etching substrate 200.Described mask layer 201 is single layer structure or multiple-level stack structure.
In embodiments of the invention, take mask layer 201 as single layer structure, do exemplary illustration, the material of described mask layer 201 is photoresist, amorphous carbon, SiO
2, SiN, SiON, TiN, TaN, SiN, SiCN, SiC or BN etc.In the present embodiment, the material of described mask layer 201 is photoresist, and graphical photoresist layer, form opening in photoresist layer, described opening exposes the surface of substrate 200, and position and the width of the through hole that forms in the position of opening and width and subsequent substrate 200 are corresponding.
In other embodiment of the present invention, when described mask layer was sandwich construction, described mask layer comprised the photoresist layer that is positioned at on-chip one or more layers hard mask layer and is positioned at the hard mask layer surface.Described hard mask material layer is SiO
2, one or more in SiN, SiON, TiN, TaN, SiN, SiCN, SiC or BN.
With reference to figure 3, carry out etch step, form etched hole 202 along the described substrate 200 of opening etched portions.
While carrying out etch step: at first need to pass into etching gas in etch chamber, apply the source radio frequency power source to reaction chamber to keep the plasma concentration (etching gas is dissociated into plasma under the effect of radio frequency power source) in reaction chamber, the plasma that forms accelerates under the effect in bias power source, substrate 200 is carried out etching (comprising physical bombardment etching and chemical etching).
The frequency in the first bias power source is less than or equal to 4Mhz, and the frequency in concrete described the first bias power source is 360Khz～4Mhz.In the present embodiment, the frequency in the first bias power source is 400Khz～2Mhz.When carrying out etch step, the frequency in the first bias power source is low frequency, the frequency in the first bias power source is less than the frequency in subsequent deposition step the second bias power source, make under Same Efficieney, the time that plasma is accelerated is longer, plasma can obtain larger bombarding energy, good directivity and etch rate faster when guaranteeing etching.
While carrying out etch step, the frequency in the first bias power source is low frequency, and the etching gas of employing can be SF
6, described etching gas also comprises O
2, the power of source radio frequency power source is 500～5000W, and the power of the first radio frequency power source is 500～5000W, and the time of etch step is 0.3～30 second, and the degree of depth of etched hole is 0.01～10 micron, the pattern of the etched hole 202 of formation is better.
With reference to figure 4, carry out deposition step, pass into deposition gases, the second bias power source that applies is to described pedestal, sidewall surfaces and mask layer 201 surface depositions at etched hole 202 form the frequency of the frequency in polymer 203, the second bias power sources greater than the first bias power source.
While carrying out deposition step: at first need to pass into deposition gases in etch chamber, deposition gases is dissociated into plasma under the effect of source radio frequency power source, plasma sidewall surfaces and mask layer 201 surface depositions at etched hole 202 under the effect in the second bias power source form polymer 203.Need to prove, in deposition step, the polymer that the bottom of etched hole also can forming section thickness.
When carrying out deposition step, the frequency in the second bias power source is high frequency, and 2.5 times of the frequency in the first bias power source of the frequency in the frequency first bias power source in the second bias power source during greater than etch step.While carrying out deposition step, the frequency in the second bias power source is higher, under Same Efficieney, a little less than the acceleration of the second bias power source article on plasma, make isoionic bombarding energy very little, plasma deposition forms polymer 203 at sidewall surfaces and mask layer 201 surface depositions of etched hole 202.Therefore in deposition step; plasma can be ignored to etching or the bombardment effect of mask layer 201; and mask layer 201 surfaces also can form certain thickness polymer, follow-up etch step can protect mask layer can internal consumption or the speed of consumption descend.
The frequency in the second bias power source is more than or equal to 10Mhz, and is concrete, and the frequency in described the second bias power source is 10Mhz～30Mhz.In the present embodiment, the frequency in the second bias power source is 13Mhz～27Mhz, in the stability that guarantees polymer deposition, has reduced the bombardment to mask layer.
While carrying out deposition step, the second bias power source frequency is high frequency, and described deposition gases is C
4F
8, C
4F
6, CHF
3, CH
2F
2, C
5F
8Or COS(carbonyl sulfide) one or more in, the power of source radio frequency power source is 500～5000W, the power of the second radio frequency power source is 500～5000W, the time of deposition step is 0.3～30 second, the thickness of polymer is 0.01～10 micron, in the stability that guarantees polymer deposition, reduced the bombardment to mask layer.
Then,, with reference to figure 5, carry out etch step, along opening, continue the described substrate 200 of etching, make the degree of depth of etched hole 202 increase.
In etching process, the sidewall of described polymer 203 protection etched holes 202 can not be etched, and polymer 203 the carrying out along with etching of etched hole 202 sidewalls can attenuation.The polymer on etched hole 202 bottoms and mask layer 201 surfaces is removed in etch step.
After having carried out etch step, then carry out deposition step, at the sidewall formation polymer of etched hole 202.The specific descriptions of etch step and deposition step please refer to aforesaid description.
, with reference to figure 6, repeat etch step and deposition step, until form through hole 205 in described substrate 200.
In the present embodiment, the through hole 205 of formation does not run through substrate 200.In other embodiments, described through hole 205 runs through substrate 200.
Follow-up, can form barrier layer in sidewall and the bottom of through hole 205, form the metal of filling full through hole on barrier layer.
Although the present invention discloses as above, the present invention not is defined in this.Any those skilled in the art, without departing from the spirit and scope of the present invention, all can make various changes or modifications, so protection scope of the present invention should be as the criterion with the claim limited range.
Claims (11)
1. a Bosch lithographic method, is characterized in that, comprising:
Fixed substrate, to the interior pedestal of reaction chamber, is formed with the mask layer with opening on described substrate;
Carry out etch step, pass into etching gas, apply the source radio frequency power source to reaction chamber to keep the plasma concentration in reaction chamber, the first bias power source that applies simultaneously to described pedestal, forms etched hole along the described substrate of opening etched portions;
Carry out deposition step, pass into deposition gases, the second bias power source that applies is to described pedestal, and at sidewall surfaces and the mask layer surface deposition formation polymer of etched hole, the frequency in the second bias power source is greater than the frequency in the first bias power source;
Repeat etch step and deposition step, until form through hole in described substrate.
2. Bosch lithographic method as claimed in claim 1, is characterized in that, the frequency in the second bias power source is greater than 2.5 times of the frequency in the first bias power source.
3. Bosch lithographic method as claimed in claim 1, is characterized in that, the frequency in the first bias power source is less than or equal to 4Mhz, and the frequency in the second bias power source is more than or equal to 10Mhz.
4. Bosch lithographic method as claimed in claim 3, is characterized in that, the frequency in the first bias power source is 360Khz～4Mhz, and the frequency in the second bias power source is 10Mhz～30Mhz.
5. Bosch lithographic method as claimed in claim 4, is characterized in that, the frequency in the first bias power source is 400Khz～2Mhz, and the frequency in the second bias power source is 13Mhz～27Mhz.
6. Bosch lithographic method as claimed in claim 1, is characterized in that, the etching gas that described etch step adopts is SF
6
7. Bosch lithographic method as claimed in claim 1, is characterized in that, the gas that described etch step adopts also comprises O
2
8. Bosch lithographic method as claimed in claim 1, is characterized in that, the deposition gases that described deposition step adopts is C
4F
8, C
4F
6, CHF
3, CH
2F
2, C
5F
8Or one or more in COS.
9. Bosch lithographic method as claimed in claim 1, is characterized in that, the etch step time is 0.3～30 second, and the time of deposition step is 0.3～30 second.
10. Bosch lithographic method as claimed in claim 1, is characterized in that, in etching process, the watt level of source radio frequency power source is 500～5000W, and the first bias power source or the second bias source power are 500～5000W.
11. Bosch lithographic method as claimed in claim 1, is characterized in that, the material of described mask layer is photoresist, amorphous carbon, SiO
2, SiN, SiON, TiN, TaN, SiN, SiCN, SiC or BN.
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| CN103700622A (en) * | 2013-12-27 | 2014-04-02 | 中微半导体设备(上海)有限公司 | Method for forming silicon through hole |
| CN104733372A (en) * | 2013-12-19 | 2015-06-24 | 中芯国际集成电路制造(上海)有限公司 | Manufacturing method for semiconductor component |
| CN105590843A (en) * | 2014-11-17 | 2016-05-18 | 北京北方微电子基地设备工艺研究中心有限责任公司 | Method for etching inclined hole |
| CN105845773A (en) * | 2016-03-30 | 2016-08-10 | 江苏欧达丰新能源科技发展有限公司 | Three-dimensional PN junction processing technology for solar battery cell |
| CN106783584A (en) * | 2015-11-19 | 2017-05-31 | 北京北方微电子基地设备工艺研究中心有限责任公司 | Substrate etching method |
| CN106816373A (en) * | 2015-11-30 | 2017-06-09 | 台湾积体电路制造股份有限公司 | The method for manufacturing semiconductor device |
| CN108573974A (en) * | 2017-03-14 | 2018-09-25 | 中芯国际集成电路制造(上海)有限公司 | Memory and forming method thereof |
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| CN105845773A (en) * | 2016-03-30 | 2016-08-10 | 江苏欧达丰新能源科技发展有限公司 | Three-dimensional PN junction processing technology for solar battery cell |
| CN108573974A (en) * | 2017-03-14 | 2018-09-25 | 中芯国际集成电路制造(上海)有限公司 | Memory and forming method thereof |
| CN108648994A (en) * | 2018-05-15 | 2018-10-12 | 长江存储科技有限责任公司 | Forming method, groove structure and the memory of groove structure |
| CN110190027A (en) * | 2019-07-02 | 2019-08-30 | 武汉新芯集成电路制造有限公司 | The production method of semiconductor devices |
| WO2023199450A1 (en) * | 2022-04-13 | 2023-10-19 | Hitachi High-Tech Corporation | Plasma processing method and plasma processing device |
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