CN103377914A - Improved structure of copper metal on back of semiconductor component and processing method thereof - Google Patents
Improved structure of copper metal on back of semiconductor component and processing method thereof Download PDFInfo
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- CN103377914A CN103377914A CN2012101142937A CN201210114293A CN103377914A CN 103377914 A CN103377914 A CN 103377914A CN 2012101142937 A CN2012101142937 A CN 2012101142937A CN 201210114293 A CN201210114293 A CN 201210114293A CN 103377914 A CN103377914 A CN 103377914A
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Abstract
The invention discloses an improved structure of copper metal on the back of a semiconductor component and a processing method thereof. The improved structure comprises in order from top to bottom an active layer, a substrate, a backside metal seed layer, at least one thermal expansion buffer layer, a metal layer and at least one metal anti-oxidation layer, wherein the backside metal seed layer is made of palladium (Pd) and a thermal expansion coefficient of the thermal expansion buffer layer is between that of the backside metal seed layer and that of the backside metal layer. By use of the improved structure, a semiconductor chip is provided with a characteristic of high-temperature operation; after a high-temperature test, all the metal structure layers on the back of the semiconductor chip still maintain structural integrity and are not liable to produce voids and cracks; and therefore the characteristic of high-temperature operation of the chip is effectively enhanced.
Description
Technical field
Structure-improved and the processing method thereof of the relevant a kind of semiconductor element back side of the present invention copper metal, espespecially a kind of with copper metal layer as metal layer on back, and with palladium (Pd) metal level as this back metal Seed Layer, and between two metal levels, increase by a thermal expansion resilient coating, make semiconductor element have the characteristic of high temperature resistant operation.
Background technology
The technique that usually can comprise back face metalization in the middle of the processing of semiconductor element, the process relation of this back face metalization is to the characteristics such as rupture strength, heat radiation and ground connection of semiconductor element.Fig. 1 is an existing semiconductor element back side copper metal structure schematic diagram, and wherein structure includes a substrate 101, a diffusion impervious layer 105, a stress elimination metal level 107, a metal layer on back 109 and an anti oxidation layer 111 successively; Wherein this diffusion impervious layer 105 is to be formed under this substrate 101, and the material of this diffusion impervious layer 105 is tantalum nitride (TaN), and major function is to stop that other metal materials diffuse into this substrate 101, and then element is had a negative impact; It is to be formed under this diffusion impervious layer 105 that this stress is eliminated metal level 107, and the material that this stress is eliminated metal level 107 be gold (Au), and major function is to slow down or eliminates it and descends structure to peel off because of the structure that inhomogeneous expansion or contraction cause; The material of this metal layer on back 109 is copper (Cu), and its thickness needs enough to support this substrate 101 suffered stress when encapsulation, and the while also can help the element radiating on this substrate 101; The material of this anti oxidation layer 111 is gold (Au), can prevent this metal layer on back 109 oxidations.
Yet with tantalum nitride (TaN) as diffusion impervious layer, with gold (Au) as stress eliminate metal level, again with copper (Cu) as metal layer on back, this three-decker Material selection is for the performance of the high temperature resistant operation of semiconductor element and desirable not to the utmost; The heat radiation of semiconductor element and high-temperature stability are very important problems now, if the high-temperature stability of this element is undesirable, may cause semiconductor element because of overheated and impaired, especially when semiconductor element has back side guide hole, usually the depth-to-width ratio of back side guide hole is all very large, and under high-temperature operation, this three-decker is easier to produce the space, slight crack occurs, the phenomenon such as peel off, cause the situation of imperfect earth, and make this semiconductor element impaired.
In view of this, the present invention is in order to improve above-mentioned shortcoming, the present invention proposes a kind of structure-improved and processing method thereof of semiconductor element back side copper metal of high temperature resistant operation, not only can effectively promote the high temperature resistant operating characteristic of semiconductor element, reduce element because of overheated and impaired probability, can improve again simultaneously the heat-conducting effect of chip, and reduce material cost.
Summary of the invention
Main purpose of the present invention is to provide structure-improved and the processing method thereof of a kind of semiconductor element back side copper metal, helps the high temperature resistant operating characteristic of lift element.
To achieve the above object, semiconductor element provided by the invention back side copper metal structure-improved from top to bottom sequentially includes an active layers, a substrate, a back metal Seed Layer, at least one thermal expansion resilient coating, a metal layer on back;
Wherein this active layers is to include at least one integrated circuit;
Wherein the material of this back metal Seed Layer is palladium (Pd);
Wherein the material of this metal layer on back is copper (Cu); And
Wherein the thermal coefficient of expansion of this thermal expansion resilient coating is between this back metal Seed Layer and this metal layer on back.
When implementing, the material of aforesaid this thermal expansion resilient coating is the alloy of nickel (Ni), silver (Ag) and nickel.
When implementing, the thickness of aforesaid this thermal expansion resilient coating be greater than 0.01 μ m less than 5 μ m between.
When implementing, also can in the middle of above-mentioned structure, in the below of this metal layer on back, further cover at least primary antibodie metal oxide layer.
When implementing, the material of aforementioned anti-oxidant metal layer is the alloy of nickel (Ni), gold (Au), palladium (Pd) or nickel gold, nickel palladium, porpezite.
The present invention also provides a kind of structure improved processing method of semiconductor element back side copper metallization of high temperature resistant operation, may further comprise the steps:
In a substrate front side, form an active layers, and this active layers is to include at least one integrated circuit;
In this substrate back, produce the back side guide hole of requirement with exposure imaging and etching technique;
Plate a back metal Seed Layer in this substrate back, make this back metal Seed Layer cover the hole wall of this substrate back and this back side guide hole, and the material of this back metal Seed Layer is palladium (Pd);
Plate at least one thermal expansion resilient coating, make this thermal expansion resilient coating cover this back metal Seed Layer; And
Plate a metal layer on back, make this metal layer on back cover this thermal expansion resilient coating, and the material of this metal layer on back is copper (Cu);
Wherein the thermal coefficient of expansion of this thermal expansion resilient coating is between this back metal Seed Layer and this metal layer on back.
When implementing, the material of aforesaid this thermal expansion resilient coating is the alloy of nickel (Ni), silver (Ag) and nickel.
When implementing, the thickness of aforesaid this thermal expansion resilient coating be greater than 0.01 μ m less than 5 μ m between.
When implementing, also can below this metal layer on back, define the position of at least one street shape metal level groove with the exposure imaging technology; Then this metal layer on back is carried out etching, make this etch-stop in this thermal expansion resilient coating, and then produce street shape metal level groove; Plate at last at least one anti-oxidant metal layer, make this anti-oxidant metal layer cover this metal layer on back and this street shape metal level groove, oxidized to prevent this metal layer on back.
When implementing, the material of aforementioned this anti-oxidant metal layer of formation is the alloy of nickel (Ni), gold (Au), palladium (Pd) or nickel gold, nickel palladium, porpezite.
Use structure of the present invention, can make semiconductor chip have the characteristic of high temperature resistant operation; Each structured metal layer at its back side is still kept the integrality of its structure by behind the high temperature test, and is difficult for producing space and slight crack, effectively strengthens the high temperature resistant operating characteristic of chip.
For for characteristics of the present invention and interaction energy more deep understanding being arranged, mat embodiment cooperates graphic being specified in to open hereby.
Description of drawings
Fig. 1 is the cross-sectional view of an existing back side copper metallization technology;
Fig. 2 A is the cross-sectional view before the present invention prepares back side copper metallization;
Fig. 2 B is the cross-sectional view of the back side of the present invention copper metallization technology;
Fig. 2 C is the cross-sectional view behind the shape metal level groove of etching street in the copper metallization technology of the back side of the present invention;
Fig. 2 D is the cross-sectional view that plates in the copper metallization technology of the back side of the present invention behind the anti oxidation layer;
Fig. 3 is the flow chart of the structure improved processing method of this name semiconductor element back side copper metal.
Description of reference numerals: 101-substrate; The 103-active layers; The 105-diffusion impervious layer; 107-stress is eliminated gold (Au) layer; The 109-metal layer on back; The 111-anti oxidation layer; The 201-substrate; The 203-active layers; 205-back metal Seed Layer; 207-thermal expansion resilient coating; The 209-metal layer on back; The 211-anti oxidation layer; 213-back side guide hole; 215-street shape metal level groove.
Embodiment
Fig. 2 A is the cross-sectional view of the present invention before carrying out back side copper metal processing, comprising a substrate 201, wherein this substrate 201 typically uses the semi-conducting materials such as GaAs (GaAs), indium phosphide (InP), gallium nitride (GaN) or carborundum (SiC) and consists of; Be provided with an active layers 203 in the front of this substrate 201, this active layers 203 then is to have comprised at least one integrated circuit that has completed; Because the integrated circuit in this active layers 203 needs earth point, therefore can produce at the back side of this substrate 201 back side guide hole 213 of requirement with etching technique, can allow the ground connection of the integrated circuit in this active layers 203 be connected to the access area of far-end configuration by this back side guide hole 213.
Shown in figure Fig. 2 B, be the generalized section of the back side of the present invention copper metal structure.In the back side of this substrate 201, sequentially plate a back metal Seed Layer 205, at least one thermal expansion resilient coating 207 and a metal layer on back 209; Wherein this back metal Seed Layer 205 is to cover the back side of this substrate 201 and the hole wall of this back side guide hole 213; This thermal expansion resilient coating 207 is to be formed under this back metal Seed Layer 205; This metal layer on back 209 then is formed under this thermal expansion resilient coating 207.The material of this back metal Seed Layer 205 is palladium (Pd), and its main function is to stop that other metals of below diffuse into this substrate 201.In addition, select palladium (Pd) as the material of this back metal Seed Layer 205, and will have better tack between this substrate 201.The material of this metal layer on back 209 is copper (Cu); And the thermal coefficient of expansion of the selected material of this thermal expansion resilient coating 207 need be between this back metal Seed Layer 205 and this metal layer on back 209.The material of this thermal expansion resilient coating 207 can be the alloy of nickel (Ni), silver (Ag) and nickel; And the material of working as this back metal Seed Layer 205 is palladium (Pd), the material of this thermal expansion resilient coating 207 is the alloy of nickel (Ni), silver (Ag) and nickel, and when the material of this metal layer on back 209 is copper (Cu), the combination of this trilaminate material structure will have better high temperature resistant operating characteristic, through after the High-Temperature Operating Test, be not easy to occur the phenomenon of metal-stripping, also can not cause the situation of semiconductor element imperfect earth, the reliability of semiconductor element is significantly improved.
Shown in figure Fig. 2 C, for having the cross-sectional view of street shape metal level groove in the copper metal structure of the back side of the present invention.This structure is the position that defines at least one street shape metal level groove 215 with the exposure imaging technology on this metal layer on back 209, again this metal layer on back 209 is carried out etching, make this etch-stop in this thermal expansion resilient coating 207, and then produce this street shape metal level groove 215 in this metal layer on back 209.
Shown in figure Fig. 2 D, for having the cross-sectional view of anti oxidation layer in the copper metal structure of the back side of the present invention.This structure is after etching this street shape metal level groove 215, under this metal layer on back 209, plate again at least one anti-oxidant metal layer 211, make this anti-oxidant metal layer 211 cover this metal layer on back 209 and this street shape metal level groove 215, and then prevent that this metal layer on back 209 is oxidized; Wherein the material of this anti-oxidant metal layer 211 is the alloy of nickel (Ni), gold (Au), palladium (Pd) or nickel gold, nickel palladium, porpezite.
Fig. 3 is the flow chart that shows the structure improved processing method of semiconductor element of the present invention back side copper metal.As shown in the figure, copper metal structure improved processing method in the aforesaid semiconductor element back side may further comprise the steps:
In a substrate front side, form an active layers, and this active layers is to include at least one integrated circuit;
In this substrate back, produce the back side guide hole of requirement with exposure imaging and etching technique;
Plate a back metal Seed Layer in this substrate back, make this back metal Seed Layer cover the back side of this substrate and the hole wall of this back side guide hole, and the material of this back metal Seed Layer is palladium (Pd);
Plate at least one thermal expansion resilient coating, make this thermal expansion resilient coating cover this back metal Seed Layer; And
Plate a metal layer on back, make this metal layer on back cover this thermal expansion resilient coating, the material of this metal layer on back is copper (Cu);
Wherein the thermal coefficient of expansion of this thermal expansion resilient coating is between this back metal Seed Layer and this metal layer on back.
In addition, as shown in Figure 3, when implementing, aforementioned processing method can further may further comprise the steps:
Define the position of at least one street shape metal level groove in this metal layer on back surface with the exposure imaging technology;
This metal layer on back is carried out etching, make this etch-stop in this thermal expansion resilient coating, and form street shape metal level groove in this metal layer on back surface; And
At least one anti-oxidant metal layer on this metal layer on back plated surface makes this anti-oxidant metal layer cover this metal layer on back and this street shape metal level groove.
In sum, the present invention is by using this back metal Seed Layer 205 of the present invention, the three-decker design of this thermal expansion resilient coating 207 and this metal layer on back 209, and the selection of this three-decker material, so that this three-decker be combined with better high temperature resistant operating characteristic, through after the High-Temperature Operating Test, be not easy the phenomenon that occurs peeling off, also can not cause the situation of semiconductor element imperfect earth, the reliability of semiconductor element is significantly improved, therefore the present invention can reach the purpose of expection really, and has the advantages such as good process stability and element reliability.The value that its true tool industry is utilized proposes patent application in accordance with the law.
Again above-mentioned explanation and graphic only be that embodiments of the invention are described, all ripe in this industry skill the personage, still can do the equivalence localized variation and modification, its do not break away from technology of the present invention with spirit.
Claims (10)
1. the structure-improved of a semiconductor element back side copper metal is characterized in that it includes:
One substrate;
One active layers be to be formed at this substrate front side, and this active layers includes at least one integrated circuit;
One back metal Seed Layer is the back side that is formed at this substrate, and the material of this back metal Seed Layer is palladium;
At least one thermal expansion resilient coating is the below that is formed at this back metal Seed Layer; And
One metal layer on back is the below that is formed at this thermal expansion resilient coating, and the material of this metal layer on back is copper;
Wherein the thermal coefficient of expansion of this thermal expansion resilient coating is between this back metal Seed Layer and this metal layer on back.
2. semiconductor element according to claim 1 back side copper metal structure-improved is characterized in that the material of this thermal expansion resilient coating is the alloy of nickel, silver and nickel.
3. semiconductor element according to claim 1 back side copper metal structure-improved is characterized in that, the thickness of this thermal expansion resilient coating be greater than 0.01 μ m less than 5 μ m between.
4. semiconductor element according to claim 1 back side copper metal structure-improved is characterized in that, in the below of this metal layer on back, further comprises at least one anti-oxidant metal layer.
5. semiconductor element according to claim 4 back side copper metal structure-improved is characterized in that the material of this anti-oxidant metal layer is the alloy of nickel, gold, palladium or nickel gold, nickel palladium, porpezite.
6. the structure improved processing method of semiconductor element back side copper metal is characterized in that, may further comprise the steps:
In a substrate front side, form an active layers, and this active layers is to include at least one integrated circuit;
In this substrate back, produce the back side guide hole of requirement with exposure imaging and etching technique;
Plate a back metal Seed Layer in this substrate back, make this back metal Seed Layer cover the back side of this substrate and the hole wall of this back side guide hole, and the material of this back metal Seed Layer is palladium;
Plate at least one thermal expansion resilient coating, make this thermal expansion resilient coating cover this back metal Seed Layer; And
Plate a metal layer on back, make this metal layer on back cover this thermal expansion resilient coating, the material of this metal layer on back is copper;
Wherein the thermal coefficient of expansion of this thermal expansion resilient coating is between this back metal Seed Layer and this metal layer on back.
7. processing method according to claim 6 is characterized in that, the material of this thermal expansion resilient coating is the alloy of nickel, silver and nickel.
8. processing method according to claim 6 is characterized in that, the thickness of this thermal expansion resilient coating be greater than 0.01 μ m less than 5 μ m between.
9. processing method according to claim 6 is characterized in that, further may further comprise the steps:
Define the position of at least one street shape metal level groove in this metal layer on back surface with the exposure imaging technology;
This metal layer on back is carried out etching, make this etch-stop in this thermal expansion resilient coating, and form street shape metal level groove in this metal layer on back surface; And
At least one anti-oxidant metal layer on this metal layer on back plated surface makes this anti-oxidant metal layer cover this metal layer on back and this street shape metal level groove.
10. processing method according to claim 9 is characterized in that, the material of this anti-oxidant metal layer is the alloy of nickel, gold, palladium or nickel gold, nickel palladium, porpezite.
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| CN2012101142937A CN103377914A (en) | 2012-04-18 | 2012-04-18 | Improved structure of copper metal on back of semiconductor component and processing method thereof |
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Cited By (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN106558564A (en) * | 2015-09-29 | 2017-04-05 | 稳懋半导体股份有限公司 | The structure-improved of copper metal on back of semiconductor component |
| CN107980171A (en) * | 2016-12-23 | 2018-05-01 | 苏州能讯高能半导体有限公司 | The manufacture method of semiconductor chip, semiconductor crystal wafer and semiconductor crystal wafer |
| CN109936911A (en) * | 2017-12-18 | 2019-06-25 | 东莞文殊电子科技有限公司 | A kind of pcb board and preparation method thereof |
| CN110429165A (en) * | 2019-08-29 | 2019-11-08 | 华南理工大学 | A kind of LED vertical chip and preparation method thereof based on silicon substrate |
| CN110767604A (en) * | 2019-10-31 | 2020-02-07 | 厦门市三安集成电路有限公司 | Compound semiconductor device and back copper processing method of compound semiconductor device |
| CN111384034A (en) * | 2018-12-29 | 2020-07-07 | 苏州能讯高能半导体有限公司 | Semiconductor chip, semiconductor wafer and manufacturing method thereof |
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| CN1720610A (en) * | 2002-11-27 | 2006-01-11 | 飞思卡尔半导体公司 | Thin CaAs die with copper back-metal structure |
| US20080081157A1 (en) * | 2006-08-07 | 2008-04-03 | Infineon Technologies Ag | Electronic device and production methods |
| TW201128704A (en) * | 2010-02-12 | 2011-08-16 | Win Semiconductors Corp | A method of processing copper backside metal layer for semiconductor chips |
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| CN1720610A (en) * | 2002-11-27 | 2006-01-11 | 飞思卡尔半导体公司 | Thin CaAs die with copper back-metal structure |
| US20080081157A1 (en) * | 2006-08-07 | 2008-04-03 | Infineon Technologies Ag | Electronic device and production methods |
| TW201128704A (en) * | 2010-02-12 | 2011-08-16 | Win Semiconductors Corp | A method of processing copper backside metal layer for semiconductor chips |
Cited By (9)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN106558564A (en) * | 2015-09-29 | 2017-04-05 | 稳懋半导体股份有限公司 | The structure-improved of copper metal on back of semiconductor component |
| CN106558564B (en) * | 2015-09-29 | 2019-08-27 | 稳懋半导体股份有限公司 | The structure-improved of copper metal on back of semiconductor component |
| CN107980171A (en) * | 2016-12-23 | 2018-05-01 | 苏州能讯高能半导体有限公司 | The manufacture method of semiconductor chip, semiconductor crystal wafer and semiconductor crystal wafer |
| CN109936911A (en) * | 2017-12-18 | 2019-06-25 | 东莞文殊电子科技有限公司 | A kind of pcb board and preparation method thereof |
| CN111384034A (en) * | 2018-12-29 | 2020-07-07 | 苏州能讯高能半导体有限公司 | Semiconductor chip, semiconductor wafer and manufacturing method thereof |
| CN111384034B (en) * | 2018-12-29 | 2022-03-04 | 苏州能讯高能半导体有限公司 | Semiconductor chip, semiconductor wafer and manufacturing method thereof |
| CN110429165A (en) * | 2019-08-29 | 2019-11-08 | 华南理工大学 | A kind of LED vertical chip and preparation method thereof based on silicon substrate |
| CN110767604A (en) * | 2019-10-31 | 2020-02-07 | 厦门市三安集成电路有限公司 | Compound semiconductor device and back copper processing method of compound semiconductor device |
| CN110767604B (en) * | 2019-10-31 | 2022-03-18 | 厦门市三安集成电路有限公司 | Compound semiconductor device and back copper processing method of compound semiconductor device |
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Application publication date: 20131030 |