CN103367371A - Manufacturing method of semiconductor device - Google Patents
Manufacturing method of semiconductor device Download PDFInfo
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- CN103367371A CN103367371A CN2012100919727A CN201210091972A CN103367371A CN 103367371 A CN103367371 A CN 103367371A CN 2012100919727 A CN2012100919727 A CN 2012100919727A CN 201210091972 A CN201210091972 A CN 201210091972A CN 103367371 A CN103367371 A CN 103367371A
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Abstract
The invention provides a manufacturing method of a semiconductor device. The manufacturing method comprises the steps of forming a silicon-germanium layer and a cover layer on a first substrate in sequence, forming a substrate CMOS (complementary metal oxide semiconductor) transistor in the cover layer, bonding and fixing the first substrate and a second substrate through a metal front dielectric layer, sequentially etching to remove the first substrate and the silicon-germanium layer so as to expose the cover layer, and finally forming a back side structure of the device on the cover layer. As the silicon-germanium layer and the cover layer have an excellent etching selection ratio, so that the cover layer can be protected in the process of etching the silicon-germanium layer, thereby protecting the substrate CMOS from being damaged by etching, and improving the performance of the semiconductor device.
Description
Technical field
The present invention relates to a kind of integrated circuit and make the field, relate in particular to a kind of manufacture method that is used to form the semiconductor device of backside illumination image sensing structure.
Background technology
The solid-state image sensor, such as CCD (Charge Coupled Device, charge coupled device) image sensor and CMOS (Complementary Metal Oxide Semiconductor, cmos memory) image sensor is used in (such as video camera, mobile phone etc.) in the various imaging devices.Along with the application of image sensor is more and more extensive, reducing gradually of Pixel Dimensions especially captures incident light as much as possible and becomes particularly important on the image sensor.
Generally, image sensor is front illumination image (Front Side Illumination, FSI) mode, forming photosensitive layer and lens is positioned on the active circuit in the front that is arranged on matrix, photosensitive layer and lens are positioned at up and down both sides of metal level, dielectric layer, and light sees through lens, metal level, dielectric layer arrival photosensitive layer.Because the obstruction of metal level and dielectric layer and the refraction of light, reflection etc. greatly reduce so that arrive the light total amount of photosensitive layer, such result is the sensitivity that has reduced image sensor.
In order to obtain higher sensitivity, backside illumination image (Back Side Illumination, BSI) sensor is developed application.Backside illumination image sensor forms photosensitive area at the back side of matrix (forming the relative another side of face with active circuit on matrix) usually, the front of matrix is used to form active device, dielectric layer and metal level, light can arrive photosensitive area from the back side of matrix, realizes backside illumination.
The lens of backside illumination image sensor, photosensitive layer and metal level, dielectric layer are positioned on two faces of matrix, therefore backside illumination image sensor has short light path path, therefore have better sensing susceptibility and antijamming capability, light directly arrives photosensitive layer through lens simultaneously, therefore less light is depleted, thereby so that image sensor has higher sensitivity.
For making photosensitive area can absorb more multi-photon, to improve detection sensitivity and antijamming capability, need the thickness at the further attenuate matrix back side.A kind of method of prior art is the back side of attenuate matrix at first, be formed with the device architectures such as source circuit in the front of the matrix of attenuate again, the back side at the matrix of attenuate forms image sensor, yet thinner matrix has relatively poor bearing capacity, and matrix easily produces damage even fracture when forming semiconductor device structure; It is that the front of at first matrix is formed with the device architecture semiconductor device structures such as source circuit that another kind is improved one's methods, then the back side of etching thinning matrix, form image sensor at the back side of described matrix again, yet the method is uncontrollable etching degree usually, overetch damage semiconductor device structure.Have the device structure of requirement for other back side sizes to matrix, have equally the problem of uncontrollable etching degree.
Summary of the invention
The purpose of this invention is to provide in a kind of process forming the device structure, can effectively control the etching degree, reduce the manufacture method to the semiconductor device of semiconductor device damage.
The invention provides a kind of manufacture method of semiconductor device, may further comprise the steps: the first matrix and the second matrix; On described the first matrix, form successively germanium-silicon layer and cover layer; In described cover layer, form matrix CMOS transistor, and form before-metal medium layer at the first surface of described cover layer; Described the first matrix is bonding by described before-metal medium layer and described the second matrix; Described the first matrix of flip vertical, etching is removed described the first matrix and germanium-silicon layer successively, to expose described cover layer; Form the device structure at described cover layer.
Further, adopt epitaxial growth method to form described germanium-silicon layer.
Further, contain dopant in the described germanium-silicon layer, described dopant comprises carbon or boron, and the molar ratio of dopant is 1%～10% in the described germanium-silicon layer.
Further, the material of described cover layer is elementary silicon, adopts epitaxial growth method to form described cover layer.。
Further, the thickness of described germanium-silicon layer is greater than 50nm.
Further, in the described germanium-silicon layer content of germanium greater than 10%.
Further, the material of described cover layer is elementary silicon.
Further, the thickness of described cover layer is 500nm～5000nm.
Further, utilize hydrogen chloride or hydrogen fluoride etching to remove described germanium-silicon layer.
Further, utilize difluoromethane, carbon tetrafluoride, nitrogen and oxygen mixed gas etching to remove described germanium-silicon layer.
Further, described device structure is the backside illumination image sensing structure.Optionally, described backside illumination image sensing structure comprises lens and the photosensitive layer between lens and described cover layer.
In sum, the manufacture method of semiconductor device of the present invention is by forming successively germanium-silicon layer and cover layer on the first matrix, and in cover layer, form matrix CMOS transistor, thereafter the first matrix is adhesively fixed by before-metal medium layer and the second matrix, etching is removed the first matrix and germanium-silicon layer successively again, to expose described cover layer, last, form the device structure at described cover layer.Because germanium-silicon layer has better etching selection ratio with cover layer, thereby can remove protective cover layer in the process of germanium-silicon layer in etching, so the damage that is not etched of protection matrix CMOS transistor, the performance of raising semiconductor device.
Description of drawings
Fig. 1 is the schematic flow sheet of the manufacture method of semiconductor device in one embodiment of the invention.
Fig. 2～Fig. 9 is the structural representation in the manufacture process of semiconductor device in one embodiment of the invention.
Embodiment
For making content of the present invention more clear understandable, below in conjunction with Figure of description, content of the present invention is described further.Certainly the present invention is not limited to this specific embodiment, and the known general replacement of those skilled in the art also is encompassed in protection scope of the present invention.
Secondly, the present invention utilizes schematic diagram to carry out detailed statement, and when example of the present invention was described in detail in detail, for convenience of explanation, schematic diagram did not amplify according to general ratio is local, should be with this as limitation of the invention.
Fig. 1 is the schematic flow sheet of the manufacture method of semiconductor device in one embodiment of the invention.As shown in Figure 1, the invention provides a kind of manufacture method of semiconductor device, may further comprise the steps:
Step S01: the first matrix and the second matrix are provided;
Step S02: on described the first matrix, form successively germanium-silicon layer and cover layer;
Step S03: in described cover layer, form matrix CMOS transistor, and form before-metal medium layer at the first surface of described cover layer;
Step S04: described the first matrix is bonding by described before-metal medium layer and described the second matrix;
Step S05: described the first matrix of flip vertical, etching is removed described the first matrix and germanium-silicon layer successively, to expose described cover layer;
Step S06: form the backside illumination image sensing structure at described cover layer.
Fig. 2～Fig. 9 is the structural representation in the manufacture process of semiconductor device in one embodiment of the invention.Describe the manufacture method of semiconductor device in the present embodiment in detail below in conjunction with Fig. 1～Fig. 9.
As shown in Figures 2 and 3, in step S01, at first provide the first matrix 100 and the second matrix 200; The material of described the first matrix 100 and the second matrix 200 is the silicon material, can be for monocrystalline silicon, polysilicon, amorphous silicon etc., and in actual production technique, described the first matrix and the second matrix all can provide in the formation of full wafer wafer.Wherein said the first matrix 100 is as the substrate of sacrifice property, provide enough mechanical support abilities at follow-up formation matrix cmos device, and the first matrix 100 can be removed after forming the matrix cmos device, and described the second matrix 200 forms the multiple layer metal interconnection layer in subsequent technique.
As shown in Figure 4, in step S02, on the one side of described the first matrix 100, form successively germanium-silicon layer 102 and cover layer 104; Can adopt epitaxial growth method to form described germanium-silicon layer 102, contain dopant in the wherein said germanium-silicon layer 102, described dopant comprises carbon or boron, and the molar ratio of dopant is 1%～10% in the wherein said germanium-silicon layer 102.This germanium-silicon layer 102 can mix carbon or boron etc., dopant can reduce in epitaxial process, germanium-silicon layer 102 is not because lattice mates the stress of generation, the thickness of wherein said germanium-silicon layer 102 is greater than 50nm, wherein, the content of germanium is greater than 10% in the described germanium-silicon layer 102, and Ge content can guarantee when subsequent etching is removed described germanium-silicon layer 102 greater than 10%, produces the etching selection ratio larger with respect to the silicon material.The material of described cover layer 104 is elementary silicon, can adopt epitaxial growth method to form cover layer 104, and the thickness of wherein said cover layer 104 is 500nm～5000nm, follow-uply will form matrix CMOS transistor in described cover layers 104.
Continuation in step S03, forms matrix CMOS transistor 110 with reference to figure 4 in described cover layer 104; Described matrix CMOS transistor 110 comprises the structure of CMOS transistor active device, comprises such as fleet plough groove isolation structure 117, grid 111, is positioned at the source electrode 113 of grid 111 both sides and drains 115 etc., can also form back of the body through hole 114 in described cover layer 104; Then form before-metal medium layer 106 at described cover layer 104, in described before-metal medium layer 106, be formed for metal throuth hole 116 and metal lead wire 118 that matrix CMOS transistor 110 is drawn, the said structure forming process is technology well known to those of ordinary skill in the art, so repeat no more.
As shown in Figure 5, in step S04, described the first matrix 100 is bonding with described the second matrix 200 by described before-metal medium layer 106, in the present embodiment, adhesion process can for: with after described the first matrix 100 and described the second matrix 200 position alignment, between described before-metal medium layer 106 and described the second matrix 200, pass into the adhesive that can solidify, cooling off afterwards described adhesive makes it to solidify again, to realize being adhesively fixed of the first matrix 100 and the second matrix 200, adhesive be chosen as technology contents well known to those of ordinary skill in the art, so repeat no more.Other adhesive bonding methods are also within the inventive concept scope.
In step S05, described the first matrix 100 that overturns forms as shown in Figure 6 structure, and the first matrix 100 and germanium-silicon layer 102 are placed up; Then utilize dry etching to remove successively described the first matrix 100 and germanium-silicon layer 102, expose described cover layer 104, form as shown in Figure 7 structure.Wherein, described the first matrix 100 can adopt dry etching or alkaline solution such as TMAH (tetramethylammonium hydroxide) or KOH (potassium hydroxide) removal, described germanium-silicon layer 102 can utilize hydrogen chloride or hydrogen fluoride gas etching to remove, or utilizes difluoromethane, carbon tetrafluoride, nitrogen and oxygen mixed gas etching to remove.Above-mentioned etching material can produce larger etching selection ratio with respect to the cover layer 104 of silicon material when etch silicon germanium layer 102; thereby can preferably remove germanium-silicon layer 102; and reduce the transistorized etching injury of matrix CMOS to cover layer 104 and cover layer 104 below and then protection performance of semiconductor device.
Then, as shown in Figure 8, in step S06, described cover layer 104 form the device structure in the present embodiment described device structure be the backside illumination image sensing structure, described backside illumination image sensing structure comprises photosensitive layer 302 and lens 303 (Micolen), its forming process is included in covering barrier layer 301 on the described cover layer 104, utilize photoetching and etching technics to expose the zone of pre-formed photo-sensitive cell, form photosensitive layer 302 in this zone, described photosensitive layer 302 comprises colored filter (Color filter), then, form lens 303 at this photosensitive layer 302.In addition, in this step, also comprise, in barrier layer 301, form pad 305 in the zone corresponding with back of the body through hole shown in Figure 4 114 positions, so that semiconductor device is drawn by back of the body through hole 114.In addition, except the backside illumination image sensing structure, the device structure can also be that the back side forms MEMS (micro electro mechanical system), as forming gas sensitive element device, pressure components and parts etc.
After this, the second matrix 200 shown in 8 and cover layer 102 are overturn, form as shown in Figure 9 structure, carry out follow-up technique, in described the second substrate 200, form the structures such as metal throuth hole, metal lead wire and pad, thereby finish manufacturing and the encapsulation of semiconductor device.
In sum, the manufacture method of semiconductor device of the present invention is by forming successively germanium-silicon layer and cover layer on the first matrix, and in cover layer, form matrix CMOS transistor, thereafter the first matrix is adhesively fixed by before-metal medium layer and the second matrix, etching is removed the first matrix and germanium-silicon layer successively again, to expose described cover layer, last, form the device structure at described cover layer.Because germanium-silicon layer has better etching selection ratio with cover layer, thereby can remove protective cover layer in the process of germanium-silicon layer in etching, so the damage that is not etched of protection matrix CMOS transistor, the performance of raising semiconductor device.
Although the present invention discloses as above with preferred embodiment; so it is not to limit the present invention; have in the technical field under any and usually know the knowledgeable; without departing from the spirit and scope of the present invention; when can doing a little change and retouching, so protection scope of the present invention is as the criterion when looking claims person of defining.
Claims (14)
1. the manufacture method of a semiconductor device comprises:
The first matrix and the second matrix are provided;
On described the first matrix, form successively germanium-silicon layer and cover layer;
In described cover layer, form matrix CMOS transistor, and form before-metal medium layer at the first surface of described cover layer;
Described the first matrix is bonding by described before-metal medium layer and described the second matrix;
Overturn described the first matrix successively etching remove described the first matrix and germanium-silicon layer, to expose described cover layer;
Form the device structure at described cover layer.
2. the manufacture method of semiconductor device as claimed in claim 1 is characterized in that, adopts epitaxial growth method to form described germanium-silicon layer.
3. the manufacture method of semiconductor device as claimed in claim 1 is characterized in that, contains dopant in the described germanium-silicon layer.
4. the manufacture method of semiconductor device as claimed in claim 3 is characterized in that, described dopant comprises carbon or boron.
5. the manufacture method of semiconductor device as claimed in claim 3 is characterized in that, the molar ratio of dopant is 1%～10% in the described germanium-silicon layer.
6. the manufacture method of semiconductor device as claimed in claim 1 is characterized in that, the material of described cover layer is elementary silicon.
7. the manufacture method of semiconductor device as claimed in claim 6 is characterized in that, adopts epitaxial growth method to form described cover layer.
8. the manufacture method of semiconductor device as claimed in claim 1 is characterized in that, the thickness of described germanium-silicon layer is greater than 50nm.
9. the manufacture method of semiconductor device as claimed in claim 1 is characterized in that, the content of germanium is greater than 10% in the described germanium-silicon layer.
10. the manufacture method of semiconductor device as claimed in claim 1 is characterized in that, the thickness of described cover layer is 500nm～5000nm.
11. the manufacture method of semiconductor device as claimed in claim 1 is characterized in that, utilizes hydrogen chloride or hydrogen fluoride etching to remove described germanium-silicon layer.
12. the manufacture method of semiconductor device as claimed in claim 1 is characterized in that, utilizes the mist etching of difluoromethane, carbon tetrafluoride, nitrogen and oxygen to remove described germanium-silicon layer.
13. the manufacture method such as the described semiconductor device of any one in the claim 1 to 12 is characterized in that described device structure is the backside illumination image sensing structure.
14. the manufacture method of semiconductor device as claimed in claim 13 is characterized in that, described backside illumination image sensing structure comprises lens and the photosensitive layer between lens and described cover layer.
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| CN201210091972.7A CN103367371B (en) | 2012-03-31 | 2012-03-31 | The manufacture method of semiconductor device |
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| CN201210091972.7A CN103367371B (en) | 2012-03-31 | 2012-03-31 | The manufacture method of semiconductor device |
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| CN103367371A true CN103367371A (en) | 2013-10-23 |
| CN103367371B CN103367371B (en) | 2015-12-16 |
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Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN112771649A (en) * | 2019-08-28 | 2021-05-07 | 玛特森技术公司 | Method for treating a workpiece with fluorine radicals |
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| CN101728311A (en) * | 2008-10-10 | 2010-06-09 | 索尼株式会社 | SOI substrate and method for producing same, solid-state image pickup device and method for producing same, and image pickup apparatus |
| CN101752310A (en) * | 2008-12-02 | 2010-06-23 | 上海华虹Nec电子有限公司 | CMOS (complementary metal-oxide-semiconductor) image sensor and manufacture method thereof |
| US20100167447A1 (en) * | 2008-12-26 | 2010-07-01 | Mun Hwan Kim | Method for manufacturing back side illuminaton image sensor |
| US20110136290A1 (en) * | 2009-12-07 | 2011-06-09 | Ko Ki-Hyung | Etching methods and methods of manufacturing a cmos image sensor using the same |
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Patent Citations (5)
| Publication number | Priority date | Publication date | Assignee | Title |
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| CN101292341A (en) * | 2005-08-26 | 2008-10-22 | Memc电子材料有限公司 | Method for the manufacture of a strained silicon-on-insulator structure |
| CN101728311A (en) * | 2008-10-10 | 2010-06-09 | 索尼株式会社 | SOI substrate and method for producing same, solid-state image pickup device and method for producing same, and image pickup apparatus |
| CN101752310A (en) * | 2008-12-02 | 2010-06-23 | 上海华虹Nec电子有限公司 | CMOS (complementary metal-oxide-semiconductor) image sensor and manufacture method thereof |
| US20100167447A1 (en) * | 2008-12-26 | 2010-07-01 | Mun Hwan Kim | Method for manufacturing back side illuminaton image sensor |
| US20110136290A1 (en) * | 2009-12-07 | 2011-06-09 | Ko Ki-Hyung | Etching methods and methods of manufacturing a cmos image sensor using the same |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN112771649A (en) * | 2019-08-28 | 2021-05-07 | 玛特森技术公司 | Method for treating a workpiece with fluorine radicals |
| CN112771649B (en) * | 2019-08-28 | 2022-04-19 | 玛特森技术公司 | Method for treating a workpiece with fluorine radicals |
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| CN103367371B (en) | 2015-12-16 |
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