JP2010232420A - Wafer for rear surface irradiation type solid-state image pickup element, manufacturing method thereof, and rear surface irradiation type solid-state image pickup element - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a manufacturing method of a wafer for a solid-state image pickup element capable of enormously increasing a yield by reducing thickness variations in a simple and easy way, thereby improving working accuracy, and to provide a wafer for a solid-state image pickup element manufactured by the method and a solid-state image pickup element. <P>SOLUTION: The manufacturing method of the rear surface irradiation type solid-state image pickup element is characterized by a process to form the wafer for the rear surface irradiation type solid-state image pickup element as indicated below. From the rear surface on the side of the material wafer of an epitaxial wafer that has been formed by growing a first epitaxial layer and a second epitaxial layer on the material wafer, and at least 80% of the thickness of the material wafer is removed by grinding. Then, the remaining material wafer after being ground is removed by etching using a predetermined etchant, and the first epitaxial layer is removed by grinding. Meanwhile, the manufacturing method is also characterized in that the first epitaxial layer is a high-concentration boron doped silicon layer, and that the etchant is an alkali etching liquid. <P>COPYRIGHT: (C)2011,JPO&INPIT

Description

  The present invention relates to a back-illuminated solid-state image sensor wafer, a method for manufacturing the same, and a back-illuminated solid-state image sensor, and more particularly to a method for manufacturing a back-illuminated solid-state image sensor wafer used for a mobile phone, a digital video camera, and the like. .

  In recent years, high-performance solid-state imaging devices using semiconductors are mounted on mobile phones and digital video cameras. The performance required for this solid-state imaging device includes high pixels and the ability to capture moving images. In order to realize the capturing of moving images, a high-speed arithmetic element and a memory element are used. Therefore, a CMOS image sensor with easy system on chip (SoC) is used, and the miniaturization of this CMOS image sensor has been extended.

  However, with the miniaturization of the CMOS image sensor, the aperture ratio of the photodiode, which is a photoelectric conversion element, inevitably decreases. As a result, the quantum efficiency of the photoelectric conversion element decreases, and the S / N ratio of the imaging data decreases. There is a problem that improvement is difficult. For this reason, a method of increasing the amount of incident light by inserting an inner lens on the surface side of the photoelectric conversion element has been tried, but a remarkable improvement in the S / N ratio has not been realized at present.

  Therefore, an attempt is made to make light incident from the back surface of the photoelectric conversion element in order to improve the S / N ratio of image data by increasing the amount of incident light. The greatest merit of light incidence from the back surface of the element is that there are no restrictions due to reflection and diffraction on the surface of the element and the light receiving area of the element, compared to incidence from the front surface. On the other hand, when light is incident from the back surface, light absorption of the silicon wafer, which is the substrate of the photoelectric conversion element, must be suppressed, and the thickness of the entire solid-state imaging element needs to be less than 50 μm. As a result, it is difficult to process and handle the solid-state imaging device, so that the productivity is extremely bad.

  For the purpose of overcoming the above technical problem, for example, back-illuminated solid-state imaging devices as disclosed in Patent Document 1 and Patent Document 2 are cited.

JP 2007-13089 A JP 2007-59755 A

  In Patent Document 1, a support substrate is bonded to ensure strength, and then the semiconductor substrate is thinned, and the support substrate is thinned to form a through wiring, so that the surface opposite to the irradiation surface can be easily and easily formed. A method of manufacturing a solid-state imaging device capable of manufacturing a back-illuminated CMOS solid-state imaging device having a configuration in which an electrode is extracted from the same is disclosed.

  Further, Patent Document 2 discloses a solid-state imaging device that can reduce internal stress and strain of a semiconductor substrate and can perform process processing such as color filters and microlenses on a thinned semiconductor substrate surface with high accuracy. And a method of manufacturing the same.

  By the way, as a characteristic requested | required of the wafer for back irradiation type solid-state image sensors, the thickness dispersion | variation is mentioned. In the thin backside illumination type solid-state imaging device wafer as described above, this thickness variation significantly affects the characteristics of the solid-state imaging device. If the thickness variation is large, the quantum efficiency is lowered and the manufacturing yield is poor. Therefore, there is a problem that the cost becomes high.

  An object of the present invention is to provide a method for manufacturing a wafer for backside illumination type solid-state imaging device capable of dramatically improving yield by reducing thickness variation and improving processing accuracy simply and easily. The object of the present invention is to provide a wafer for backside illumination type solid-state imaging device and a backside illumination type solid-state imaging device manufactured by the above.

In order to achieve the above object, the gist of the present invention is as follows.
(1) A method for manufacturing a wafer for backside illumination type solid-state imaging device having a plurality of pixels including a photoelectric conversion element and a charge transfer transistor on the front surface side and having a back surface as a light-receiving surface, At least 80% of the thickness of the material wafer is removed by grinding from the back side of the material wafer side of the epitaxial wafer formed by sequentially growing the epitaxial layer and the second epitaxial layer, and the material wafer remaining by the grinding is removed. Using a predetermined etching solution to remove the first epitaxial layer as a stopper layer by etching, and removing the first epitaxial layer by polishing to form a back-illuminated solid-state imaging device wafer. The first epitaxial layer is a high-concentration boron-added silicon layer, and the etching solution Wafer for backside illumination type solid imaging device manufacturing method characterized in that an alkaline etching solution.

  (2) Before the step of growing the first epitaxial layer, the method further includes a step of forming a polysilicon film on the entire surface of the material wafer opposite to the surface on which the first epitaxial layer is grown. The manufacturing method of the wafer for back irradiation type solid-state image sensors as described in said (1).

(3) The method for manufacturing a wafer for backside illumination type solid-state imaging device according to (1) or (2), wherein the boron concentration of the high-concentration boron-added silicon layer is 10 ¹⁸ to 10 ¹⁹ atoms / cm ³ .

  (4) The said raw material wafer is a manufacturing method of the wafer for back irradiation type solid-state image sensors as described in said (1), (2) or (3) which is a carbon addition silicon wafer.

(5) The method for producing a wafer for backside irradiation type solid-state imaging device according to (4), wherein the carbon concentration of the carbon-added silicon wafer is 0.5 × 10 ^{16 to} 1.0 × 10 ¹⁷ atoms / cm ^3. .

  (6) The thickness of the said raw material wafer is a manufacturing method of the wafer for backside illumination type solid-state image sensors as described in any one of said (1)-(5) which is 100-800 micrometers.

  (7) The method of manufacturing a wafer for backside illumination type solid-state imaging device according to any one of (1) to (6), wherein the thickness of the first epitaxial layer is 0.1 to 10.0 μm.

  (8) The method for manufacturing a wafer for backside illumination type solid-state imaging device according to any one of (1) to (7), wherein the thickness of the second epitaxial layer is 1 to 10 μm.

  (9) The method for producing a wafer for backside illumination type solid-state imaging device according to any one of claims 4 to 8, wherein the carbon-added silicon wafer is preliminarily subjected to heat treatment at 600 to 700 ° C.

  (10) A wafer for backside illumination type solid-state imaging device manufactured by the method according to any one of (1) to (9), wherein the thickness variation is 0.1 to 0.5 μm, and A wafer for backside illumination type solid-state imaging device, wherein the quantum efficiency is 30 to 80%.

  (11) The wafer for backside illumination type solid imaging device according to (10) above, wherein the thickness of the wafer for backside illumination type solid imaging device is 2 to 50 μm.

  (12) A back-illuminated solid-state imaging device comprising a buried electrode for transferring image data connected to the pixels of the wafer for back-illuminated solid-state imaging device according to (10) or (11).

  According to the method for manufacturing a wafer for backside illumination type solid-state imaging device of the present invention, the backside illumination capable of dramatically improving the yield by reducing the thickness variation and improving the processing accuracy simply and easily. A solid-state imaging device wafer and a back-illuminated solid-state imaging device can be provided.

It is sectional drawing which shows typically the manufacturing process of the wafer for backside illumination type solid-state image sensors according to this invention.

  Next, embodiments of the present invention will be described with reference to the drawings. FIG. 1 schematically shows a cross-sectional view in a manufacturing process of a wafer for backside illumination type solid-state imaging device according to the present invention.

  The method for manufacturing a backside illumination type solid-state imaging device wafer 100 according to the present invention is formed by sequentially growing and forming a first epitaxial layer 102 and a second epitaxial layer 103 on a material wafer 101 as shown in FIG. As shown in FIG. 1B, at least 80% of the thickness of the material wafer 101 is removed by grinding from the back surface 104b of the epitaxial wafer 104 on the material wafer 101 side. This is because if the grinding is less than 80% of the thickness of the material wafer 101, the etching performed thereafter takes time and the production efficiency is lowered. In FIG. 1 (a), the surface 104a of the epitaxial wafer 104 shows a solid-state imaging element forming surface, and FIG. 1 (b) shows that the surface 104a of the epitaxial wafer is damaged during processing such as grinding. In order to prevent this, an example in which a BG (back grind) tape 105 is pasted on the surface 104a of this epitaxial wafer is shown.

  Thereafter, as shown in FIG. 1 (c), the material wafer 101 remaining after the grinding is removed by etching using the first epitaxial layer 102 as a stopper layer by using a predetermined etching solution. As shown, the first epitaxial layer 102 is removed by touch polishing, and then the back-illuminated solid-state imaging device wafer 100 is formed by removing the BG tape as shown in FIG.

  The wafer 100 for backside illumination type solid-state imaging device according to the present invention is simple and easy because the first epitaxial layer 102 is a high-concentration boron-added silicon layer and the etching solution is an alkaline etching solution. The yield can be dramatically improved by easily reducing the thickness variation and improving the processing accuracy.

  Although not shown in the figure, before the step of growing the first epitaxial layer 102, the entire surface of the material wafer 101 opposite to the surface on which the first epitaxial layer 102 is grown, Preferably, the method further includes a step of forming a polysilicon film 106 on the back surface 104b of the epitaxial wafer 104. This is because the polysilicon film 106 functions as a gettering sink during the growth of the first epitaxial layer 102 and the second epitaxial layer 103, and can improve the gettering effect.

The boron concentration of the high-concentration boron-added silicon layer 102 is preferably 10 ¹⁸ to 10 ¹⁹ atoms / cm ³ . If the concentration is less than 10 ¹⁸ atoms / cm ³ , the etching rate may increase and it may be difficult to control the etching amount. If the concentration exceeds 10 ¹⁹ atoms / cm ³ , the etching rate will extremely decrease and production may be difficult. This is because sex may be sacrificed. Examples of a method for causing the first epitaxial layer 102 to contain a predetermined amount of boron include a method of doping boron atoms into the first epitaxial layer 102 and an ion implantation method.

  The material wafer 101 is preferably a carbon-added silicon wafer 101. As a result of the carbon atoms being taken into the silicon interstitial positions in the material wafer 101 and the subsequent heat treatment of the wafer promoting the precipitation of the oxygen-containing material, the oxygen precipitates can act as gettering sites. This is because generation of white flaw defects and heavy metal contamination can be effectively suppressed as compared with a conventional image sensor when the is used for a back-illuminated solid-state image sensor. The material wafer 101 is not particularly limited, but a substrate made of, for example, a silicon material can be used because it can be obtained relatively easily.

The carbon concentration of the carbon-added silicon wafer 101 is preferably 0.5 × 10 ^{16 to} 1.0 × 10 ¹⁷ atoms / cm ³ . This is because if the concentration is less than 0.5 × 10 ¹⁶ atoms / cm ³ , the gettering ability cannot be sufficiently exerted, and white scratch defects and heavy metal contamination may not be sufficiently suppressed. This is because if it exceeds 10 ¹⁷ atoms / cm ³ , the size of the oxygen precipitate becomes less than 50 nm, and strain energy that can getter heavy metals cannot be maintained. Examples of a method for causing the wafer 101 to contain a predetermined amount of carbon include a method of doping carbon atoms in a silicon substrate, an ion implantation method, and the like.

  The thickness of the material wafer 101 is preferably 100 to 800 μm. If the thickness is less than 100 μm, it may be difficult to maintain the bending strength of the wafer. If the thickness exceeds 800 μm, the grinding amount increases and the production cost may increase.

  The thickness of the first epitaxial layer 102 is preferably 0.1 to 10.0 μm. If the thickness is less than 0.1 μm, the control of the resistivity may be a problem, and if it exceeds 10.0 μm, the attenuation of the visible light transmittance becomes a problem.

  The thickness of the second epitaxial layer 103 is preferably 1 to 10 μm. If the thickness is less than 1 μm, the accuracy of resistivity may be difficult due to the effect of auto-doping, and if it exceeds 10 μm, the etching time increases and the productivity decreases.

  When the material wafer 101 is a carbon-added silicon wafer, it is preferable to perform heat treatment at 600 to 700 ° C. in advance. This is because oxygen precipitation is promoted according to this heat treatment, so that high-density oxygen precipitates can be formed.

  The present invention also relates to a back-illuminated solid-state image sensor wafer manufactured by the above-described method. The back-illuminated solid-state image sensor wafer has a thickness variation of 0.1 to 0.5 μm and a quantum The efficiency is 30 to 80%. The thickness variation is measured by infrared absorption, and the quantum efficiency is measured by a photodiode. This is because if the thickness variation exceeds 0.5 μm, the variation in the space charge layer width increases and deteriorates the imaging characteristics, and if the quantum efficiency is less than 30%, the imaging characteristics deteriorate.

  The thickness of the back-illuminated solid-state imaging device wafer is preferably 2 to 50 μm. If it is less than 2 μm, the spectral sensitivity of a short wavelength of 400 nm or less may be reduced, and if it exceeds 50 μm, carriers diffusing from the peripheral portion of the photodiode may increase and signal noise may increase. .

  The present invention also relates to a back-illuminated solid-state image pickup device in which a buried electrode for transferring image data is connected to the pixels of the back-illuminated solid-state image sensor wafer.

  FIG. 1 shows an example of a typical embodiment, and the present invention is not limited to this embodiment.

Example 1
80% of the thickness of the material wafer is removed by grinding from the back side of the material wafer side of the epitaxial wafer formed by sequentially growing and forming the first epitaxial layer and the second epitaxial layer on the material wafer. The material wafer remaining after grinding is removed by etching using a predetermined etching solution with the first epitaxial layer as a stopper layer, and the first epitaxial layer is removed by polishing to produce a wafer for backside illumination type solid-state imaging device. did.

The material wafer was a carbon-added silicon wafer (1.0 × 10 ¹⁶ atoms / cm ³ ), and the first epitaxial layer was a high-concentration boron-added silicon layer (5.0 × 10 ¹⁸ atoms / cm ³ ). Further, an aqueous potassium hydroxide solution was used as the etching solution.

(Comparative Example 1)
A wafer for backside illumination type solid-state imaging device was manufactured by the same method as in Example 1 except that a phosphorus-doped epitaxial silicon layer (1.0 × 10 ¹⁹ atoms / cm ³ ) was used as the first epitaxial layer. .

(Evaluation)
About Example 1 and Comparative Example 1, thickness variation and quantum efficiency of the wafer for backside illumination type solid-state imaging device were measured. The thickness variation was measured using infrared absorption, and the quantum efficiency was measured using a photodiode. Table 1 shows the measurement results and the thickness of the wafer for backside illumination type solid-state imaging device.

  As shown in Table 1, it can be seen that Example 1 has a smaller thickness variation and a higher quantum efficiency than Comparative Example 1.

  According to the method for manufacturing a wafer for solid-state imaging device of the present invention, the wafer for solid-state imaging device capable of dramatically improving the yield by reducing the thickness variation and improving the processing accuracy simply and easily. And a solid-state image sensor can be provided.

DESCRIPTION OF SYMBOLS 100 Backside irradiation type solid-state image sensor wafer 101 Material wafer 102 1st epitaxial layer 103 2nd epitaxial layer 104 Epitaxial wafer 104a Front surface 104b Back surface 105 BG tape 106 Polysilicon film

Claims (12)

It has a plurality of pixels including a photoelectric conversion element and a charge transfer transistor on the front surface side, and the back surface is a light receiving surface.
At least 80% of the thickness of the material wafer is removed by grinding from the back surface of the material wafer side of the epitaxial wafer formed by sequentially growing and forming the first epitaxial layer and the second epitaxial layer on the material wafer,
The material wafer remaining by grinding is removed by etching using the first epitaxial layer as a stopper layer, using a predetermined etching solution,
Removing the first epitaxial layer by polishing to form a back-illuminated solid-state imaging device wafer;
The method for manufacturing a wafer for backside illumination type solid-state imaging device, wherein the first epitaxial layer is a high-concentration boron-added silicon layer, and the etching solution is an alkaline etching solution.   2. The method of claim 1, further comprising a step of forming a polysilicon film on the entire surface of the material wafer opposite to the surface on which the first epitaxial layer is grown before the step of growing the first epitaxial layer. The manufacturing method of the wafer for backside illumination type solid-state image sensors as described in 1 .. ^{3. The} method for manufacturing a wafer for backside illumination type solid-state imaging device according to claim 1, wherein the boron concentration of the high-concentration boron-added silicon layer is 10 ¹⁸ to 10 ¹⁹ atoms / cm ³ .   The method of manufacturing a wafer for backside illumination type solid-state imaging device according to claim 1, wherein the material wafer is a carbon-added silicon wafer. 5. The method for manufacturing a wafer for backside illumination type solid-state imaging device according to claim 4, wherein the carbon concentration of the carbon-added silicon wafer is 0.5 × 10 ^{16 to} 1.0 × 10 ¹⁷ atoms / cm ³ .   The thickness of the said raw material wafer is 100-800 micrometers, The manufacturing method of the wafer for backside illumination type solid-state image sensors as described in any one of Claims 1-5.   The thickness of the said 1st epitaxial layer is 0.1-10.0 micrometers, The manufacturing method of the wafer for backside illumination type solid-state image sensors as described in any one of Claims 1-6.   The thickness of the said 2nd epitaxial layer is 1-10 micrometers, The manufacturing method of the wafer for backside illumination type solid-state image sensors as described in any one of Claims 1-7.   The said carbon addition silicon wafer is a manufacturing method of the wafer for backside illumination type solid-state image sensors as described in any one of Claims 4-8 to which the heat processing of 600-700 degreeC is performed previously. It is a wafer for back irradiation type solid-state image sensing devices manufactured by the method according to any one of claims 1 to 9,
A wafer for backside illumination type solid-state imaging device, having a thickness variation of 0.1 to 0.5 μm and a quantum efficiency of 30 to 80%.   The wafer for backside illumination type solid imaging device according to claim 10, wherein the thickness of the wafer for backside illumination type solid imaging device is 2 to 50 μm.   The back irradiation type solid-state image sensor formed by connecting the embedded electrode for transferring image data to the said pixel of the wafer for back surface irradiation type solid-state image sensors of Claim 10 or 11.

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