CN103346076A - Method for modifying defects of gate-oxide active region - Google Patents

Method for modifying defects of gate-oxide active region Download PDF

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CN103346076A
CN103346076A CN2013102644085A CN201310264408A CN103346076A CN 103346076 A CN103346076 A CN 103346076A CN 2013102644085 A CN2013102644085 A CN 2013102644085A CN 201310264408 A CN201310264408 A CN 201310264408A CN 103346076 A CN103346076 A CN 103346076A
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layer
polysilicon
thickness
active area
peox
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CN103346076B (en
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顾梅梅
侯多源
陈建维
张旭升
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Shanghai Huali Microelectronics Corp
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Abstract

The invention provides a method for modifying defects of a gate-oxide active region. A gate oxide layer is grown on a substrate, a polysilicon layer is deposited on the gate oxide layer, N-type polysilicon gate pre-doping is carried out, and a polysilicon gate masking layer comprising an overlapped layer of a PEOX layer and an O3TEOS layer is formed on the polysilicon layer. An antireflection layer is formed on the polysilicon gate masking layer, photoresist is formed on the antireflection layer, and the photoresist is used for etching the polysilicon layer to form a polysilicon gate. The method for modifying defects of the gate-oxide active region can prevent defects from being generated in the active region in the manufacturing process of the polysilicon gate structure.

Description

Improve the method for grid oxygen active area defective
Technical field
The present invention relates to field of semiconductor manufacture, more particularly, the present invention relates to a kind of method of improving grid oxygen active area defective.
Background technology
In the semiconductor processing and manufacturing process, grid technique is to form the needed grid of device by photoetching and etching, and it is most important processing step in the flow process.The making of polysilicon grating structure generally comprises following steps: 1) at substrate 10 growth gate oxides 20; 2) deposit polysilicon layer 30 on gate oxide 20; 3) deposit polysilicon gate mask layer 40 on polysilicon layer 30; 4) form anti-reflecting layer 50 at polysilicon gate mask layer 40; 5) form photoresist 60 at anti-reflecting layer 50, and utilize photoresist 60 etch polysilicon layers 30 to form polysilicon gate.Fig. 1 is the laminated construction before the etching polysilicon.
In order to suppress the depletion of polysilicon effect, it is electrical to reduce gate oxide, after the polysilicon deposit, carry out N-type polysilicon gate mix in advance (NPO) at once, the pre-ion that mixes of N-type polysilicon gate injects the general phosphorus that adopts and injects (Varian equipment, energy are 3E15, dosage 8Kev).Behind the pre-doping process of N-type polysilicon gate, deposition oxide film is as polysilicon gate mask layer (PECVD deposit, process pressure are 4-5Torr).But after finding that aborning anti-reflecting layer is opened, in case wafer (wafer) process vacuum environment (as SEM review), active area will produce defective, influences the yield of product.
Summary of the invention
Technical problem to be solved by this invention is at having above-mentioned defective in the prior art, providing a kind of active area that can prevent in the manufacturing process of polysilicon grating structure to produce the method for defective.
In order to realize above-mentioned technical purpose, according to a first aspect of the invention, provide a kind of method of improving grid oxygen active area defective to comprise:
At the substrate gate oxide of growing;
Deposit polysilicon layer on gate oxide;
Carrying out the N-type polysilicon gate mixes in advance;
Comprise PEOX layer and O in polysilicon layer formation 3The polysilicon gate mask layer of the lamination of TEOS layer;
Form anti-reflecting layer at the polysilicon gate mask layer;
Form photoresist at anti-reflecting layer, and utilize photoresist etch polysilicon layer to form polysilicon gate.
Preferably, the 5th step comprises: under the first process atmospheric pressures condition, deposit the PEOX layer of first thickness at polysilicon layer, and the O that under the second process atmospheric pressures condition, deposits second thickness at the PEOX layer 3The TEOS layer.
Preferably, the first process atmospheric pressures condition is 4～5Torr.
Preferably, the second process atmospheric pressures condition is 30Torr～60Torr, more preferably 40Torr～50Torr.Most preferably, the second process atmospheric pressures condition is 45Torr.
Preferably, in the 5th step, first thickness and the O of PEOX layer 3Second thickness of TEOS layer all between
Figure BDA00003421897700021
Extremely
Figure BDA00003421897700022
Between, first thickness and the O of while PEOX layer 3The second thickness sum of TEOS layer between
Figure BDA00003421897700023
Extremely
Figure BDA00003421897700024
Between.
Preferably, first thickness and the O of PEOX layer 3The second thickness sum of TEOS layer is
Figure BDA00003421897700025
Preferably, first thickness of PEOX layer is
Figure BDA00003421897700026
And O 3Second thickness of TEOS layer is
Figure BDA00003421897700027
Preferably, carry out the annealing of mixing in advance of N-type polysilicon gate after mixing in that the N-type polysilicon gate is pre-.
Thus, the invention provides a kind of active area that can in the manufacturing process of polysilicon grating structure, prevent and produce the method for improving grid oxygen active area defective of defective.
Description of drawings
By reference to the accompanying drawings, and by with reference to following detailed, will more easily more complete understanding be arranged and more easily understand its attendant advantages and feature the present invention, wherein:
Fig. 1 schematically shows the laminated construction according to the etching polysilicon of prior art.
Fig. 2 schematically shows the flow chart according to the method for improving grid oxygen active area defective of the embodiment of the invention.
Fig. 3 schematically shows the schematic diagram according to the method for improving grid oxygen active area defective of the embodiment of the invention.
Need to prove that accompanying drawing is used for explanation the present invention, and unrestricted the present invention.Notice that the accompanying drawing of expression structure may not be to draw in proportion.And in the accompanying drawing, identical or similar elements indicates identical or similar label.
Embodiment
In order to make content of the present invention clear and understandable more, below in conjunction with specific embodiments and the drawings content of the present invention is described in detail.
The present inventor finds, the reason that the active area defective produces in the manufacturing process of polysilicon grating structure is that pre-doping of N-type polysilicon gate gathers polysilicon gate mask layer film surface by the vacuum environment bubbing, anti-reflecting layer is opened and is damaged polysilicon in the technology, and the formation defective is also transferred on the active area.A kind of solution is to anneal behind the pre-doping process of N-type polysilicon gate, prevents that gas from separating out.
＜defect analysis experimental analysis 〉
More particularly, the reason in order to confirm that defective produces, designed 3 groups of experiments:
(1) experimental group 1:
A. mixing in advance at deposit polysilicon layer 30--→ c.N type polysilicon bar on the gate oxide 20 at substrate 10 growth gate oxide 20--→ b., → e. deposit polysilicon gate mask layer 40--→ f. on polysilicon layer 30 forms anti-reflecting layer 50--→ g. at polysilicon gate mask layer 40 and forms photoresists 60 at anti-reflecting layer 50, and utilizes photoresist 60 etch polysilicon layers 30 with the formation polysilicon gate--→ d.N type polysilicon bar mix in advance annealing--.
(2) experimental group 2: do not have the pre-doping process of N-type polysilicon gate and the N-type polysilicon gate annealing process that mixes in advance, specifically comprise:
A. form anti-reflecting layer 50--→ g. at the deposit polysilicon gate mask layer 40--→ f. on polysilicon layer 30 of deposit polysilicon layer 30--→ e. on the gate oxide 20 at polysilicon gate mask layer 40 at substrate 10 growth gate oxide 20--→ b. and form photoresist 60 at anti-reflecting layer 50, and utilize photoresist 60 etch polysilicon layers 30 to form polysilicon gate.
(3) experimental group 3: do not have the N-type polysilicon gate annealing process that mixes in advance, specifically comprise:
Experimental result is as follows: a. mixes at deposit polysilicon layer 30--→ c.N type polysilicon bar on the gate oxide 20 in advance at substrate 10 growth gate oxide 20--→ b.--and → e. deposit polysilicon gate mask layer 40--→ f. on polysilicon layer 30 forms anti-reflecting layer 50--→ g. at polysilicon gate mask layer 40 and forms photoresist 60 at anti-reflecting layer 50, and utilizes photoresist 60 etch polysilicon layers 30 to form polysilicon gate.
? Experimental group 1 Experimental group 2 Experimental group 3
The defective sum 309 84 87
Active area damages defective 88 0 2
Above experimental result shows: grid oxygen active area generation of defects is relevant with the pre-doping process of N-type polysilicon gate; Organize by experiment 1 and comparative descriptions defect source gas behind the pre-doping process of N-type polysilicon gate of experimental group 3 separate out.
＜defective is eliminated experimental analysis 〉
Based on above-mentioned analysis, the inventor is by changing polysilicon gate mask layer film type, fix the defect problem.Carry out following experiment comparative analysis.
The step that adopts is: a. mixes at deposit polysilicon layer 30--→ c.N type polysilicon bar on the gate oxide 20 in advance at substrate 10 growth gate oxide 20--→ b.--→ d.N type polysilicon bar mix in advance annealing--, and → e. deposit polysilicon gate mask layer 40--→ f. on polysilicon layer 30 forms anti-reflecting layer 50--→ g. at polysilicon gate mask layer 40 and forms photoresists 60 at anti-reflecting layer 50, and utilizes photoresist 60 etch polysilicon layers 30 with the formation polysilicon gate.
Experiment 1: the polysilicon gate mask layer is PEOX
Figure BDA00003421897700041
Experiment 2: the polysilicon gate mask layer is PEOX
Figure BDA00003421897700042
Wherein, PEOX is silicon dioxide (SiO2) film that adopts the growth of chemical vapor deposition (PECVD) method, the characteristics of this film build method are plasma to be arranged as auxiliary energy, and (reaction gas forces down: 4-5Torr), membranous compactness is higher for reaction vacuum degree height.
O 3TEOS utilizes TEOS(tetraethoxy silica alkane) and O 3Silicon dioxide (SiO2) film that (ozone) reaction forms, the characteristics of this film build method are low (the reaction pressure height: about 45Torr), membranously loosen, compactness is low of vacuum degree that responds.
So PEOX and O3TEOS belong to silicon dioxide, film-forming process difference just, formed silica membrane character be difference to some extent also.
That is, for step e. deposit polysilicon gate mask layer 40 on polysilicon layer 30, experiment 1 forms under process atmospheric pressures is the condition of 4～5Torr PEOX; At first under the condition of 4～5Torr, form and test 2
Figure BDA00003421897700052
PEOX, under process atmospheric pressures is the condition of 45Torr, form subsequently
Figure BDA000034218977000514
O 3TEOS.
Experimental result is as follows:
? Experiment 1 Experiment 2
The defective sum 309 104
Active area damages defective 88 0
Experimental result shows, the polysilicon gate mask layer by
Figure BDA00003421897700053
Change into After, can effectively solve grid oxygen active area defect problem.
The experimental analysis of＜modification 〉
Except
Figure BDA00003421897700055
Thick PEOX with
Figure BDA00003421897700056
Thick O 3The combination of TEOS, the inventor has also carried out the experimental analysis of other thickness situations, and finds, preferably, keeps PEOX and O 3The thickness separately of TEOS all between
Figure BDA00003421897700057
Extremely
Figure BDA00003421897700058
Between, keep PEOX and O simultaneously 3The gross thickness of TEOS between
Figure BDA00003421897700059
Extremely
Figure BDA000034218977000515
Between, can obtain better technical effect.
And, keep PEOX and O 3The gross thickness of TEOS is
Figure BDA000034218977000510
Be preferred, for example under the condition of same thickness ratio, Gross thickness can access experimental result relatively preferably.
Wherein,
Figure BDA000034218977000512
Thick PEOX with
Figure BDA000034218977000513
Thick O 3The resulting experimental result of the combination of TEOS is best.
And, for O 3The process atmospheric pressures condition of TEOS preferably can show purpose of the present invention under the process atmospheric pressures condition of 30Torr～60Torr, and the process gas pressure energy of 40Torr～50Torr obtains better technical effect.
＜principle analysis 〉
In the prior art, because the deposit air pressure of PEOX is 4～5Torr, the gas in the pre-doping of N-type polysilicon gate is separated out easily, forms defective at the HM surface aggregation.Therefore, prior art is used
Figure BDA00003421897700062
As the polysilicon gate mask layer, in grid technique, form defective easily, if if do not have cycle of annealing in the pre-doping process of N-type polysilicon gate, after anti-reflecting layer is opened, in a single day wafer through vacuum environment, will be easy to bubbing, and forms defective at the mask layer surface aggregation.
And in the example of the present invention, because O 3The deposit air pressure of TEOS is about 45Torr, and far above the deposit air pressure of PEOX, the gas that has suppressed under the high pressure in the pre-doping of N-type polysilicon gate is separated out, and makes precipitate can't gather polysilicon gate mask layer 40 surfaces and forms defectives.
So, with PEOX (process pressure: 4～5Torr) for example change PE OX+O3TEOS(into, process pressure: about 45Torr), effectively suppress the formation of defective.This be because, at first, O 3The vacuum degree of TEOS is 45Torr, than PE OX(4～5Torr) height for example, can effectively suppress gas and separate out; Secondly, the film compactness of PEOX compares O 3TEOS is good, so use PEOX+O 3TEOS had both suppressed gas and had separated out, and had guaranteed the compactness of film again.
Thus, after anti-reflecting layer was opened in the solution grid technique, wafer was through vacuum environment, and active area can produce the problem of defective, improves the product yield.
＜specific embodiment 〉
Fig. 2 schematically shows the flow chart according to the method for improving grid oxygen active area defective of the embodiment of the invention, and Fig. 3 schematically shows the schematic diagram according to the method for improving grid oxygen active area defective of the embodiment of the invention.
As shown in Figures 2 and 3, the method for improving grid oxygen active area defective according to the embodiment of the invention comprises:
First step S1: at substrate 10 growth gate oxides 20;
The second step S2: deposit polysilicon layer 30 on gate oxide 20;
Third step S3: carry out the N-type polysilicon gate and mix in advance;
The 4th step S4: carry out the annealing of mixing in advance of N-type polysilicon gate; But, need to prove that this step is preferred, even do not add this step, can realize purpose of the present invention equally.
The 5th step S5: comprise PEOX layer 41 and O in polysilicon layer 30 formation 3The polysilicon gate mask layer 40 of the lamination of TEOS layer 42;
The 6th step S6: form anti-reflecting layer 50 at polysilicon gate mask layer 40;
The 7th step S7: form photoresist 60 at anti-reflecting layer 50, and utilize photoresist 60 etch polysilicon layers 30 to form polysilicon gate.
Preferably, the 5th step S5 comprises: under the first process atmospheric pressures condition, deposit the PEOX layer 41 of first thickness at polysilicon layer 30, and the O that under the second process atmospheric pressures condition, deposits second thickness at PEOX layer 41 3 TEOS layer 42.
Preferably, the first process atmospheric pressures condition is 4～5Torr.
Preferably, the second process atmospheric pressures condition is 30Torr～60Torr, more preferably 40Torr～50Torr.Most preferably, the second process atmospheric pressures condition is 45Torr.
Preferably, in the 5th step S5, first thickness and the O of PEOX layer 41 3Second thickness of TEOS layer 42 all between
Figure BDA00003421897700071
Extremely
Figure BDA00003421897700072
Between, first thickness and the O of while PEOX layer 41 3The second thickness sum of TEOS layer 42 between Extremely
Figure BDA00003421897700074
Between.
Preferably, first thickness and the O of PEOX layer 41 3The second thickness sum of TEOS layer 42 is
Preferably, first thickness of PEOX layer 41 is
Figure BDA00003421897700076
And O 3Second thickness of TEOS layer 42 is
Figure BDA00003421897700077
Thus, the invention provides a kind of active area that can in the manufacturing process of polysilicon grating structure, prevent and produce the method for improving grid oxygen active area defective of defective.
In addition, need to prove, unless stated otherwise or point out, otherwise the term in the specification " first ", " second ", " the 3rd " etc. describe each assembly of only being used for distinguishing specification, element, step etc., rather than are used for logical relation between each assembly of expression, element, the step or ordinal relation etc.
Be understandable that though the present invention with the preferred embodiment disclosure as above, yet above-described embodiment is not in order to limit the present invention.For any those of ordinary skill in the art, do not breaking away under the technical solution of the present invention scope situation, all can utilize the technology contents of above-mentioned announcement that technical solution of the present invention is made many possible changes and modification, or be revised as the equivalent embodiment of equivalent variations.Therefore, every content that does not break away from technical solution of the present invention according to any simple modification, equivalent variations and the modification that technical spirit of the present invention is done above embodiment, all still belongs in the scope of technical solution of the present invention protection.

Claims (10)

1. method of improving grid oxygen active area defective is characterized in that comprising:
At the substrate gate oxide of growing;
Deposit polysilicon layer on gate oxide;
Carrying out the N-type polysilicon gate mixes in advance;
Comprise PEOX layer and O in polysilicon layer formation 3The polysilicon gate mask layer of the lamination of TEOS layer;
Form anti-reflecting layer at the polysilicon gate mask layer;
Form photoresist at anti-reflecting layer, and utilize photoresist etch polysilicon layer to form polysilicon gate.
2. the method for improving grid oxygen active area defective according to claim 1, it is characterized in that, the 5th step comprises: under the first process atmospheric pressures condition, deposit the PEOX layer of first thickness at polysilicon layer, and the O that under the second process atmospheric pressures condition, deposits second thickness at the PEOX layer 3The TEOS layer.
3. the method for improving grid oxygen active area defective according to claim 1 and 2 is characterized in that, the first process atmospheric pressures condition is 4～5Torr.
4. the method for improving grid oxygen active area defective according to claim 1 and 2 is characterized in that, the second process atmospheric pressures condition is 30Torr～60Torr.
5. the method for improving grid oxygen active area defective according to claim 1 and 2 is characterized in that,, second process atmospheric pressures condition 40Torr～50Torr.
6. the method for improving grid oxygen active area defective according to claim 1 and 2 is characterized in that, the second process atmospheric pressures condition is 45Torr.
7. the method for improving grid oxygen active area defective according to claim 1 and 2 is characterized in that, in the 5th step, and first thickness and the O of PEOX layer 3Second thickness of TEOS layer all between
Figure FDA00003421897600011
Extremely
Figure FDA00003421897600012
Between, first thickness and the O of while PEOX layer 41 3The second thickness sum of TEOS layer 42 between
Figure FDA00003421897600013
Extremely
Figure FDA00003421897600014
Between.
8. the method for improving grid oxygen active area defective according to claim 1 and 2 is characterized in that, first thickness and the O of PEOX layer 41 3The second thickness sum of TEOS layer 42 is
Figure FDA00003421897600015
9. the method for improving grid oxygen active area defective according to claim 1 and 2 is characterized in that, first thickness of PEOX layer is And O 3Second thickness of TEOS layer is
Figure FDA00003421897600022
10. the method for improving grid oxygen active area defective according to claim 1 and 2 is characterized in that also comprising: carry out the annealing of mixing in advance of N-type polysilicon gate after mixing in that the N-type polysilicon gate is pre-.
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Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN103871922A (en) * 2014-02-21 2014-06-18 上海华力微电子有限公司 Method for detecting polycrystalline silicon grid etching defect by adopting voltage contrast test structure
CN103943527A (en) * 2014-02-21 2014-07-23 上海华力微电子有限公司 Method for adopting capacitive test structure to detect polysilicon-gate etching defects

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US6849531B1 (en) * 2003-11-21 2005-02-01 Taiwan Semiconductor Manufacturing Company, Ltd. Phosphoric acid free process for polysilicon gate definition
CN101399191A (en) * 2007-09-27 2009-04-01 中芯国际集成电路制造(上海)有限公司 Method for manufacturing grillage layer and fabricating method for semiconductor device
CN101625960A (en) * 2008-07-07 2010-01-13 旺宏电子股份有限公司 Patterning method
CN102148149A (en) * 2010-02-05 2011-08-10 中芯国际集成电路制造(上海)有限公司 Method for forming grid of semiconductor device

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6849531B1 (en) * 2003-11-21 2005-02-01 Taiwan Semiconductor Manufacturing Company, Ltd. Phosphoric acid free process for polysilicon gate definition
CN101399191A (en) * 2007-09-27 2009-04-01 中芯国际集成电路制造(上海)有限公司 Method for manufacturing grillage layer and fabricating method for semiconductor device
CN101625960A (en) * 2008-07-07 2010-01-13 旺宏电子股份有限公司 Patterning method
CN102148149A (en) * 2010-02-05 2011-08-10 中芯国际集成电路制造(上海)有限公司 Method for forming grid of semiconductor device

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN103871922A (en) * 2014-02-21 2014-06-18 上海华力微电子有限公司 Method for detecting polycrystalline silicon grid etching defect by adopting voltage contrast test structure
CN103943527A (en) * 2014-02-21 2014-07-23 上海华力微电子有限公司 Method for adopting capacitive test structure to detect polysilicon-gate etching defects
CN103943527B (en) * 2014-02-21 2016-08-17 上海华力微电子有限公司 The method using Test Constructure of detection etching polysilicon gate defect

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