CN103345899A - Plasma display screen driving method reducing low discharge and promoting energy efficiency - Google Patents
Plasma display screen driving method reducing low discharge and promoting energy efficiency Download PDFInfo
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Abstract
The invention relates to the field of plasma display screens, in particular to a plasma display screen driving method reducing low discharge and promoting energy efficiency. The plasma display screen driving method reducing the low discharge and promoting the energy efficiency is provided for resolving the problems existing in the prior art; according to the driving waveform method, the low discharge and the energy efficiency are taken into account; the method specifically comprises the step that maintaining waveforms with different sub-fields are designed in a frame of waveforms, so the discharge condition is guaranteed, and meanwhile the energy efficiency is promoted. The method is designed according to the fact that various sub-field driving waveforms are designed differently in the frame of the driving waveforms, and the method is applied to the field of plasma display screen driving.
Description
Technical field
The present invention relates to the plasma panel field, especially a kind of plasma display panel drive method that reduces low discharge improving energy efficiency.
Background technology
Plasma display (PDP) is one of flat-panel monitor of current main flow, and it is involuted by front-back baseboard.Made multipair show electrode pair parallel to each other on prebasal plate, each show electrode to by one group of scan electrode (Y electrode) with maintain electrode (X electrode) and form, show electrode on be coated with dielectric layer and protective seam.Make a plurality of data electrodes parallel to each other (A electrode) at metacoxal plate, be coated with dielectric layer on it, be manufactured with barrier on dielectric layer, and apply fluorescent powder.The mode of intersecting according to show electrode pair and data electrode, by being sealed after the front-back baseboard contraposition, pours discharge gas, at show electrode pair, with the opposed part of data electrode, forms discharge cell.
The electrode structure that Figure 1 shows that plasma display wherein maintenance phase is discharged between the X/Y electrode, Fig. 2 be current plasma display the main addressing adopted separate drive waveforms with demonstration.PDP display can be equivalent to a capacitive load, and the difference that its load shows image with it changes.
The method (ADS) that the type of drive of plasma display mainly adopts addressing to separate with demonstration at present, drive waveforms comprises reset period, address period and maintenance phase.Reset period: by ramp waveform, screen is applied to higher voltage, make all discharge cells produce electric discharge, and make each unit before address period starts, discharge condition reaches unanimity as far as possible.Address period: the Y electrode applies scanning impulse, and the unit that needs are lighted applies the addressing pulse signal at the A electrode, makes the unit that need to light produce electric discharge, and long-pending tired wall electric charge again, so that maintenance phase regular picture.Maintenance phase: adopt energy recovery circuit to realize the high-voltage pulse waveform replaced between X/Y, the unit continuous discharge that need light is luminous, and it is between PDP main energy resource consumption and luminous zone.
Current drive waveforms is divided into the average energy consumption grade of a plurality of APL(according to load (Frame load) size) interval, the maintenance phase of each subfield (subfield) in each APL to maintain (main sustain) waveform identical.
The value of plasma display is relevant with the average image grade (APL), and APL is the average intensity grade of each red, green, blue pixel on whole screen.For example, the APL of whole screen peak white light intensity is 100%, and due to red and blue pixel in closed condition, the APL of pure green only has 33%.APL refers to the number percent that the pixel under the peak value white light is shared.When 5% pixel being arranged in the peak white light time, brightness is 212cd/m2.When APL increases, power and heat dissipation restriction can cause that the high-high brightness that safety produces reduces, and therefore, display can reduce peak brightness automatically.Pixel when 100% is in peak value white light lower time, and brightness only has 53cd/m2, needs soft surround lighting that good observation condition is provided.
According to PDP image quality display requirement, drive waveforms one frame picture comprises 8～16 subfields usually, and each subfield comprises reset period, address period, maintenance phase.Common PDP drive waveforms design: in a frame waveform, it is identical that the master of each subfield maintains waveform, can not take into account discharge condition and efficiency and promote.For example, design the first switch ErH closure time (energy recovery circuit to screen duration of charging) when longer, energy recovery circuit, fully to the screen charging, is conducive to the plasma panel efficiency and promotes; But, because the energy recovery circuit electric discharge is more slow, the first larger switch ErH will cause low discharge.Increase maintain waveform X electrode to Gap time of Y electrode with the Y electrode Gap time to the X electrode, be conducive to the lifting of efficiency, but be unfavorable for equally low discharge.
Summary of the invention
Technical matters to be solved by this invention is: for the problem of above-mentioned existence, a kind of plasma display panel drive method that reduces low discharge improving energy efficiency is provided, design a kind of method of taking into account the drive waveforms of low discharge and efficiency, specifically in a frame waveform, what the design subfield was different maintains waveform, improving energy efficiency when ensureing discharge condition.
The technical solution used in the present invention is as follows:
A kind of plasma display panel drive method that reduces low discharge improving energy efficiency, be based on energy recovery circuit, described energy recovery circuit comprises the Vsus feeder ear, the first resistance R 1, the second resistance R 2, the first diode D1, the second diode D2, the 3rd diode D3, the 4th diode D4, the first switch ErH, second switch ErL, the 3rd switch S usH, the 4th switch S usL, capacitor C AP, described Vsus feeder ear is by the first resistance R 1 ground connection, the Vsus feeder ear is connected with the 3rd diode D3 negative electrode, the 3rd diode D3 anode, the 4th diode D4 negative electrode, the second resistance R 2, the plasma panel concurrent connects, described the 4th diode D4 plus earth, described the first diode D1 anode, the second diode D2 anode, the second diode R2 other end concurrent connects, the first diode D1 negative electrode, the first diode D2 negative electrode, capacitor C AP mono-end concurrent connects, capacitor C AP other end ground connection, the plasma panel drive waveforms comprises a plurality of subfields, each subfield comprises reset period, address period and maintenance phase, maintenance phase is the pulse of X electrode drive, the Y electrode drive recurrent interval occurs continuously, the pulse of X electrode drive, the pulse of Y electrode drive all drives by energy recovery circuit, in the drive waveforms of plasma panel one frame picture, longer than forward subfield the first switch ErH closure time by rear subfield the first switch ErH closure time, longer than the forward subfield Gap time by the rear subfield Gap time, shorter than forward subfield second switch ErL closure time by rear subfield second switch ErL closure time, shorter than forward subfield the 3rd switch S usH closure time by rear subfield the 3rd switch S usH closure time, wherein, subfield the first switch ErH closure time is longer or identical than forward subfield the first switch ErH closure time, longer or identical than the forward subfield Gap time by the rear subfield Gap time, shorter or identical than forward subfield second switch ErL closure time by rear subfield second switch ErL closure time, shorter or identical than forward subfield the 3rd switch S usH closure time by rear subfield the 3rd switch S usH closure time, adopt energy recovery circuit to realize the drive waveforms replaced between X electrode and Y electrode.
A kind of plasma display panel drive method that reduces low discharge and promote usefulness also comprises: each subfield is maintained to the drive waveform asynchronism(-nization), and concrete steps comprise:
S1: the first switch ErH closure time T1, by the capacitor C AP of energy recovery circuit, to plasma panel, charged, now, second switch ErL, the 3rd switch S usH, the 4th switch S usL disconnect;
S2: after the first switch ErH closure time T1, the first switch ErH disconnects, the 3rd switch S usH closure time T3, by the Vsus feeder ear, to plasma panel, charged, plasma panel Discharge illuminating now, wherein after the closed 200ns～500ns of the 3rd switch, disconnect the first switch ErH, now second switch ErL, the 4th switch S usL disconnect;
S3: after the 3rd switch S usH closure time T3, after the 3rd switch S usH disconnects 20ns～400ns, second switch ErL closure time T2, by plasma panel, to energy recovery circuit, charged, and by power storage in capacitor C AP, now, the first switch ErH, second switch ErL, the 4th switch S usL disconnect;
S4: after the closed T2 of second switch ErL, the closed T4 of the 4th switch S usL after second switch ErL disconnection 20ns～300ns, ground connection is carried out voltage and is resetted, and now, the first switch ErH, the 3rd switch S usH disconnect.
The described Gap time refers to Y electrode and X electrode high-voltage pulse transit time or X electrode and Y electrode pulse transit time, and wherein the Gap time is 50ns～800ns.
In described S1, the first switch ErH closure time T1 is 250ns～550ns.
In described S2, the 3rd switch S usH closure time T3 is more than 350ns.
In described S3, second switch ErL closure time T2 is 450ns～1000ns.
Described forward subfield refers to 20%～80% of forward subfield in subfield.
Describedly by rear subfield, refer in subfield by 20%～80% of rear subfield.
It is in the drive waveforms of a frame picture that described middle subfield refers to, and removes other subfields of first subfield and last subfield.
In sum, owing to having adopted technique scheme, the invention has the beneficial effects as follows:
1) the present invention designs in a frame picture and comprises multiple maintenance phase waveform, according to the plasma panel display characteristic, cooperation by the first switch ErH, electric discharge Gap, second switch ErL, the 3rd switch S usH closure time, design the maintenance phase waveform that each subfield is different.
2) the constant situation of the drive waveforms of each subfield relatively and in prior art, become in the drive waveforms of a frame picture in the design, longer than the first switch ErH closure time of forward subfield by rear subfield, longer than the forward subfield Gap time by rear subfield, shorter than the second switch ErL closure time of forward subfield by rear subfield, shorter than the 3rd switch S usH closure time of forward subfield by rear subfield, adopt energy recovery circuit to realize the drive waveforms replaced between X electrode and Y electrode, realized taking into account the requirement of plasma panel low discharge and improving energy efficiency.
3) 2) basis on, also can be so that the dynatron field be longer or identical than the first switch ErH closure time of forward subfield in design, longer or identical than the forward subfield Gap time by rear subfield, shorter or identical than the second switch ErL closure time of forward subfield by rear subfield, shorter or identical than the 3rd switch S usH closure time of forward subfield by rear subfield, adopt energy recovery circuit to realize the drive waveforms replaced between X electrode and Y electrode, make design versatile and flexible, design process is simple.
The accompanying drawing explanation
Examples of the present invention will be described by way of reference to the accompanying drawings, wherein:
Fig. 1 plasma display electrode structure.
Fig. 2 drive waveforms forms schematic diagram.
Energy recovery circuit in Fig. 3 plasma panel.
Fig. 4 maintenance phase X electrode and Y electrode high pressure maintain the recurrent interval.
Fig. 5 mono-frame neutron field structural representation.
Embodiment
Disclosed all features in this instructions, or the step in disclosed all methods or process, except mutually exclusive feature and/or step, all can combine by any way.
Disclosed arbitrary feature in this instructions (comprising any accessory claim, summary and accompanying drawing), unless special narration all can be replaced by other equivalences or the alternative features with similar purpose.That is,, unless special narration, each feature is an example in a series of equivalences or similar characteristics.
Related description of the present invention:
1 design concept: in order to be beneficial to the accumulation of wall electric charge, a forward subfield in frame waveform position is designed with the maintenance phase waveform that is beneficial to electric discharge, and the subfield design after position is leaned on is beneficial to the waveform that maintains of efficiency lifting.Detailed process is, reset period, address period drive waveforms are constant, just change the maintenance phase drive waveforms, concrete maintenance phase electric discharge explanation: at first open ERH, by energy recovery circuit to the screen charging; Then open SUSH(and consider reliability, SUSH closes ERH after opening the 300ns left and right usually), by external circuit, to the screen charging, now screen carries out Discharge illuminating; SUSH opens ERL after closing (now maintaining high voltage) about 200ns, by screen, to energy recovery circuit, is charged; ERL opens SUSL after closing (now maintaining certain low-voltage) about 150ns, and ground connection is carried out voltage and resetted.
2 drive waveforms comprise reset period, address period and maintenance phase.Reset period: by ramp waveform, screen is applied to higher voltage, make all discharge cells produce electric discharge, and make each unit before address period starts, discharge condition reaches unanimity as far as possible.Address period: the Y electrode applies scanning impulse, and the unit that needs are lighted applies the addressing pulse signal at the A electrode, makes the unit that need to light produce electric discharge, and again accumulates the wall electric charge, so that maintenance phase regular picture.Maintenance phase: adopt energy recovery circuit to realize the high-voltage pulse waveform replaced between X/Y, the unit continuous discharge that need light is luminous, and it is between PDP main energy resource consumption and luminous zone.
3 according to PDP image quality display requirement, the drive waveforms of one frame picture comprises 8～16 subfields usually, these 8～16 subfields are (as SF1, SF2 in Fig. 5 ... SF10) produce waveform with this, each subfield comprises reset period, address period, maintenance phase (the reset period time is shorter, has omitted reset period in Fig. 5).
4 forward subfields are relevant with APL grade and flash-over characteristic, usually choose forward 20%～80% subfield.Lean on rear subfield relevant with APL grade and flash-over characteristic, usually choose the subfield of 20%～80% after leaning on.Middle subfield is commonly referred to as in the drive waveforms of a frame picture, removes other subfields of first subfield and last subfield.
The first switch ErH on the X electrode that 5 first switch ErH refer to or the first switch ErH on the Y electrode; Second switch ErL refers to second switch ErL on the X electrode or the second switch ErL on the Y electrode; The 3rd switch S usH refers to the 3rd switch S usH on the X electrode or the switch Three S's usH on the Y electrode; The 4th switch S usL refers to the 4th switch S usL on the X electrode or the 4th switch S usL on the Y electrode.
6 PDP display can be equivalent to a capacitive load, and the difference that its load shows image with it changes.Adopted the design of Fig. 3 energy recovery circuit in order to reduce maintenance phase electric discharge unwanted losses plasma display driving circuit.Its drive waveforms has following key parameter.
7 as shown in Figure 4, two high pressure maintain interpulse interval (Gap), comprise that the X pulse is to (X electrode the 4th switch S usL is closed into the time interval of Y electrode the first switch ErH closure) and the Y pulse of the transit time between the Y pulse to the transit time between the X pulse (Y electrode the 4th switch S usL is closed into the time interval of X electrode the first switch ErH closure), the Gap value is generally chosen 50～800ns, the Gap value increases, be conducive to efficiency and promote, the Gap value is less on the electric discharge impact.
8 as shown in Figure 4, when the first switch ERH closure, when rest switch disconnects, in energy recovery circuit, capacitor C AP is to the time T 1 of plasma panel charging, T1 generally chooses 250～550ns, and the first switch ERH closure time lengthens and is conducive to efficiency lifting, the long low discharge that occurs; The first switch ERH closure time shortens and is conducive to improve low discharge, is unfavorable for efficiency.
9 as shown in Figure 4, when second switch ERL closure, when rest switch disconnects, the plasma panel electric discharge finishes the duration of charging T2 that backward energy reclaims electric capacity, T2 generally chooses 450～1000ns, second switch ERL closure time lengthens and is conducive to the efficiency lifting, and the long meeting of second switch ERL closure time causes efficiency to descend; Second switch ERL closure time shortens and there will be low discharge.
10 as shown in Figure 4, when the 3rd switch S usH closure, when rest switch disconnects, the high level that the Vsus feeder ear offers plasma panel maintains the time T 3 of voltage, more than T3 generally chooses 350ns, the 3rd switch S usH closure time lengthens and is conducive to improve low discharge, and the 3rd switch S usH closure time is less on the efficiency impact.
11 as shown in Figure 4, when the 4th switch S usL closure, and when rest switch disconnects, the ground connection time T 4 of display screen, more than T4 generally chooses 1000ns, the 4th switch S usL closure time is less on electric discharge and efficiency impact.When from the Y electrode to the X electrode, the 4th switch S usL closure time T41 is opened to second time period between Y pulse T1 unlatching from a Y pulse T3.When from the X electrode to the Y electrode, the 4th switch S usL closure time T42 is opened to second time period between X pulse T1 unlatching from an X pulse T3.
The function of 12 APL1-APL8 grades is successively: during the PDP picture disply, select the APL grade according to lighting number of display elements, light number of display elements more, the higher grade of APL of calling is (for example, when full frame white (all R, G, B display unit are all lighted) shows, call the waveform of APL8; While only having 1% picture to light, call the waveform of APL1).The PDP logic control, waveform maintains the umber of pulse difference in different APL grades.When number of display elements is less, in order to improve brightness, logic control output is more maintains pulse (number of light emission times is many, and brightness is high); When number of display elements is more, in order to reduce driving power consumption, the less pulse that maintains is exported in logic control.So higher grade of APL, maintains umber of pulse fewer.
13 design effects are as shown in Figure 5 in a frame picture, the front subfield to maintain umber of pulse less, the energy consumption less; And the discharge generation considerable influence of the accumulation of front subfield wall electric charge to the back subfield, so forward subfield is designed with the waveform that maintains that is beneficial to electric discharge.By rear subfield to maintain umber of pulse more, energy consumption is relatively large, maintain waveform optimization improving energy efficiency largely, and because next frame picture the first subfield has master reset, be designed be beneficial to efficiency to maintain waveform less on discharge condition impact, so be designed with and be beneficial to the waveform that maintains that efficiency promotes by rear subfield.
The difference that affects due to load (display unit quantity) plasma display that varies in size discharge condition, the larger article on plasma display screen electric discharge of load is more unfavorable, so the average energy consumption grade of high APL(), design few subfield and use the waveform that maintains that is conducive to efficiency, in low APL, the relatively many subfields of design are used the waveform that maintains that is conducive to efficiency.
According to plasma panel image quality logic: the plasma panel picture in high APL interval falls in the GTG process, calls gradually the waveform in low APL interval, while calling the interval waveform of low APL, is to ensure GTG brightness, and the subfield after the interval waveform of low APL leans on is not luminous.So the subfield design efficiency lifting waveform after low APL leans in interval does not affect the interval picture of high APL and falls the GTG demonstration.Because load little (low APL) is conducive to electric discharge, low APL back subfield is designed with and is beneficial to the efficiency waveform and does not affect the interval picture disply of low APL.
To sum up, APL is lower, and the subfield design after more leaning on more is conducive to carry the waveform that maintains of efficiency, and APL is higher, and more forward subfield design more is beneficial to the waveform that maintains of electric discharge, and the rest may be inferred.
Embodiment mono-: a kind of plasma display panel drive method that reduces low discharge improving energy efficiency, be based on energy recovery circuit, and described energy recovery circuit comprises the Vsus feeder ear, the first resistance R 1, the second resistance R 2, the first diode D1, the second diode D2, the 3rd diode D3, the 4th diode D4, the first switch ErH, second switch ErL, the 3rd switch S usH, the 4th switch S usL, capacitor C AP, described Vsus feeder ear is by the first resistance R 1 ground connection, and the Vsus feeder ear is connected with the 3rd diode D3 negative electrode, the 3rd diode D3 anode, the 4th diode D4 negative electrode, the second resistance R 2, the plasma panel concurrent connects, described the 4th diode D4 plus earth, described the first diode D1 anode, the second diode D2 anode, the second diode R2 other end concurrent connects, the first diode D1 negative electrode, the first diode D2 negative electrode, capacitor C AP mono-end concurrent connects, capacitor C AP other end ground connection, and the plasma panel drive waveforms comprises a plurality of subfields, each subfield comprises reset period, address period and maintenance phase, maintenance phase is the pulse of X electrode drive, the Y electrode drive recurrent interval occurs continuously, the pulse of X electrode drive, the pulse of Y electrode drive all drives by energy recovery circuit, in the drive waveforms of plasma panel one frame picture, longer than the first switch ErH closure time of forward subfield by rear subfield, longer than the forward subfield Gap time by rear subfield, shorter than the second switch ErL closure time of forward subfield by rear subfield, shorter than the 3rd switch S usH closure time of forward subfield by rear subfield, wherein, subfield is longer or identical than the first switch ErH closure time of forward subfield, longer or identical than the forward subfield Gap time by rear subfield, shorter or identical than the second switch ErL closure time of forward subfield by rear subfield, shorter or identical than the 3rd switch S usH closure time of forward subfield by rear subfield, adopt energy recovery circuit to realize the drive waveforms replaced between X electrode and Y electrode.
Embodiment bis-: on embodiment mono-basis, also comprise: each subfield is maintained to the drive waveform asynchronism(-nization), and concrete steps comprise:
S1: the first switch ErH closure time T1, by the capacitor C AP of energy recovery circuit, by plasma panel, to plasma panel, charged, now, second switch ErL, the 3rd switch S usH, the 4th switch S usL disconnect;
S2: disconnect after the first switch ErH closure time T1, the 3rd switch S usH closure time T3, by the Vsus feeder ear, to plasma panel, charged, plasma panel Discharge illuminating now, wherein after the closed 200ns～400ns of the 3rd switch, disconnect the first switch ErH, now second switch ErL, the 4th switch S usL disconnect;
S3: after the 3rd switch S usH closure time T3, after the 3rd switch S usH disconnects 20ns～500ns, the closed T2 of second switch ErL, by plasma panel, to energy recovery circuit, charged, and by power storage in capacitor C AP, now, the first switch ErH, second switch ErL, the 4th switch S usL disconnect;
S4: after the closed T2 of second switch ErL, the closed T4 of the 4th switch S usL after second switch ErL disconnection 20ns～400ns, ground connection is carried out voltage and is resetted, and now, the first switch ErH, the 3rd switch S usH disconnect.
Embodiment tri-: on embodiment mono-or two bases, the described Gap time refers to Y electrode and X electrode high-voltage pulse transit time or X electrode and Y electrode pulse transit time, and wherein the Gap time is 50～800ns.(the Gap value increases, the space charge that the electric discharge of front pulsatile once produces on after once the impact of electric discharge is weakened, thereby reduce the sustain discharge electric current, reduce power consumption, increase to be equivalent to interval time has increased the ultraviolet time that fluorescent powder absorption sustain discharge produces simultaneously, has improved visible light transformation efficiency, thereby has reached the effect of luminance raising, Gap is larger, more is conducive to improving energy efficiency)
Embodiment tetra-: on embodiment tri-bases, in described S1, the first switch ErH closure time T1 is 250～550ns.(the first switch ErH determines that energy reclaims the time of electric capacity to the plasma panel charging, and the first switch ErH time that increased within the specific limits contributes to reduce the supply current of power supply to display screen, thereby reduces the overall power of plasma display)
Embodiment five: on embodiment tri-or four bases, in described S2, the 3rd switch S usH closure time T3 is more than 350ns.(the 3rd switch S usH closure, the time T 3 that the high level of generation maintains voltage will determine that external power source provides the width of high-voltage pulse, shorten within the specific limits this time will be conducive to reduce power consumption, increase space charge, promote brightness, the 3rd switch S usH closure time is long, is conducive to electric discharge)
Embodiment six: on embodiment tetra-or five bases, in described S3, second switch ErL closure time T2 is 450～1000ns.(second switch ERL closure time determines that the plasma panel electric discharge finishes the duration of charging T2 of backward recovery electric capacity, shorten within the specific limits the quantity that this time will be conducive to promote the igniting particle of assisting sustain discharge, make to discharge the start time in advance, promote energy recovery circuit efficiency, reduce the Power supply electric current, and improve discharge condition.）
Embodiment seven: on embodiment five or six bases, in described S4, the 4th switch S usL closure time T4 is 250～550ns.
Embodiment eight: on embodiment seven bases, described forward subfield refers to 20%～80% of forward subfield in subfield.
Embodiment nine, on embodiment seven or eight bases, describedly by rear subfield, refer in subfield by 20%～80% of rear subfield.
Embodiment ten: on embodiment eight or nine bases, it is in the drive waveforms of a frame picture that described middle subfield refers to, and removes other subfields of first subfield and last subfield.
The present invention is not limited to aforesaid embodiment.The present invention expands to any new feature or any new combination disclosed in this manual, and the arbitrary new method disclosed or step or any new combination of process.
Claims (9)
1. a plasma display panel drive method that reduces low discharge improving energy efficiency, comprise energy recovery circuit, described energy recovery circuit comprises the Vsus feeder ear, the first resistance R 1, the second resistance R 2, the first diode D1, the second diode D2, the 3rd diode D3, the 4th diode D4, the first switch ErH, second switch ErL, the 3rd switch S usH, the 4th switch S usL, capacitor C AP, described Vsus feeder ear is by the first resistance R 1 ground connection, the Vsus feeder ear is connected with the 3rd diode D3 negative electrode, the 3rd diode D3 anode, the 4th diode D4 negative electrode, the second resistance R 2, the plasma panel concurrent connects, described the 4th diode D4 plus earth, described the first diode D1 anode, the second diode D2 anode, the second diode R2 other end concurrent connects, the first diode D1 negative electrode, the first diode D2 negative electrode, capacitor C AP mono-end concurrent connects, capacitor C AP other end ground connection, the plasma panel drive waveforms comprises a plurality of subfields, each subfield comprises reset period, address period and maintenance phase, maintenance phase is the pulse of X electrode drive, the Y electrode drive recurrent interval occurs continuously, the pulse of X electrode drive, the pulse of Y electrode drive all drives by energy recovery circuit, characterized by further comprising in the drive waveforms of plasma panel one frame picture, longer than forward subfield the first switch ErH closure time by rear subfield the first switch ErH closure time, longer than the forward subfield Gap time by the rear subfield Gap time, shorter than forward subfield second switch ErL closure time by rear subfield second switch ErL closure time, shorter than forward subfield the 3rd switch S usH closure time by rear subfield the 3rd switch S usH closure time, wherein, subfield the first switch ErH closure time is longer or identical than forward subfield the first switch ErH closure time, longer or identical than the forward subfield Gap time by the rear subfield Gap time, shorter or identical than forward subfield second switch ErL closure time by rear subfield second switch ErL closure time, shorter or identical than forward subfield the 3rd switch S usH closure time by rear subfield the 3rd switch S usH closure time, adopt energy recovery circuit to realize the drive waveforms replaced between X electrode and Y electrode.
2. a kind of plasma display panel drive method that reduces low discharge and promote usefulness according to claim 1, characterized by further comprising: each subfield is maintained to the drive waveform asynchronism(-nization), and concrete steps comprise:
S1: the first switch ErH closure time T1, by the capacitor C AP of energy recovery circuit, to plasma panel, charged, now, second switch ErL, the 3rd switch S usH, the 4th switch S usL disconnect;
S2: after the first switch ErH closure time T1, the first switch ErH disconnects, the 3rd switch S usH closure time T3, by the Vsus feeder ear, to plasma panel, charged, plasma panel Discharge illuminating now, wherein after the closed 200ns～500ns of the 3rd switch, disconnect the first switch ErH, now second switch ErL, the 4th switch S usL disconnect;
S3: after the 3rd switch S usH closure time T3, after the 3rd switch S usH disconnects 20ns～400ns, second switch ErL closure time T2, by plasma panel, to energy recovery circuit, charged, and by power storage in capacitor C AP, now, the first switch ErH, second switch ErL, the 4th switch S usL disconnect;
S4: after the closed T2 of second switch ErL, the closed T4 of the 4th switch S usL after second switch ErL disconnection 20ns～300ns, ground connection is carried out voltage and is resetted, and now, the first switch ErH, the 3rd switch S usH disconnect.
3. a kind of plasma display panel drive method that reduces low discharge and promote usefulness according to claim 1, it is characterized in that the described Gap time refers to Y electrode and X electrode high-voltage pulse transit time or X electrode and Y electrode pulse transit time, wherein the Gap time is 50ns～800ns.
4. according to the described a kind of plasma display panel drive method that reduces low discharge and promote usefulness of one of claims 1 to 3, it is characterized in that in described S1, the first switch ErH closure time T1 is 250ns～550ns.
5. according to the described a kind of plasma display panel drive method that reduces low discharge and promote usefulness of one of claims 1 to 3, it is characterized in that in described S2, the 3rd switch S usH closure time T3 is more than 350ns.
6. according to the described a kind of plasma display panel drive method that reduces low discharge and promote usefulness of one of claims 1 to 3, it is characterized in that in described S3, second switch ErL closure time T2 is 450ns～1000ns.
7. according to the described a kind of plasma display panel drive method that reduces low discharge and promote usefulness of one of claims 1 to 3, it is characterized in that described forward subfield refers to 20%～80% of forward subfield in subfield.
8. according to the described a kind of plasma display panel drive method that reduces low discharge and promote usefulness of one of claims 1 to 3, it is characterized in that describedly by rear subfield, referring in subfield by 20%～80% of rear subfield.
9. according to the described a kind of plasma display panel drive method that reduces low discharge and promote usefulness of one of claims 1 to 3, it is characterized in that it is in the drive waveforms of a frame picture that described middle subfield refers to, and removed other subfields of first subfield and last subfield.
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| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2000112430A (en) * | 1998-10-08 | 2000-04-21 | Matsushita Electric Ind Co Ltd | Display device and its driving method |
| CN1855196A (en) * | 2005-04-29 | 2006-11-01 | Lg电子株式会社 | Plasma display apparatus and driving method thereof |
| KR20070108675A (en) * | 2006-05-08 | 2007-11-13 | 엘지전자 주식회사 | Plasma display panel |
| CN101083046A (en) * | 2006-06-02 | 2007-12-05 | 三星Sdi株式会社 | Plasma display and driving device thereof |
| CN102124507A (en) * | 2009-06-15 | 2011-07-13 | 松下电器产业株式会社 | Driving method for plasma display panel, and plasma display device |
-
2013
- 2013-07-01 CN CN2013102701726A patent/CN103345899A/en active Pending
Patent Citations (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2000112430A (en) * | 1998-10-08 | 2000-04-21 | Matsushita Electric Ind Co Ltd | Display device and its driving method |
| CN1855196A (en) * | 2005-04-29 | 2006-11-01 | Lg电子株式会社 | Plasma display apparatus and driving method thereof |
| KR20070108675A (en) * | 2006-05-08 | 2007-11-13 | 엘지전자 주식회사 | Plasma display panel |
| CN101083046A (en) * | 2006-06-02 | 2007-12-05 | 三星Sdi株式会社 | Plasma display and driving device thereof |
| CN102124507A (en) * | 2009-06-15 | 2011-07-13 | 松下电器产业株式会社 | Driving method for plasma display panel, and plasma display device |
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