JP2010197661A - Method for driving plasma display panel, and plasma display device - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a method for driving plasma display panels, which provides high emission efficiency even in the case of a large-screen plasma display panel and is capable of continuing stable sustaining discharge, and to provide a plasma display device. <P>SOLUTION: In the method for driving a panel including a plurality of discharge cells each of which has a pair of display electrodes, one field is constituted of a plurality of sub-fields each of which has: a write period in which writing discharge is generated in discharge cells; and a sustain period in which a voltage of one electrodes out of pairs of display electrodes is caused to rise and then a voltage of the other electrodes out of pairs of display electrodes is caused to fall to generate first sustaining discharge or the voltage of one electrodes out of pairs of display electrodes is caused to fall and then the voltage of the other electrodes out of pairs of display electrodes is caused to rise to generate second sustaining discharge. The first sustaining discharge is generated, and the second sustaining discharge is generated so that the first sustaining discharge is not continuously repeated over the prescribed number of times. <P>COPYRIGHT: (C)2010,JPO&INPIT

Description

  The present invention relates to a driving method of a plasma display panel and a plasma display device used for a wall-mounted television or a large monitor.

  A typical AC surface discharge type panel as a plasma display panel (hereinafter abbreviated as “panel”) has a large number of discharge cells formed between a front substrate and a rear substrate which are arranged to face each other. On the front substrate, a plurality of display electrode pairs including a pair of scan electrodes and sustain electrodes are formed in parallel to each other, and a dielectric layer and a protective layer are formed so as to cover the display electrode pairs. A plurality of parallel data electrodes, a dielectric layer so as to cover them, and a plurality of barrier ribs in parallel with the data electrodes are formed on the back substrate, respectively. A phosphor layer is formed on the side surface. Then, the front substrate and the rear substrate are disposed opposite to each other so that the display electrode pair and the data electrode are three-dimensionally crossed and sealed, and a discharge gas is sealed in the internal discharge space. Here, a discharge cell is formed at a portion where the display electrode pair and the data electrode face each other. In the panel having such a configuration, ultraviolet light is generated by gas discharge in each discharge cell, and red, green, and blue phosphors are excited and emitted by the ultraviolet light to perform color display.

  As a method for driving the panel, a subfield method, that is, a method of performing gradation display by combining subfields to emit light after dividing one field period into a plurality of subfields. The subfield has an initialization period, an address period, and a sustain period. In the initialization period, an initialization voltage is applied to each electrode to form wall charges necessary for the subsequent address operation. In the address period, a scan pulse is applied to the scan electrode and an address pulse is applied to the data electrode to cause an address discharge in the discharge cell to be displayed. In the sustain period, a sustain pulse is alternately applied to the scan electrode and the sustain electrode, a sustain discharge is generated in the discharge cell that has caused the address discharge, and the phosphor layer of the corresponding discharge cell is caused to emit light, thereby displaying an image. .

In order to reduce the power consumption while ensuring the image display luminance of such a plasma display device, a panel structure and material for improving the light emission efficiency of the panel have been studied. Also, many studies have been made to improve the light emission efficiency from the viewpoint of the driving method. For example, in Patent Document 1, when a sustain voltage is increased, a negative sustain pulse in which a peak value is set to a value higher than the sustain voltage when the light emission efficiency of the panel starts to increase for the first time is applied to the scan electrode and the sustain electrode. A panel driving method that realizes high luminance and high efficiency by alternately applying to each other is disclosed.
JP 2003-43986 A

  In recent years, as the brightness of plasma display devices has been increased, the panel has been increasingly increased in screen size and definition, and power consumption tends to further increase. Therefore, realization of a plasma display device with high luminous efficiency has become an urgent task.

  On the other hand, as the screen of the panel increases, the impedance of the current path to each discharge cell increases and the voltage waveform applied to the discharge cell changes. It is becoming impossible.

  The present invention has been made in view of these problems, and provides a panel driving method and a plasma display device that have high luminous efficiency and can maintain stable sustain discharge even for a large-screen panel. With the goal.

  In order to achieve the above object, the present invention provides a method for driving a panel having a plurality of discharge cells each having a pair of display electrodes, the address period for generating an address discharge in the discharge cells, and one of the display electrode pairs. After the voltage of one electrode of the display electrode pair is raised, the voltage of the other electrode of the display electrode pair is lowered to generate the first sustain discharge, or after the voltage of one electrode of the display electrode pair is lowered, A plurality of subfields having a sustain period in which the voltage of the other electrode is raised to generate a second sustain discharge constitute one field, the first sustain discharge is generated, and the first sustain discharge is predetermined. The second sustain discharge is generated so as not to continue beyond the number of times. By this method, it is possible to provide a panel driving method that has high luminous efficiency and can maintain stable sustain discharge even for a large-screen panel.

  According to the present invention, the fall time during which the voltage of one electrode of the display electrode pair falls during the second sustain discharge is greater than the fall time when the voltage of the other electrode of the display electrode pair falls during the first sustain discharge. May be set longer.

  The present invention also provides a panel having a plurality of discharge cells each having a pair of display electrodes, an address period in which an address discharge is generated in the discharge cell, and a sustain period in which a sustain discharge is generated in the discharge cell in which the address discharge is generated. A driving circuit configured to drive a panel by forming one field with a plurality of subfields, and the driving circuit raises the voltage of one electrode of the display electrode pair and then the voltage of the other electrode of the display electrode pair 1 is generated to generate a first sustain discharge, or the voltage of one electrode of the display electrode pair is decreased and then the voltage of the other electrode of the display electrode pair is increased to generate a second sustain discharge 1 The pair of sustain pulse generation circuits includes a pair of sustain pulse generation circuits, and generates a first sustain discharge and a second sustain discharge so that the first sustain discharge does not continue for a predetermined number of times. To generate The features. With this configuration, it is possible to provide a plasma display device that has high luminous efficiency and can maintain stable sustain discharge even for a large-screen panel.

  According to the present invention, it is possible to provide a panel driving method and a plasma display device capable of continuing a stable sustain discharge with high luminous efficiency even for a large-screen panel.

  Hereinafter, a plasma display device according to an embodiment of the present invention will be described with reference to the drawings.

(Embodiment 1)
FIG. 1 is an exploded perspective view of panel 10 used in the plasma display device in accordance with the first exemplary embodiment of the present invention. On the glass front substrate 21, a plurality of pairs of display electrode pairs 24 each composed of a scan electrode 22 and a sustain electrode 23 are formed. A dielectric layer 25 is formed so as to cover the display electrode pair 24, and a protective layer 26 of magnesium oxide is formed on the dielectric layer 25. A plurality of data electrodes 32 are formed on the back substrate 31, a dielectric layer 33 is formed so as to cover the data electrodes 32, and a grid-like partition wall 34 is formed thereon. A phosphor layer 35 that emits red, green, and blue light is provided on the side surface of the partition wall 34 and on the dielectric layer 33.

  The front substrate 21 and the rear substrate 31 are arranged to face each other so that the display electrode pair 24 and the data electrode 32 intersect each other with a minute discharge space interposed therebetween, and the outer periphery thereof is sealed with a sealing material such as glass frit. Has been. For example, a discharge gas containing xenon is enclosed in the discharge space. The discharge space is partitioned into a plurality of sections by partition walls 34, and discharge cells are formed at the intersections between the display electrode pairs 24 and the data electrodes 32. These discharge cells discharge and emit light to display an image.

  Note that the structure of the panel 10 is not limited to the above-described structure, and for example, the panel 10 may include a stripe-shaped partition wall.

  FIG. 2 is an electrode array diagram of panel 10 used in the plasma display device in accordance with the first exemplary embodiment of the present invention. In panel 10, n scanning electrodes SC1 to SCn (scanning electrode 22 in FIG. 1) and n sustaining electrodes SU1 to SUn (sustaining electrode 23 in FIG. 1) long in the row direction are arranged and long in the column direction. M data electrodes D1 to Dm (data electrode 32 in FIG. 1) are arranged. A discharge cell is formed at a portion where a pair of display electrodes consisting of scan electrode SCi (i = 1 to n) and sustain electrode SUi and one data electrode Dj (j = 1 to m) intersect, M × n cells are formed in the discharge space.

  As shown in FIG. 1 and FIG. 2, scan electrode SCi and sustain electrode SUi are formed in parallel with each other, and therefore, between scan electrodes SC1 to SCn and sustain electrodes SU1 to SUn. There is a large interelectrode capacitance Cp.

  Next, the configuration and operation of the plasma display device in the present embodiment will be described.

  FIG. 3 is a circuit block diagram of plasma display device 40 in accordance with the first exemplary embodiment of the present invention. The plasma display device 40 is necessary for the panel 10, the image signal processing circuit 41, the data electrode drive circuit 42, the scan electrode drive circuit 43, the sustain electrode drive circuit 44, the timing generation circuit 45, the lighting rate detection circuit 48, and each circuit block. A power supply circuit (not shown) for supplying power is provided.

  The image signal processing circuit 41 converts the input image signal into image data indicating light emission / non-light emission for each subfield. The data electrode driving circuit 42 converts the image data for each subfield into address pulses corresponding to the data electrodes D1 to Dm, and applies them to the data electrodes D1 to Dm.

  The lighting rate detection circuit 48 detects the ratio of discharge cells that generate a sustain discharge (hereinafter abbreviated as “lighting rate”) for each subfield. The lighting rate detection circuit 48 can be configured using, for example, a counter that counts the number of “1” s in the image data for each subfield (corresponding to the discharge cells that emit light).

  The timing generation circuit 45 generates various timing signals for controlling the operation of each circuit block based on the horizontal synchronization signal, the vertical synchronization signal, and the lighting rate detected by the lighting rate detection circuit 48, and supplies them to the respective circuit blocks. To do. Scan electrode driving circuit 43 has sustain pulse generating circuit 50 for generating sustain pulses to be applied to scan electrodes SC1 to SCn in the sustain period, and drives each of scan electrodes SC1 to SCn based on a timing signal. Sustain electrode drive circuit 44 has sustain pulse generation circuit 60 for generating sustain pulses to be applied to sustain electrodes SU1 to SUn during the sustain period, and drives sustain electrodes SU1 to SUn based on a timing signal. The sustain pulse generating circuit 50 and the sustain pulse generating circuit 60 constitute a pair of sustain pulse generating circuits for applying a sustain pulse to a pair of display electrodes.

  Next, a driving voltage waveform for driving panel 10 and its operation will be described. The plasma display device 40 performs gradation display by dividing a field period into a plurality of subfields, and controlling light emission / non-light emission of each discharge cell for each subfield. Each subfield has an initialization period, an address period, and a sustain period. In the initializing period, initializing discharge is generated, and wall charges necessary for the subsequent address discharge are formed on each electrode. In the address period, address discharge is selectively generated in the discharge cells to emit light to form wall charges. In the sustain period, a number of sustain pulses corresponding to the luminance weight are alternately applied to the display electrode pairs, and a sustain discharge is generated in the discharge cells that have generated the address discharge to emit light. As a subfield configuration, for example, one field is divided into 10 subfields (SF1, SF2,..., SF10), and each subfield is, for example, (1, 2, 3, 6, 11, 18, 30). , 44, 60, 80). However, the present invention is not limited to the subfield configuration described above.

  FIG. 4 is a waveform diagram of driving voltage applied to each electrode of panel 10 of plasma display device 40 in accordance with the first exemplary embodiment of the present invention. Although FIG. 4 shows two subfields SF1 and SF2, the same applies to the other subfields.

  In the first half of the initialization period of SF1, voltage 0 (V) is applied to data electrodes D1 to Dm and sustain electrodes SU1 to SUn, respectively, and discharge is started to scan electrodes SC1 to SCn with respect to sustain electrodes SU1 to SUn. A ramp waveform voltage that gently rises from a voltage Vi1 equal to or lower than the voltage toward a voltage Vi2 that exceeds the discharge start voltage is applied. While this ramp waveform voltage rises, a weak initializing discharge occurs between scan electrodes SC1 to SCn, sustain electrodes SU1 to SUn, and data electrodes D1 to Dm. Negative wall voltage is accumulated on scan electrodes SC1 to SCn, and positive wall voltage is accumulated on data electrodes D1 to Dm and sustain electrodes SU1 to SUn. Here, the wall voltage on the electrode represents a voltage generated by wall charges accumulated on the dielectric layer covering the electrode, the protective layer, the phosphor layer, and the like.

  In the latter half of the initialization period, positive voltage Ve1 is applied to sustain electrodes SU1 to SUn, and discharge start voltage is applied to scan electrodes SC1 to SCn from voltage Vi3 that is equal to or lower than the discharge start voltage with respect to sustain electrodes SU1 to SUn. A ramp waveform voltage that gradually falls toward the voltage Vi4 exceeding the threshold voltage is applied. During this time, weak initializing discharges occur between scan electrodes SC1 to SCn, sustain electrodes SU1 to SUn, and data electrodes D1 to Dm, respectively. Then, the negative wall voltage on scan electrodes SC1 to SCn and the positive wall voltage on sustain electrodes SU1 to SUn are weakened, and the positive wall voltage on data electrodes D1 to Dm is adjusted to a value suitable for the write operation. The

  As the drive voltage waveform in the initialization period, as shown in the initialization period of SF2 in FIG. 4, only the drive voltage waveform in the latter half of the initialization period may be applied. Initializing discharge is selectively generated in the discharge cells that have undergone sustain discharge in the sustain period of the subfield.

  In the subsequent address period, voltage Ve2 is applied to sustain electrodes SU1 to SUn, and voltage Vc is applied to scan electrodes SC1 to SCn. Next, a scan pulse of a negative voltage Va is applied to the scan electrode SC1 in the first row, and the data electrode Dk (k = 1 to m) of the discharge cell to be emitted in the first row among the data electrodes D1 to Dm. An address pulse with a positive voltage Vd is applied to the. At this time, the voltage difference at the intersection between the data electrode Dk and the scan electrode SC1 is obtained by adding the wall voltage difference to the applied voltage difference and exceeds the discharge start voltage. Then, address discharge occurs between data electrode Dk and scan electrode SC1, and between sustain electrode SU1 and scan electrode SC1, positive wall voltage is accumulated on scan electrode SC1, and negative wall is applied on sustain electrode SU1. A voltage is accumulated, and a negative wall voltage is also accumulated on the data electrode Dk. In this manner, an address operation is performed in which an address discharge is caused in the discharge cells to be lit in the first row and wall voltage is accumulated on each electrode. On the other hand, the voltage at the intersection of the data electrodes D1 to Dm to which the address pulse is not applied and the scan electrode SC1 does not exceed the discharge start voltage, so that address discharge does not occur. The above address operation is performed until the discharge cell in the nth row, and the address period ends.

  In the subsequent sustain period, discharge control is performed to improve the light emission efficiency of the sustain discharge and stably maintain the sustain discharge. However, as will be described later in detail, the sustain operation in the sustain period will be described later. The outline of will be described. First, sustain pulse of positive voltage Vs is applied to scan electrodes SC1 to SCn, and voltage 0 (V) is applied to sustain electrodes SU1 to SUn. Then, in the discharge cell in which the address discharge has occurred, the voltage difference between scan electrode SCi and sustain electrode SUi is the difference between the applied voltage and the wall voltage difference, and exceeds the discharge start voltage. Then, a sustain discharge occurs between scan electrode SCi and sustain electrode SUi, and phosphor layer 35 emits light by the ultraviolet rays generated at this time. Then, a negative wall voltage is accumulated on scan electrode SCi, and a positive wall voltage is accumulated on sustain electrode SUi. Further, a positive wall voltage is accumulated on the data electrode Dk. In the discharge cells in which no address discharge has occurred during the address period, no sustain discharge occurs, and the wall voltage at the end of the initialization period is maintained.

  Subsequently, voltage 0 (V) is applied to scan electrodes SC1 to SCn, and a sustain pulse of voltage Vs is applied to sustain electrodes SU1 to SUn. Then, in the discharge cell in which the sustain discharge has occurred, since the voltage difference between the sustain electrode SUi and the scan electrode SCi exceeds the discharge start voltage, the sustain discharge occurs again, and a negative wall voltage is accumulated on the sustain electrode SUi. A positive wall voltage is accumulated on the electrode SCi. Thereafter, similarly, the number of sustain pulses corresponding to the luminance weight is alternately applied to scan electrodes SC1 to SCn and sustain electrodes SU1 to SUn, and a potential difference is applied between the electrodes of the display electrode pair, so that the address discharge is performed in the address period. The sustain discharge is continuously performed in the discharge cell that has caused the failure.

  At the end of the sustain period, an erase waveform is applied to scan electrodes SC1 to SCn to erase the wall voltage on scan electrode SCi and sustain electrode SUi while leaving the positive wall voltage on data electrode Dk. ing. Specifically, after sustain electrodes SU1 to SUn are returned to voltage 0 (V), an upward ramp waveform voltage that gently rises to voltage Vr is applied to scan electrodes SC1 to SCn. Then, a weak discharge occurs between sustain electrode SUi and scan electrode SCi of the discharge cell in which the sustain discharge has occurred, and the wall voltage between scan electrode SCi and sustain electrode SUi is weakened. Thus, the maintenance operation in the maintenance period is completed.

  Sub-field operations after SF2 are substantially the same as those described above except for the number of sustain pulses, and thus description thereof is omitted.

  In this embodiment, the voltage values applied to the electrodes are, for example, the voltage Vi1 = 145 (V), the voltage Vi2 = 290 (V), the voltage Vi3 = 200 (V), and the voltage Vi4 = −170 (V). , Voltage Vc = −25 (V), voltage Va = −190 (V), voltage Vs = 200 (V), voltage Vr = 200 (V), voltage Ve1 = 135 (V), voltage Ve2 = 150 (V) The voltage Vd is 60 (V). However, these voltage values are merely an example, and it is desirable to set them to optimum values as appropriate in accordance with the characteristics of the panel 10 and the specifications of the plasma display device 40.

  Next, details of the pair of sustain pulse generation circuits, that is, the sustain pulse generation circuits 50 and 60, and their operations will be described. FIG. 5 is a circuit diagram of sustain pulse generation circuits 50 and 60 of plasma display device 40 in accordance with the first exemplary embodiment of the present invention. In FIG. 5, the interelectrode capacitance of the panel 10 is shown as Cp, and the circuit for generating the scan pulse and the initialization voltage waveform is omitted. Further, a circuit for generating the voltage Ve1 and the voltage Ve2 is also omitted.

  The sustain pulse generation circuit 50 includes a power recovery unit 51 and a clamp unit 53. The power recovery unit 51 includes a power recovery capacitor C50, switching elements Q51 and Q52, backflow prevention diodes D51 and D52, and resonance inductors L51 and L52. The clamp part 53 has switching elements Q53 and Q54. The power recovery unit 51 and the clamp unit 53 are connected to scan electrodes SC1 to SCn, which are one end of the interelectrode capacitance Cp, via a scan pulse generation circuit (not shown because it is in a short circuit state during the sustain period).

  The power recovery unit 51 causes the inter-electrode capacitance Cp and the inductor L51 or the inductor L52 to resonate with each other so as to rise and fall the sustain pulse. When the sustain pulse rises, the charge stored in the power recovery capacitor C50 is transferred to the interelectrode capacitance Cp via the switching element Q51, the diode D51, and the inductor L51. When the sustain pulse falls, the charge stored in the interelectrode capacitance Cp is returned to the power recovery capacitor C50 via the inductor L52, the diode D52, and the switching element Q52. Thus, since the power recovery unit 51 drives the scan electrodes SC1 to SCn by LC resonance without being supplied with power from the power source, the power consumption is ideally “0”. The power recovery capacitor C50 has a sufficiently large capacity compared to the interelectrode capacity Cp, and is charged to a voltage Vs / 2 that is approximately half of the voltage Vs so as to serve as a power source for the power recovery unit 51.

  Clamp unit 53 clamps scan electrodes SC1 to SCn to voltage Vs via switching element Q53. Further, scan electrodes SC1 to SCn are clamped to voltage 0 (V) through switching element Q54. Therefore, the impedance at the time of voltage application by the clamp part 53 is small, and a large discharge current due to strong sustain discharge can flow stably.

  Thus, sustain pulse generating circuit 50 applies sustain pulses to scan electrodes SC1 to SCn using power recovery unit 51 and clamp unit 53 by controlling switching elements Q51, Q52, Q53, and Q54. Note that these switching elements can be configured using generally known elements such as MOSFETs and IGBTs.

  The sustain pulse generation circuit 60 includes a power recovery unit 61 having a capacitor C60 for power recovery, switching elements Q61 and Q62, diodes D61 and D62 for backflow prevention, and inductors L61 and L62 for resonance, and switching elements Q63 and Q64. The clamp part 63 which has it, and is connected to the sustain electrodes SU1-SUn which are the other ends of the interelectrode capacitance Cp of the panel 10. Since the operation of sustain pulse generating circuit 60 is the same as that of sustain pulse generating circuit 50, description thereof is omitted.

  Next, details of the sustain pulse will be described. In the present embodiment, a pair of sustain pulse generation circuits 50 and 60 are used to generate two types of sustain discharges, the first sustain discharge and the second sustain discharge. The first sustain discharge is a sustain discharge that is generated by raising the voltage of one electrode of the display electrode pair and then lowering the voltage of the other electrode of the display electrode pair. The second sustain discharge is a sustain discharge that generates a sustain discharge by raising the voltage of the other electrode of the display electrode pair after the voltage of one electrode of the display electrode pair is lowered.

  These two sustain discharges are switched for each subfield in accordance with the lighting rate. Specifically, the first sustain discharge is generated in a subfield whose lighting rate is less than a predetermined threshold, and the second sustain discharge is generated in a subfield whose lighting rate is equal to or higher than a predetermined threshold.

  First, the first sustain discharge generated in the subfield having a low lighting rate will be described in detail. FIG. 6 is a timing chart showing details of the sustain pulse for generating the first sustain discharge of plasma display device 40 in the first exemplary embodiment of the present invention. One period of the sustain pulse repetition period (hereinafter abbreviated as “sustain period”) is divided into six periods indicated by T1 to T6, and each period will be described. In the following description, the operation for turning on the switching element is expressed as ON, and the operation for blocking is described as OFF.

(Period T1)
At time t1, switching element Q61 is turned on. Then, current begins to flow from the power recovery capacitor C60 to the sustain electrodes SU1 to SUn through the switching element Q61, the diode D61, and the inductor L61, and the voltage of the sustain electrodes SU1 to SUn starts to increase. Since the resonance period of inductor L61 and interelectrode capacitance Cp is set to 1600 nsec, the voltage of sustain electrodes SU1 to SUn rises to approximately voltage Vs after 800 nsec from time t1.

(Period T2)
At time t2, switching element Q63 is turned on. Then, sustain electrodes SU1 to SUn are connected to the power source of voltage Vs through switching element Q63, and sustain electrodes SU1 to SUn are clamped to voltage Vs.

  Further, the switching element Q52 is turned on. Then, current starts to flow from scan electrodes SC1 to SCn to capacitor C50 through inductor L52, diode D52, and switching element Q52, and the voltage of scan electrodes SC1 to SCn starts to drop. In the present embodiment, since the resonance period of inductor L52 and interelectrode capacitance Cp is set to 1600 nsec, the voltage of scan electrodes SC1 to SCn drops to almost 0 (V) after 800 nsec from time t2. .

(Period T3)
At time t3, switching element Q54 is turned on. Then, since scan electrodes SC1 to SCn are grounded through switching element Q54, the voltages of scan electrodes SC1 to SCn are clamped to voltage 0 (V). When scan electrodes SC1 to SCn are clamped to voltage 0 (V), the voltage difference between scan electrodes SC1 to SCn and sustain electrodes SU1 to SUn exceeds the discharge start voltage in the discharge cell in which the address discharge has occurred. Will occur.

  Switching element Q52 may be turned off after time t3 and before time t4, and switching element Q61 may be turned off after time t2 and before time t5. Further, in order to lower the output impedance of sustain pulse generating circuits 50 and 60, switching element Q54 that clamps scan electrodes SC1 to SCn to voltage 0 (V) is turned OFF immediately before time t4, and sustain electrodes SU1 to SUn. The switching element Q63 that has been clamped to the voltage Vs is preferably turned off immediately before time t5.

(Period T4)
At time t4, switching element Q51 is turned on. Then, a current starts to flow from power recovery capacitor C50 to scan electrodes SC1 to SCn through switching element Q51, diode D51, and inductor L51, and the voltage of scan electrodes SC1 to SCn starts to rise. The resonance period between inductor L51 and interelectrode capacitance Cp is set to 1600 nsec, and the voltage of scan electrodes SC1 to SCn rises to almost voltage Vs after 800 nsec from time t5.

(Period T5)
At time t5, switching element Q53 is turned on. Then, scan electrodes SC1 to SCn are clamped at voltage Vs.

  Further, the switching element Q62 is turned on. Then, current starts to flow from sustain electrodes SU1 to SUn to capacitor C60 through inductor L62, diode D62, and switching element Q62, and the voltage of sustain electrodes SU1 to SUn begins to decrease. The resonance period between the inductor L62 and the interelectrode capacitance Cp is also set to 1600 nsec, and the voltage of the sustain electrodes SU1 to SUn drops to almost 0 (V) after 800 nsec from time t5.

(Period T6)
Switching element Q64 is turned ON at time t6. Then, sustain electrodes SU1 to SUn are grounded through switching element Q64, and sustain electrodes SU1 to SUn are clamped at voltage 0 (V).

  When sustain electrodes SU1 to SUn are clamped at voltage 0 (V), the voltage difference between scan electrodes SC1 to SCn and sustain electrodes SU1 to SUn exceeds the discharge start voltage in the discharge cell in which the address discharge has occurred. Occurs.

  Switching element Q62 may be turned off after time t6 and before time t1 of the next sustain period, and switching element Q51 may be turned off after time t5 and before time t2 of the next sustain period. In order to lower the output impedance of sustain pulse generating circuits 50 and 60, switching element Q64 is preferably turned off immediately before time t1 of the next sustain period, and switching element Q53 is turned off immediately before time t2 of the next sustain period. .

  By repeating the operations in the above-described periods T1 to T6, sustain pulse generating circuits 50 and 60 in the present embodiment can generate the first sustain discharge.

  As described above, the first sustain discharge is characterized by first raising the voltage of one electrode of the display electrode pair to the voltage Vs and then lowering the voltage of the other electrode of the display electrode pair to the voltage 0 (V). This is the point of generating discharge. In the subfield having a low lighting rate, the first sustain discharge is generated.

  Next, the second sustain discharge used in the subfield having a high lighting rate will be described in detail. FIG. 7 is a timing chart showing details of the sustain pulse for generating the second sustain discharge of plasma display device 40 in the first exemplary embodiment of the present invention. One period of the sustain period is divided into six periods indicated by T11 to T16, and each period will be described.

(Period T11)
At time t11, switching element Q52 is turned on. Then, current starts to flow from scan electrodes SC1 to SCn to capacitor C50 through inductor L52, diode D52, and switching element Q52, and the voltage of scan electrodes SC1 to SCn starts to drop. Then, after 800 nsec from time t11, the voltages of scan electrodes SC1 to SCn drop to almost 0 (V).

(Period T12)
Switching element Q54 is turned ON at time t12. Then, since scan electrodes SC1 to SCn are grounded through switching element Q54, the voltages of scan electrodes SC1 to SCn are clamped to voltage 0 (V).

  Further, the switching element Q61 is turned on. Then, current begins to flow from the power recovery capacitor C60 to the sustain electrodes SU1 to SUn through the switching element Q61, the diode D61, and the inductor L61, and the voltage of the sustain electrodes SU1 to SUn starts to increase. Then, after 800 nsec from time t12, the voltages of sustain electrodes SU1 to SUn rise to almost voltage Vs.

(Period T13)
Switching element Q63 is turned ON at time t13. Then, sustain electrodes SU1 to SUn are connected to the power source of voltage Vs through switching element Q63, and sustain electrodes SU1 to SUn are clamped to voltage Vs. When sustain electrodes SU1 to SUn are clamped at voltage Vs, the voltage difference between scan electrodes SC1 to SCn and sustain electrodes SU1 to SUn exceeds the discharge start voltage in the discharge cell in which the address discharge has occurred, and a sustain discharge is generated. .

  Switching element Q52 may be turned off after time t12 and before time t15, and switching element Q61 may be turned off after time t13 and before time t14. Further, in order to lower the output impedance of sustain pulse generating circuits 50 and 60, switching element Q54 that clamps scan electrodes SC1 to SCn to voltage 0 (V) is turned OFF immediately before time t15, and sustain electrodes SU1 to SUn. Is preferably turned off immediately before time t14.

(Period T14)
Switching element Q62 is turned ON at time t14. Then, current starts to flow from sustain electrodes SU1 to SUn to capacitor C60 through inductor L62, diode D62, and switching element Q62, and the voltage of sustain electrodes SU1 to SUn begins to decrease. Then, after 800 nsec from time t <b> 14, the voltages of sustain electrodes SU <b> 1 to SUn drop to almost 0 (V).

(Period T15)
Switching element Q64 is turned ON at time t15. Then, sustain electrodes SU1 to SUn are grounded through switching element Q64, and sustain electrodes SU1 to SUn are clamped at voltage 0 (V).

  Further, the switching element Q51 is turned on. Then, a current starts to flow from power recovery capacitor C50 to scan electrodes SC1 to SCn through switching element Q51, diode D51, and inductor L51, and the voltage of scan electrodes SC1 to SCn starts to rise. Then, after 800 nsec from time t15, the voltages of scan electrodes SC1 to SCn rise to almost voltage Vs.

(Period T16)
Switching element Q53 is turned ON at time t16. Then, scan electrodes SC1 to SCn are clamped at voltage Vs. When scan electrodes SC1 to SCn are clamped at voltage Vs, the voltage difference between scan electrodes SC1 to SCn and sustain electrodes SU1 to SUn exceeds the discharge start voltage in the discharge cell in which the address discharge has occurred, and a sustain discharge is generated. .

  Switching element Q62 may be turned off after time t15 and before time t12 of the next sustain period, and switching element Q51 may be turned off after time t16 and before time t11 of the next sustain period. In order to lower the output impedance of sustain pulse generating circuits 50 and 60, switching element Q64 is preferably turned off immediately before time t12 of the next sustain period, and switching element Q53 is turned off immediately before time t11 of the next sustain period. .

  By repeating the operations in the above-described periods T11 to T16, sustain pulse generation circuits 50 and 60 in the present embodiment can generate the second sustain discharge.

  Thus, as described in detail in the periods T11 to T16, the second sustain discharge is characterized by first lowering the voltage of one electrode of the display electrode pair to a voltage of 0 (V) and then the display electrode pair. The voltage of the other electrode is raised to the voltage Vs and generated. In the subfield having a high lighting rate, the second sustain discharge is generated.

  Note that in this embodiment, the time periods T1, T2, T3, T4, T5, and T6 shown in FIG. 6 are set to 1000 nsec, 500 nsec, 1200 nsec, 1000 nsec, 500 nsec, and 1200 nsec, respectively. Yes. Further, the periods T11, T12, T13, T14, T15, and T16 shown in FIG. 7 are also set to 1000 nsec, 500 nsec, 1200 nsec, 1000 nsec, 500 nsec, and 1200 nsec, respectively.

  Next, the reason why the light emission efficiency is improved by generating the first sustain discharge when the lighting rate of the subfield is low and generating the second sustain discharge when the lighting rate of the subfield is high will be described. To do. The present inventors investigated in detail the relationship between the lighting rate and the luminous efficiency. FIG. 8 is a diagram showing the relationship between the lighting rate and the light emission efficiency for the first sustain discharge and the second sustain discharge, in which the horizontal axis shows the lighting rate and the vertical axis shows the light emission efficiency. The light emission efficiency is shown as a relative value where the light emission efficiency at which the first sustain discharge and the second sustain discharge are equal to the lighting rate is set to “1.0”.

  FIG. 8 shows measured values of a panel with a display screen size equivalent to 50 inches. When the lighting rate is 40% or less, the luminous efficiency of the first sustain discharge is higher than the luminous efficiency of the second sustain discharge. It is high. When the lighting rate is 60% or more, the light emission efficiency of the second sustain discharge is higher than the light emission efficiency of the first sustain discharge. This is considered to be due to the following reasons.

  The discharge cell of panel 10 in the present embodiment has a configuration in which display electrode pair 24 and data electrode 32 face each other across a discharge space. The scan electrode 22 and the sustain electrode 23 are covered with a protective layer 26 of magnesium oxide that easily emits electrons, and a phosphor layer 35 that hardly emits electrons is formed on the data electrode 32. Therefore, a discharge in which the display electrode pair 24 serves as a cathode and the data electrode 32 serves as an anode is likely to occur, and a discharge in which the display electrode pair 24 serves as an anode and the data electrode 32 serves as a cathode hardly occurs. Therefore, when a voltage waveform that reduces the voltage is applied to the scan electrode 22 or the sustain electrode 23, a discharge easily occurs between the scan electrode 22 or the sustain electrode 23 and the data electrode 32, and the voltage is applied to the scan electrode 22 or the sustain electrode 23. When a rising voltage waveform is applied, a discharge is unlikely to occur between the scan electrode 22 or the sustain electrode 23 and the data electrode 32.

  Therefore, in the case of the second sustain discharge that is generated by raising the voltage of the other electrode of the display electrode pair after the voltage of one electrode of the display electrode pair is lowered, the voltage of one electrode of the display electrode pair is raised. When lowered, a weak discharge is generated between the data electrodes and the wall charge of one electrode of the display electrode pair decreases. Since the sustain discharge is generated by raising the voltage of the other electrode of the display electrode pair after the wall charge is reduced, it is considered that the luminous efficiency of the second sustain discharge is lowered. However, since the second sustain discharge is temporally dispersed and discharge occurs, the peak current associated with the discharge is low and is not easily affected by the impedance of the current path, so the luminous efficiency is affected even if the lighting rate changes. It also has the feature of being difficult.

  On the other hand, in the case of the first sustain discharge generated by raising the voltage of one electrode of the display electrode pair and then lowering the voltage of the other electrode of the display electrode pair, the voltage of one electrode of the display electrode pair No discharge is generated between the data electrode and the data electrode. Thereafter, when the voltage of the other electrode of the display electrode pair is raised to generate a sustain discharge, sufficient wall charges are accumulated, so that the light emission efficiency of the first sustain discharge is considered to be high. However, since the discharge is concentrated in a short time in the first sustain discharge, the peak current accompanying the discharge is high and is easily affected by the impedance of the current path. When the lighting rate increases, a large voltage drop occurs and the luminous efficiency increases. It is thought to decline.

  Therefore, a first sustain discharge is generated in a subfield where the lighting rate is lower than the threshold with respect to a predetermined threshold, and a second sustain discharge is generated in a subfield where the lighting rate is equal to or higher than the threshold. As a result, the luminous efficiency of the panel can be improved.

  The predetermined threshold value is desirably set lower as the display screen size of the panel becomes larger, and is preferably set between approximately 30% and 70% for a panel having a display screen size equivalent to 50 inches. In this embodiment, 50% is set based on the impedance of the current path, the discharge characteristics of the panel, and the like.

  As described above, in the present embodiment, the pair of sustain pulse generation circuits 50 and 60 displays after raising the voltage of one electrode of the display electrode pair in the subfield where the lighting rate is less than the predetermined threshold value. The voltage of the other electrode of the electrode pair is lowered to generate the first sustain discharge, and the display electrode is lowered after the voltage of one electrode of the display electrode pair is lowered in the subfield where the lighting rate is a predetermined threshold value or more. A voltage of the other electrode of the pair is raised to generate a second sustain discharge, thereby realizing a plasma display device with high luminous efficiency.

  In the present embodiment, an example has been described in which all the sustain pulses applied to the display electrode pair are switched to either the first sustain discharge or the second sustain discharge according to the lighting rate. However, the present invention is not limited to this, and most of the sustain discharge or a part of the sustain discharge may be switched according to the lighting rate.

(Embodiment 2)
FIG. 9 is a diagram schematically showing the arrangement of sustain pulses applied to scan electrodes SC1 to SCn and sustain electrodes SU1 to SUn of plasma display device 40 in accordance with the second exemplary embodiment of the present invention. FIG. 9B shows an arrangement of sustain pulses used in a subfield whose lighting rate is lower than the threshold value, and FIG. 9B shows an arrangement of sustain pulses used in a subfield whose lighting rate is equal to or higher than the threshold value.

  In the present embodiment, the second sustain discharge is generated at the beginning of the sustain period regardless of the lighting rate. Therefore, at the beginning of the sustain period, first, voltage 0 (V) is applied to sustain electrodes SU1 to SUn, and then voltage Vs is applied to scan electrodes SC1 to SCn to generate a second sustain discharge. Further, the second sustain discharge is generated regardless of the lighting rate even for the last several pulses of the sustain period, that is, four pulses in the present embodiment. Therefore, at the end of the sustain period, first, the voltage 0 (V) is applied to one electrode of the display electrode pair, and then the voltage Vs is applied to the other electrode of the display electrode pair to generate the second sustain discharge by 4 pulses. Generate minutes.

  Except for the first and last four pulses of the sustain period, the first sustain discharge is generated when the lighting rate is less than the predetermined threshold value, and when the lighting rate is equal to or higher than the predetermined threshold value. A second sustain discharge is generated. That is, for most of the sustain pulses except the first sustain pulse and the last few pulses in the sustain period, if the lighting rate is less than a predetermined threshold value, as shown in FIG. A sustain pulse for generating a sustain discharge is applied to the display electrode pair. If the lighting rate is equal to or higher than a predetermined threshold value, a sustain pulse for generating the second sustain discharge is displayed as shown in FIG. 9B. Apply to pair.

  As described above, in the present embodiment, most of the sustain discharges in the sustain period are switched to sustain discharges having high luminous efficiency based on the lighting rate of the subfield, and the first sustain discharge generated in the sustain period is the sustain discharge. Regardless of the ratio of the discharge cells to be generated, the sustain discharge can be reliably started by using the second sustain discharge. The sustain discharge generated at least last in the sustain period is the second sustain discharge regardless of the proportion of the discharge cells that generate the sustain discharge, so that the initializing discharge and the address discharge in the subsequent subfield can be stabilized. Can be generated.

(Embodiment 3)
FIG. 10 is a diagram schematically showing the arrangement of sustain pulses applied to scan electrodes SC1 to SCn and sustain electrodes SU1 to SUn of plasma display device 40 in accordance with the third exemplary embodiment of the present invention, and the lighting rate is predetermined. The arrangement of sustain pulses that are lower than the threshold and when the first sustain discharge is generated is shown. FIG. 10A shows an arrangement of sustain pulses for generating the second sustain discharge once after repeating the first sustain discharge three times so that the first sustain discharge does not continue more than three times. FIG. 10 (b) shows an arrangement of sustain pulses for generating the second sustain discharge once after the first sustain discharge is repeated four times so that the first sustain discharge does not continue more than four times. Show.

  Further, the sustain pulse for generating the second sustain discharge first sets a long fall time for lowering the voltage of one electrode of the display electrode pair, and then rises the voltage of the other electrode of the display electrode pair thereafter. The time is set short. That is, the periods T11 and T14, which are the fall times, are set longer than 500 nsec. In this embodiment, 800 nsec, which is ½ of the resonance period of the inductor L52 or the inductor L62 and the interelectrode capacitance Cp. Is set. By setting in this way, the discharge generated between the display electrode pair and the data electrode when the voltage of one electrode of the display electrode pair is lowered can be weakened, and the wall charge of one electrode of the display electrode pair can be reduced. Can be suppressed.

  The time periods T12 and T15, which are rise times, are set to be shorter than 500 nsec. In this embodiment, the time is set to 400 nsec. By setting in this way, a strong sustain discharge can be generated and the wall charges generated by the sustain discharge can be increased, so that the subsequent sustain discharge can be stabilized.

  Thus, by inserting a sustain pulse for generating the second sustain discharge into the sustain pulse train for generating the first sustain discharge so that the first sustain discharge does not continue beyond a predetermined number of times, the panel The present inventors have experimentally confirmed that the sustain discharge can be continued stably even when the discharge characteristics are changed after using for a long time.

  For example, this phenomenon can be considered as follows. Generally, when the panel is used for a long time, the discharge start voltage between the display electrode pair tends to increase. When the first sustain discharge is generated in a state where the discharge start voltage is high, the discharge between the display electrode pairs starts in a state where the voltage applied to the discharge space is high, and the wall charge is reduced. When the first sustain discharge is continuously generated, the wall charges are further reduced and the discharge becomes unstable.

  However, according to the present embodiment, since the sustain pulse for generating the second sustain discharge is inserted into the sustain pulse train for generating the first sustain discharge, it is weak between one of the display electrode pair and the data electrode. Although discharge occurs, discharge between the display electrode pairs is suppressed, and a decrease in wall charge between the display electrode pairs is suppressed. Further, in the present embodiment, the sustain pulse for generating the second sustain discharge has a long fall time for lowering the voltage of one electrode of the display electrode pair, so the voltage of one electrode of the display electrode pair The discharge generated between the display electrode and the data electrode when the voltage is lowered can be weakened, and the decrease in the wall charge of one electrode of the display electrode pair can be suppressed. Furthermore, since the rise time for raising the voltage of the other electrode of the display electrode pair thereafter is set short, a strong sustain discharge can be generated, and the wall charge generated by the sustain discharge can be increased.

  As described above, the first sustain discharge is generated and the first sustain discharge is not continued beyond a predetermined number of times (three times in FIG. 10A and four times in FIG. 10B). 2 is generated, and the fall time during which the voltage of one electrode of the display electrode pair is lowered in the second sustain discharge is set to the voltage of the other electrode of the display electrode pair in the first sustain discharge. By setting it longer than the falling fall time, even in a panel that has been used for a long time and the discharge start voltage between the pair of display electrodes has decreased, the light emission efficiency is high and stable sustain discharge can be continued. .

  In the subfield in which the number of sustain pulses is equal to or less than a predetermined number, the sustain discharge may be generated using only the sustain pulse train that generates the first sustain discharge.

  In the first to third embodiments, the configuration in which different inductors are used for the rising and falling of the sustain pulse as the inductors of the power recovery units 51 and 61 has been described. However, the present invention is not limited to this configuration. Alternatively, the same inductor may be used for the rising and falling of the sustain pulse.

  In addition, the specific numerical values used in the first to third embodiments are merely examples, and may be appropriately set to optimal values according to the panel characteristics, the specifications of the plasma display device, and the like. desirable.

  INDUSTRIAL APPLICABILITY The present invention is useful as a panel driving method and a plasma display device because it has high luminous efficiency and can maintain stable sustain discharge even for a large-screen panel.

The exploded perspective view of the panel used for the plasma display apparatus in Embodiment 1 of this invention Panel arrangement of panels used in the plasma display device Circuit block diagram of the plasma display device Drive voltage waveform diagram applied to each electrode of the panel of the plasma display device Circuit diagram of sustain pulse generation circuit of the plasma display device Timing chart showing details of sustain pulse for generating first sustain discharge of same plasma display device Timing chart showing details of sustain pulse for generating second sustain discharge of same plasma display device The figure which shows the relationship between the lighting rate with respect to 1st sustain discharge and 2nd sustain discharge, and luminous efficiency. The figure which shows typically the arrangement | sequence of the sustain pulse applied to the scan electrode and sustain electrode of the plasma display apparatus in Embodiment 2 of this invention. The figure which shows typically the arrangement | sequence of the sustain pulse applied to the scan electrode and sustain electrode of the plasma display apparatus in Embodiment 3 of this invention.

DESCRIPTION OF SYMBOLS 10 Panel 22 Scan electrode 23 Sustain electrode 24 Display electrode pair 32 Data electrode 40 Plasma display apparatus 41 Image signal processing circuit 42 Data electrode drive circuit 43 Scan electrode drive circuit 44 Sustain electrode drive circuit 45 Timing generation circuit 48 Lighting rate detection circuit 50, 60 sustain pulse generating circuit 51, 61 power recovery unit 53, 63 clamp unit

Claims (3)

A method of driving a plasma display panel comprising a plurality of discharge cells having a pair of display electrodes,
An address period in which an address discharge is generated in the discharge cell, and a voltage of one electrode of the display electrode pair is raised and then a voltage of the other electrode of the display electrode pair is lowered to generate a first sustain discharge. Or a plurality of subfields having a sustain period in which the voltage of one electrode of the display electrode pair is lowered and then the voltage of the other electrode of the display electrode pair is raised to generate a second sustain discharge. Configure the fields,
A method for driving a plasma display panel, wherein the first sustain discharge is generated and the second sustain discharge is generated so that the first sustain discharge does not continue beyond a predetermined number of times. The fall time during which the voltage of one electrode of the display electrode pair falls in the second sustain discharge is shorter than the fall time during which the voltage of the other electrode of the display electrode pair falls during the first sustain discharge. The method of driving a plasma display panel according to claim 1, wherein the driving method is long. A plasma display panel comprising a plurality of discharge cells having a pair of display electrodes;
The plasma display panel is driven by forming one field with a plurality of subfields having an address period for generating an address discharge in the discharge cells and a sustain period for generating a sustain discharge in the discharge cells in which the address discharge is generated. Drive circuit,
The drive circuit raises the voltage of one electrode of the display electrode pair and then lowers the voltage of the other electrode of the display electrode pair to generate a first sustain discharge or one of the display electrode pairs A pair of sustain pulse generating circuits for generating a second sustain discharge by raising the voltage of the other electrode of the display electrode pair after the voltage of the first electrode is lowered,
The pair of sustain pulse generation circuits generate the first sustain discharge and generate the second sustain discharge so that the first sustain discharge does not continue beyond a predetermined number of times. A plasma display device.

Images