CN103345455B - Patient monitor and many MCU internal storage data switch thereof - Google Patents
Patient monitor and many MCU internal storage data switch thereof Download PDFInfo
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- CN103345455B CN103345455B CN201310271914.7A CN201310271914A CN103345455B CN 103345455 B CN103345455 B CN 103345455B CN 201310271914 A CN201310271914 A CN 201310271914A CN 103345455 B CN103345455 B CN 103345455B
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
- G06F13/14—Handling requests for interconnection or transfer
- G06F13/20—Handling requests for interconnection or transfer for access to input/output bus
- G06F13/28—Handling requests for interconnection or transfer for access to input/output bus using burst mode transfer, e.g. direct memory access DMA, cycle steal
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Abstract
A kind of patient monitor and many MCU internal storage data switch thereof, comprise at least two MCU, spi bus and at least two internal memories, be interconnected between described MCU by described spi bus, described MCU independently connects described internal memory; Described spi bus is the spi bus under DMA pattern, and the internal memory be connected with described MCU exchanges data mutually by the spi bus under DMA pattern.Described patient monitor and many MCU internal storage data switch thereof exchange the data in the internal memory connected separately between MCU automatically with fixing clock frequency, only need between MCU, by this fixing clock frequency, data mutual for needs are put into respective internal memory, reach the object of high-speed communication, connected by spi bus between MCU in addition, whole device wiring is simple.Owing to using the DMA pattern of SPI, intervene without the need to MCU, greatly reduce system overhead, improve system effectiveness.
Description
Technical field
The present invention relates to field of medical device, particularly relate to patient monitor and many MCU internal storage data switch thereof.
Background technology
At present in order to meet in patient monitor system to the high request of real-time performance, two or more MCU(MicroControlUnit can be used in a system, micro-control unit), for the situation the most simply using two MCU, the work that a usual MCU process requirement of real-time is not high, as data store, user interactions etc., the work that another process real-time is higher, as the work such as high-speed plotting, decoding.Must need certain high-speed communication mechanism between these two MCU, common way shares with a slice internal memory, and exclusive reference, utilizes the data transmission rate that rambus reaches higher.
Adopt the scheme of shared drive, generally use rambus directly to connect two or more MCU and same memory chip, direct like this connection by rambus must need a large amount of address of arrangement and data bus, physical connection is complicated, fabric swatch requires higher, its control of work in addition in order to coordinate these MCU and internal memory can be comparatively complicated, and need to consume a large amount of system overheads and control, system effectiveness is low.
Summary of the invention
Based on this, be necessary to realize the complicated and low problem of system effectiveness for general many MCU internal storage data switch, provide a kind of realize simple, system effectiveness is high and can meet patient monitor and many MCU internal storage data switch thereof of high-speed communication.
A kind of many MCU internal storage data switch, comprise at least two MCU, spi bus and at least two internal memories, be interconnected between described MCU by described spi bus, described MCU independently connects described internal memory;
Described spi bus is the spi bus under direct memory access (DirectMemoryAccess, DMA) pattern, and the internal memory be connected with described MCU exchanges data mutually by the spi bus under DMA pattern.
Wherein in an embodiment, the equal and opposite in direction of described internal memory.Wherein in an embodiment, in described, save as the independent memory region divided in described MCU.
Wherein in an embodiment, save as in described and be arranged at outside described MCU and the memory chip be connected with described MCU.
Wherein in an embodiment, described many MCU internal storage data switch also comprises the power supply be connected with described MCU.
Wherein in an embodiment, described spi bus comprises clk data line, nss data line, mosi data line and miso data line, is connected between described MCU by described clk data line, described nss data line, described mosi data line with described miso data line.
Wherein in an embodiment, described many MCU internal storage data switch also comprises at least two SPI/LVDS converters and LVDS bus, described MCU is connected with described SPI/LVDS converter by described spi bus, is connected between every two described SPI/LVDS converters by described LVDS bus.
A kind of patient monitor, comprises many MCU internal storage data switch described above.
Above-mentioned many MCU internal storage data switch, MCU is independently connected with internal memory, high speed SPI bus is adopted to connect MCU, its spi bus is set to DMA direct memory access mode, namely a kind of timing mechanism is adopted, automatically the data in the internal memory connected separately between MCU are exchanged with fixing clock frequency (as 100 milliseconds), only need between MCU, by this fixing clock frequency, data mutual for needs are put into respective internal memory, reach the object of high-speed communication, connected by spi bus between MCU in addition, whole device wiring is simple.Owing to using the DMA pattern of SPI, intervene without the need to MCU, greatly reduce system overhead, improve system effectiveness, thus above-mentioned many MCU internal storage data switch be a kind of realize simple, system effectiveness is high and can meet the device of high-speed communication.
Accompanying drawing explanation
Fig. 1 is the structural representation of described many MCU internal storage data switch first embodiment;
Fig. 2 is the structural representation of described many MCU internal storage data switch second embodiment.
Embodiment
In order to make object of the present invention, technical scheme and advantage clearly understand, below with reference to the accompanying drawings and embodiment, the present invention is further elaborated.Should be appreciated that concrete enforcement described herein is only in order to explain the present invention, does not limit the present invention.
For the ease of explaining, described many MCU internal storage data switch is described, in following embodiment and accompanying drawing, all adopt the situation of 2 MCU to explain, be to be understood that, when MCU quantity is two or more, embodiment and accompanying drawing are only that simple quantity adds up.
As shown in Figure 1, a kind of many MCU internal storage data switch, comprise at least two MCU100, spi bus 200 and at least two internal memories 300, be interconnected between described MCU100 by described spi bus 200, described MCU100 independently connects described internal memory 300;
Described spi bus 200 is the spi bus under DMA pattern, and the internal memory 300 be connected with described MCU100 exchanges data mutually by the spi bus under DMA pattern.
Spi bus is a kind of synchronous serial Peripheral Interface, and it can make MCU and various peripherals carry out in a serial fashion communicating to exchange information, and its hardware capability is very powerful, so the software relevant with SPI is just quite simple, MCU can process other things more.DMA direct memory access technology is the valuable feature of all modern computers, and it allows the hardware unit of friction speed to link up, and does not need a large amount of interrupt load depending on MCU.
Above-mentioned many MCU internal storage data switch, MCU is independently connected with internal memory, high speed SPI bus is adopted to connect MCU, its spi bus is set to DMA direct memory access mode, namely a kind of timing mechanism is adopted, automatically the data in the internal memory connected separately between MCU are exchanged with fixing clock frequency (as 100 milliseconds), only need between MCU, by this fixing clock frequency, data mutual for needs are put into respective internal memory, reach the object of high-speed communication, connected by spi bus between MCU in addition, whole device wiring is simple.Owing to using the DMA pattern of SPI, intervene without the need to MCU, greatly reduce system overhead, improve system effectiveness, thus above-mentioned many MCU internal storage data switch be a kind of realize simple, system effectiveness is high and can meet the device of high-speed communication.
Wherein in an embodiment, the equal and opposite in direction of described internal memory.
Memory size is set to identical be convenient to realize internal storage data and exchange, because the data in each region of memory are exchanging with an identical transformation parameter, the equal wiring that can simplify in described many MCU internal storage data switch of memory size, improves its data exchange rate.Wherein in an embodiment, in described, save as the independent memory region divided in described MCU.
In the present embodiment, the independently region of memory divided in MCU is saved as in described, internal memory is set directly in MCU the structure simplifying described many MCU internal storage data switch, improve the speed of exchanges data between MCU and internal memory, be conducive to the speed promoting described many MCU internal storage data switch transmission data.
Wherein in an embodiment, save as in described and be arranged at outside described MCU and the memory chip be connected with described MCU.
Inside save as the memory chip of peripheral hardware outside MCU, its die size can change according to the needs of reality use, and the maximal value of its internal memory can not be subject to the restriction of MCU performance, meets the actual user demand under multiple different situations.
As shown in Figure 2, wherein in an embodiment, described many MCU internal storage data switch also comprises the power supply 400 be connected with described MCU100.
Power supply 400 is for powering for the device of described many MCU internal storage data switch.
Wherein in an embodiment, described spi bus comprises clk data line, nss data line, mosi data line and miso data line, is connected between described MCU by described clk data line, described nss data line, described mosi data line with described miso data line.
Clk data line, nss data line, mosi data line and miso data line are 4 data lines that SPI uses, use above-mentioned 4 data lines can realize the basic function of SPI, so in the present embodiment described spi bus comprise clk data line, nss data line, mosi data line and miso data line can under the prerequisite guaranteeing SPI basic function, simplify its structure to greatest extent, reduce its implementation cost.
As indicated with 2, wherein in an embodiment, described many MCU internal storage data switch also comprises at least two SPI/LVDS converters 500 and LVDS bus 600, described MCU100 is connected with described SPI/LVDS converter 500 by described spi bus 200, is connected between every two described SPI/LVDS converters 500 by described LVDS bus 600.
Because spi bus efficient communication distance only has 50cm, time apart from each other between two MCU, multiple spi bus is just needed to connect.In the present embodiment, be provided with at least two SPI/LVDS converters and LVDS bus, when needing remote SPI to connect between two MCU, two MCU are first connected with described SPI/LVDS converter respectively by spi bus, are connected again between SPI/LVDS converter by LVDS bus.Be to be understood that SPI/LVDS converter can for multiple can farther distance be connected by spi bus between MCU with LVDS bus.Also need in addition to understand, in the present embodiment SPI/LVDS converter can be other signals with the converter of SPI, connected by the bus of this signal between its converter.
A kind of patient monitor, comprises many MCU internal storage data switch described above.
The above embodiment only have expressed several embodiment of the present invention, and it describes comparatively concrete and detailed, but therefore can not be interpreted as the restriction to the scope of the claims of the present invention.It should be pointed out that for the person of ordinary skill of the art, without departing from the inventive concept of the premise, can also make some distortion and improvement, these all belong to protection scope of the present invention.Therefore, the protection domain of patent of the present invention should be as the criterion with claims.
Claims (7)
1. the internal storage data of MCU a more than switch, is characterized in that, comprise at least two MCU, spi bus and at least two internal memories, be interconnected between described MCU by described spi bus, described MCU independently connects described internal memory;
Described spi bus is the spi bus under DMA pattern, and the internal memory be connected with described MCU exchanges data mutually by the spi bus under DMA pattern;
Described device also comprises at least two SPI/LVDS converters and LVDS bus, and described MCU is connected with described SPI/LVDS converter by described spi bus, is connected between every two described SPI/LVDS converters by described LVDS bus; When needing remote SPI to connect between two MCU, two MCU are first connected with described SPI/LVDS converter respectively by spi bus, are connected again between SPI/LVDS converter by LVDS bus.
2. many MCU internal storage data switch according to claim 1, is characterized in that, the equal and opposite in direction of described internal memory.
3. many MCU internal storage data switch according to claim 1 and 2, is characterized in that, saves as the independent memory region divided in described MCU in described.
4. many MCU internal storage data switch according to claim 1 and 2, is characterized in that, saves as and be arranged at outside described MCU and the memory chip be connected with described MCU in described.
5. many MCU internal storage data switch according to claim 1 and 2, is characterized in that, also comprises the power supply be connected with described MCU.
6. many MCU internal storage data switch according to claim 1 and 2, it is characterized in that, described spi bus comprises clk data line, nss data line, mosi data line and miso data line, is connected between described MCU by described clk data line, described nss data line, described mosi data line with described miso data line.
7. a patient monitor, is characterized in that, comprises as the many MCU internal storage data switch in claim 1-6 as described in any one.
Priority Applications (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201310271914.7A CN103345455B (en) | 2013-06-28 | 2013-06-28 | Patient monitor and many MCU internal storage data switch thereof |
| PCT/CN2014/079150 WO2014206181A1 (en) | 2013-06-28 | 2014-06-04 | Patent monitor and multi-mcu memory data exchange device for same |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
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| CN201310271914.7A CN103345455B (en) | 2013-06-28 | 2013-06-28 | Patient monitor and many MCU internal storage data switch thereof |
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| CN103345455A CN103345455A (en) | 2013-10-09 |
| CN103345455B true CN103345455B (en) | 2016-03-30 |
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| WO (1) | WO2014206181A1 (en) |
Families Citing this family (2)
| Publication number | Priority date | Publication date | Assignee | Title |
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| CN103345455B (en) * | 2013-06-28 | 2016-03-30 | 深圳市科曼医疗设备有限公司 | Patient monitor and many MCU internal storage data switch thereof |
| CN112416832A (en) * | 2020-11-06 | 2021-02-26 | 光华临港工程应用技术研发(上海)有限公司 | Communication system based on MIPS framework processor |
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| Publication number | Publication date |
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| WO2014206181A1 (en) | 2014-12-31 |
| CN103345455A (en) | 2013-10-09 |
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