CN103337846A - Peripheral application circuit - Google Patents
Peripheral application circuit Download PDFInfo
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- CN103337846A CN103337846A CN2013102442505A CN201310244250A CN103337846A CN 103337846 A CN103337846 A CN 103337846A CN 2013102442505 A CN2013102442505 A CN 2013102442505A CN 201310244250 A CN201310244250 A CN 201310244250A CN 103337846 A CN103337846 A CN 103337846A
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Abstract
The embodiment of the invention discloses a peripheral application circuit, which is applied to a JV700 chip to avoid an error action of the JV700 chip at the initial powered-on state, so as to prevent the inside of the chip from anomaly and protect the chip from damage. The peripheral application circuit provided by the embodiment of the invention comprises an initial state determination module and a power supply control module, wherein the initial state determination module is respectively connected to an enable analog switch output pin, a power-on reset and chip enable pin and an IO (Input-Output)_10 pin of the JV700 chip, and is used for pulling the voltage of the pins connected to the initial state determination module up to a preset voltage or pulling the voltage of the pins down to ground; the power supply control module is connected to a power supply input terminal of the JV700 chip, and is used for performing power supply control on the JV700 chip through a micro control unit (MCU).
Description
Technical field
The present invention relates to the vehicle diagnosis field, especially relate to a kind of peripheral applications circuit of JV700 chip.
Background technology
JV700 simulation process chip is a collection analog switch array and various communication bus and transceiver, and towards the automobile specified diagnosing chip of the full car of total system system; I/O on this chip and automobile mounted automatic diagnosis system (OBD, the On-Board Diagnostics) diagnose connector (IO, Input/Output) mouth is corresponding one by one, is applicable to the vehicle of all 16PIN standard OBDII interfaces;
The application circuit of existing JV700 chip periphery is less, can be with reference to figure 1, Fig. 1 is the connection diagram of a kind of peripheral applications circuit of existing JV700 chip, wherein, the 1-13 pin is 13 IO mouths, normally, the design of 13 IO mouths of JV700 chip is exactly directly with its man-to-man connection of IO mouth with automobile OBD diagnose connector, 21 22 the corresponding V8 of 23 pins (8V) V5 (5V) V3 (3.3V) be respectively JV700 chip internal low pressure difference linear voltage regulator (LDO, Low drop outregulator) power supply, externally do not power, only use for each analogue device of JV700 chip internal, the outside filter capacitor that only need meet a 2.2uF respectively; 14 pin (SCANH, Inductor and capacitor connection of SCAN) with 28 pin (IND, inductance of need series connection Inductor connection of SCAN) (10uH～22uH), the electric capacity of a 220PF in parallel is to ground (GND again, Ground), this part mainly is responsible for the function of single line controller LAN (CAN, Controller Area Network), do not have this inductance and electric capacity, single line CAN can not communication; And 43 pin K(K-line external1K resistor connection pin) with 44 pin VOK(Internal K-line voltage source) between, 45 pin L(L-line external 1K resistor connection pin) with 46 pin VOL(Internal L-line voltage source) between need respectively the to connect build-out resistor of a 1k.
But the inventor finds that in realizing the process of the embodiment of the invention JV700 chip is powering in a flash, and the internal simulation switch may misoperation when namely powering on initial condition, causes the uncontrollable or some other misoperation of chip internal may defective chip.
Summary of the invention
The embodiment of the invention provides a kind of peripheral applications circuit, is applied to the JV700 chip, is used for avoiding the misoperation of JV700 chip when powering on initial condition, and unusual to prevent that chip internal from occurring, the protection chip is without prejudice.
The embodiment of the invention provides a kind of peripheral applications circuit, is applied to the JV700 chip, and wherein, described peripheral applications circuit comprises initial condition determination module, power supply control module;
Described initial condition determination module links to each other with input and output IO_10 pin with enable analog switch output pin, electrification reset and the chip enable pin POR_EN pin of described JV700 chip respectively, and the pin voltage that described initial condition determination module is used for linking to each other is pulled to preset voltage or is pulled down to ground;
Described power supply control module links to each other with the power input of described JV700 chip, and described power supply control module is used for by micro-control unit MCU the control of powering of described JV700 chip.
Further, described initial condition determination module comprises pull-up resistor, first pull down resistor, second pull down resistor, the 3rd pull down resistor and N-type metal-oxide semiconductor (MOS) nmos fet;
Wherein, the analog switch output pin that enables of described JV700 chip links to each other with described pull-up resistor, and is connected to 3.3 volts of power supplys;
The POR_EN pin of described JV700 chip links to each other with described first pull down resistor and ground connection;
The IO10 pin of described JV700 chip links to each other with described second pull down resistor, described second pull down resistor links to each other with the drain electrode of described nmos fet, the source ground of described nmos fet, the grid of described nmos fet links to each other with the IO pin of described MCU, a described IO pin is used for realization to the diagnostic function of vehicle failure sign indicating number, and described grid and described the 3rd pull down resistor are connected to ground;
Described initial condition determination module, concrete being used for utilized described pull-up resistor when described JV700 chip power, the described voltage that enables the analog switch output pin is pulled to 3.3 volts, utilizes described first pull down resistor to carry out drop-down to the voltage of POR_EN pin; When opening diagnostic function, draw high the voltage of described grid, described nmos fet conducting is so that the described second pull down resistor ground connection when closing diagnostic function, utilizes described the 3rd pull down resistor to drag down the voltage of described grid.
Alternatively, described pull-up resistor resistance is 680 ohm, and the described first pull down resistor resistance is 10k ohm, and the described second pull down resistor resistance is 110k ohm, and described the 3rd pull down resistor resistance is 10k ohm.
Further, described power supply control module comprises NPN triode, pmos fet;
The base stage of described NPN triode links to each other with the 2nd IO pin of described MCU, and the collector electrode of described NPN triode links to each other with the grid of described pmos fet;
The source electrode of described pmos fet links to each other with the power input of described JV700 chip, and the drain electrode of described pmos fet is connected to 12 volts of power supplys;
Described power supply control module, concrete being used for when described the 2nd IO pin is low level, the not conducting of described NPN triode, so that the grid of described pmos fet is low level, the not conducting of described pmos fet is so that disconnect between the power input of described 12 volts of power supplys and described JV700 chip; When described the 2nd IO pin is high level, the conducting of described NPN triode, so that the grid of described pmos fet is high level, described pmos fet conducting, so that the power input of described 12 volts of power supplys and described JV700 chip is connected, give the power input power supply of described JV700 chip.
Further; described peripheral applications circuit also comprises input and output IO mouth protection module; described IO mouth protection module is connected between the IO mouth of the IO mouth of described JV700 chip and the OBD of automobile mounted automatic diagnosis system diagnose connector, and described IO mouth protection module is used for the IO mouth of described JV700 chip is carried out overcurrent and overvoltage protection.
Further, described IO mouth protection module comprises resettable fuse and Transient Voltage Suppressor TVS;
The described resettable fuse of connecting respectively between each IO mouth of described JV700 chip and each IO mouth of described OBD diagnose connector is near the IO oral-lateral of described JV700 chip a described TVS in parallel and ground connection respectively;
Described IO mouth protection module, concrete being used for when instant high-voltage or high electric current are come from the OBD interface, described resettable fuse turn-offs and carries out overcurrent protection, and surge and high voltage transient protection are carried out in described TVS conducting.
Preferably, the rated voltage of described resettable fuse is the 20-30 volt, and rated current is 50 microamperes, and the reverse off state voltage of described TVS is the 15-20 volt.
As can be seen from the above technical solutions, a kind of peripheral applications circuit that the embodiment of the invention provides, be applied to the JV700 chip, initial condition determination module in this JV700 chip periphery application circuit respectively with the JV700 chip enable the analog switch output pin, electrification reset and chip enable pin POR_EN pin link to each other with input and output IO_10 pin, the pin voltage that is used for linking to each other is pulled to preset voltage or is pulled down to ground, the power supply control module links to each other with the power input of JV700 chip, for the control of powering by the JV700 chip of micro-control unit MCU, initial condition in the time of can determining to power on avoids causing owing to the misoperation of JV700 chip when powering on initial condition the problem of the uncontrollable or some other misoperation defective chip of JV700 chip internal effectively.
Description of drawings
In order to be illustrated more clearly in the technical scheme of the embodiment of the invention, below the accompanying drawing do introduction simply of required use will be described to embodiment, apparently, accompanying drawing in describing below only is some embodiments of the present invention, for those of ordinary skills, under the prerequisite of not paying creative work, can also obtain other accompanying drawing according to these accompanying drawings.
Fig. 1 is the connection diagram of a kind of JV700 chip periphery application circuit in the prior art;
The connection diagram of a kind of JV700 chip periphery application circuit that Fig. 2 provides for the embodiment of the invention;
Partial circuit connection diagram in the JV700 chip periphery application circuit that Fig. 3 a provides for the embodiment of the invention;
Partial circuit connection diagram in the JV700 chip periphery application circuit that Fig. 3 b provides for the embodiment of the invention;
Partial circuit connection diagram in the JV700 chip periphery application circuit that Fig. 3 c provides for the embodiment of the invention;
Another part circuit connection diagram in the JV700 chip periphery application circuit that Fig. 4 provides for the embodiment of the invention;
The connection diagram of another JV700 chip periphery application circuit that Fig. 5 provides for the embodiment of the invention;
Another part circuit connection diagram in the JV700 chip periphery application circuit that Fig. 6 provides for the embodiment of the invention.
Embodiment
The embodiment of the invention provides a kind of peripheral applications circuit, is applied to the JV700 chip, is used for avoiding the misoperation of JV700 chip when powering on initial condition, and unusual to prevent that chip internal from occurring, the protection chip is without prejudice.
Below in conjunction with the accompanying drawing in the embodiment of the invention, the technical scheme in the embodiment of the invention is clearly and completely described, obviously, described embodiment only is the present invention's part embodiment, rather than whole embodiment.Based on the embodiment among the present invention, those of ordinary skills belong to the scope of protection of the invention not making all other embodiment that obtain under the creative work prerequisite.
Below be elaborated respectively.
The embodiment of the invention provides a kind of peripheral applications circuit, be applied to the JV700 chip, please refer to Fig. 2, the connection diagram of a kind of JV700 chip periphery application circuit that Fig. 2 provides for the embodiment of the invention, described JV700 chip periphery application circuit comprises initial condition determination module 201, power supply control module 202, wherein, described initial condition determination module 201 respectively with described JV700 chip enable the analog switch output pin, electrification reset and chip enable pin POR_EN pin link to each other with input and output IO_10 pin, and the pin voltage that described initial condition determination module 201 is used for linking to each other is pulled to preset voltage or is pulled down to ground;
Described power supply control module 202 links to each other with the power input VBAT1 of described JV700 chip, and described power supply control module 202 is used for by micro-control unit (MCU, Micro Controller Unit) the control of powering of described JV700 chip.
Be understandable that, in the embodiment of the invention, described JV700 chip enable the 19th pin #G(Output enable pin of serial in-parallel out module that the analog switch output pin is the JV700 chip); Described electrification reset and chip enable pin POR_EN pin are the 30th pin (Power On Reset and chip-ENable pin) of JV700 chip, and this pin need be controlled by MCU, during high level, and chip operation, chip is not worked during low level; Described input and output IO_10 pin is 10 pin IO_10 of 13 IO mouths of JV700 chip, these three pins are connected with described initial condition determination module 201 respectively, be used for voltage is pulled to preset voltage or is pulled down to ground, initial condition when determining to power on prevents the internal simulation switch misoperation in a flash of JV700 chip power.
In addition, the power input of described JV700 chip is the 41st and 42 pins of JV700 chip, represents with VBAT1 among Fig. 2, directly provides 12v voltage to the 41st and 42 pins in the prior art; In the embodiment of the invention, the power input of described JV700 chip links to each other with described power supply control module 202, described power supply control module 202 is used for realizing the power supply of described JV700 chip is controlled by micro-control unit MCU, can avoid the misoperation of JV700 chip when powering on initial condition effectively, it is unusual to prevent that chip internal from occurring.
From the above, a kind of peripheral applications circuit that the embodiment of the invention provides, be applied to the JV700 chip, initial condition determination module 201 in this JV700 chip periphery application circuit respectively with the JV700 chip enable analog switch output pin #G, electrification reset and chip enable pin POR_EN pin link to each other with input and output IO_10 pin, the pin voltage that is used for linking to each other is pulled to preset voltage or is pulled down to ground, power supply control module 202 links to each other with the power input VBAT1 of JV700 chip, for the control of powering by the JV700 chip of micro-control unit MCU, initial condition in the time of can determining to power on avoids causing owing to the misoperation of JV700 chip when powering on initial condition the problem of the uncontrollable or some other misoperation defective chip of JV700 chip internal effectively.
Further, described initial condition determination module 201 comprises pull-up resistor R1, the first pull down resistor R2, the second pull down resistor R3, the 3rd pull down resistor R4 and N-type metal (metal)-oxide (oxid)-semiconductor (semiconductor) nmos fet Q1; Please in the lump with reference to figure 3a, Fig. 3 b and Fig. 3 c, Fig. 3 a, Fig. 3 b and Fig. 3 c are the connection diagram of initial condition determination module 201, Fig. 3 a is the connection diagram that enables the analog switch output pin of initial condition determination module 201 and JV700 chip, wherein, the analog switch output pin #G that enables of described JV700 chip links to each other with described pull-up resistor R1, and is connected to 3.3 volts of power supplys; Fig. 3 b is the connection diagram of the POR_EN pin of initial condition determination module 201 and JV700 chip, and the POR_EN pin of described JV700 chip links to each other with the described first pull down resistor R2 and ground connection; Fig. 3 c is the connection diagram of the IO_10 pin of initial condition determination module 201 and JV700 chip, the IO_10 pin of described JV700 chip links to each other with the described second pull down resistor R3, the described second pull down resistor R3 links to each other with the drain D of described nmos fet, the source S ground connection of described nmos fet, the grid G of described nmos fet links to each other with the IO pin of described MCU, wherein, a described IO pin is used for realization to the diagnostic function of vehicle failure sign indicating number, and described grid G and described the 3rd pull down resistor R4 are connected to ground.
Be understandable that a described IO pin is the IO pin of MCU, for example TDS is used for number of times and interval that the control autobulb glistens, judges the diagnostic trouble code of reading automobile, is commonly called as the flash code diagnosis.
Under this execution mode, described initial condition determination module 201, concrete being used for when described JV700 chip power, utilize described pull-up resistor R1, the described voltage that enables the analog switch output pin is pulled to 3.3 volts, utilizes the voltage of the POR_EN pin of the described first pull down resistor R2 to carry out drop-down; When opening diagnostic function, draw high the voltage of described grid G, described nmos fet Q2 conducting is so that the described second pull down resistor R3 ground connection when closing diagnostic function, utilizes described the 3rd pull down resistor R4 to drag down the voltage of described grid G.
In the embodiment of the invention, described pull-up resistor R1 resistance can be 680 ohm, and the described first pull down resistor R2 resistance can be 10k ohm, and the described second pull down resistor R3 resistance can be 110k ohm, and described the 3rd pull down resistor R4 resistance can be 10k ohm; Be understandable that, draw on each with the resistance of pull down resistor and also can carry out suitable adjustment according to actual conditions, do not do concrete restriction herein.
Need to prove that in the embodiment of the invention, JV700_19 pin #G enables the analog switch output pin and connects one 680 ohm of pull-up resistors (pull-up resistor R1) to 3.3V; JV700_30 pin POR_EN connects a 10k ohm pull down resistance (the first pull down resistor R2) to GND; This change mainly is the initial condition in order to determine to power on, and prevents the internal simulation switch misoperation in a flash of JV700 chip power, causes the uncontrollable or some other misoperation of chip internal may defective chip; The IO10 pin of the corresponding OBD diagnose connector of JV700_10 pin, because in the existing peripheral applications circuit, chip manufacturer is in order to save analog switch, and an IO pin does not arrange the drop-down function of input, so just is easy to be subjected to the interference of external electromagnetic waves (especially power frequency).In the embodiment of the invention, draw a 110k resistance (the second pull down resistor R3) in the IO_10 underfooting, drain D with nmos fet Q2 links to each other again, and use nmos fet to manage power saving than NPN, the source class S ground connection of nmos fet Q2, from the MCU pin, select one to be used for realization to the IO of the diagnostic function of vehicle failure sign indicating number simultaneously, be used for controlling the grid G of this nmos fet Q2.When using this diagnostic function, draw high the grid G of NMOS, open this triode, thereby make the 110K grounding through resistance, during without this diagnostic function, drag down grid G, for guaranteeing its initial condition that powers on, grid G connects a 10k resistance (the 3rd pull down resistor R4) to GND.
Further, described power supply control module 202 comprises NPN triode Q2, pmos fet Q3; Please in the lump with reference to figure 4, the power supply control module 202 that Fig. 4 provides for the embodiment of the invention and the connection diagram of JV700 chip power input VBAT1, the base stage B of described NPN triode Q2 links to each other with the 2nd IO pin (as the PB2 pin) of described MCU, and the collector electrode C of described NPN triode Q2 links to each other with the grid G of described pmos fet Q3; The source S of described pmos fet Q3 links to each other with the power input VBAT1 of described JV700 chip, and the drain D of described pmos fet Q3 is connected to 12 volts of power supplys.
Under this execution mode, described power supply control module 202, concrete being used for when described the 2nd IO pin (PB2 pin) when being low level, not conducting of described NPN triode Q2, so that the grid G of described pmos fet Q3 is low level, not conducting of described pmos fet Q3 is so that disconnect between the power input VBAT1 of described 12 volts of power supplys and described JV700 chip; When described the 2nd IO pin (PB2 pin) when being high level, described NPN triode Q2 conducting, so that the grid G of described pmos fet Q3 is high level, described pmos fet Q3 conducting, so that the power input VBAT1 of described 12 volts of power supplys and described JV700 chip connects, give the power input VBAT1 power supply of described JV700 chip.
Be understandable that; in the embodiment of the invention; as shown in Figure 4; according to actual conditions; also can be provided with some resistance in the described power supply control module 202, some resistance are used for dividing potential drop to obtain optimum braking effect, also have the current-limiting protection function simultaneously; but connection diagram shown in Figure 4 is a kind of implementation only, the present invention is not constituted restriction.
Need to prove, in the embodiment of the invention, because 41,42 pin of JV700 are the power input VBAT1 of JV700, an IO mouth PB2 on the use MCU controls it and powers on, when PB2 was low level, not conducting of NPN triode Q4 was so that the grid G of PMOS field effect transistor Q3 is low level, PMOS field effect transistor Q3 is in not on-state, and VBAT(provides 12 volts of voltages) and the JV700_VBAT1 access failure; When PB2 is high level, NPN triode Q4 base stage B is high level, NPN triode Q4 is in conducting state, at this moment the grid G voltage (7.5V) of PMOS field effect transistor Q3 is high level, PMOS field effect transistor Q3 is in conducting state, VBAT and JV700_VBAT1 connect, to realize giving the power supply input pin VBAT1 power supply of JV700 chip; PB2IO mouth by MCU, realization is to the power supply control of JV700 chip, can avoid the misoperation of JV700 chip when powering on initial condition effectively, it is unusual to prevent that the JV700 chip internal from occurring, simultaneously, guaranteed that also the JV700 chip power supply lags behind the #G(19 pin, enables the analog switch output pin), the POR_EN(30 pin) initial condition of these two pin.
From the above, a kind of peripheral applications circuit that the embodiment of the invention provides, be applied to the JV700 chip, initial condition determination module 201 in this JV700 chip periphery application circuit respectively with the JV700 chip enable analog switch output pin #G, electrification reset and chip enable pin POR_EN pin link to each other with input and output IO_10 pin, the pin voltage that is used for linking to each other is pulled to preset voltage or is pulled down to ground, power supply control module 202 links to each other with the power input VBAT1 of JV700 chip, for the control of powering by the JV700 chip of micro-control unit MCU, initial condition in the time of can determining to power on avoids causing owing to the misoperation of JV700 chip when powering on initial condition the problem of the uncontrollable or some other misoperation defective chip of JV700 chip internal effectively.
Further; described peripheral applications circuit also comprises input and output IO mouth protection module 203; can be with reference to figure 5; the connection diagram of another JV700 chip periphery application circuit that Fig. 5 provides for the embodiment of the invention; described IO mouth protection module 203 is connected between the IO mouth of the IO mouth of described JV700 chip and the OBD of automobile mounted automatic diagnosis system diagnose connector, and described IO mouth protection module is used for the IO mouth of described JV700 chip is carried out overcurrent and overvoltage protection.
Preferably, described IO mouth protection module 203 can comprise resettable fuse F and Transient Voltage Suppressor (TVS, Transient Voltage Suppressor); Wherein, a resettable fuse F connects respectively between each IO mouth of described JV700 chip and each IO mouth of described OBD diagnose connector, manage and ground connection at the IO oral-lateral difference TVS in parallel near described JV700 chip, can be in the lump with reference to figure 6, IO_1 with the JV700 chip among Fig. 6 is example, show the connection diagram of described IO mouth protection module 203 and described IO_1, be understandable that, (IO_2～IO_13) also is to connect as shown in Figure 6 to other IO mouths.
Under this execution mode, described IO mouth protection module 203, concrete being used for when instant high-voltage or high electric current are come from the OBD interface, described resettable fuse closes that F is disconnected to carry out overcurrent protection, and surge and high voltage transient protection are carried out in described TVS conducting.
Be understandable that high pressure and surge that the combined protection of resettable fuse F and TVS pipe induces in the time of can effectively preventing thunder and lightning or automotive ignition burn the JV700 chip, have the certain protection practical value.Combination by resettable fuse F and TVS pipe; as moment big voltage or big electric current when coming from the OBD interface; because resettable fuse F reaction speed is not as good as the TVS pipe; TVS tube reaction speed is quite fast; action at once makes self conducting with big conduct current GND; when curtage continues to increase or time remaining; during over insurance silk tenability limit; thereby resettable fuse F internal resistance increases the shutoff effect of playing rapidly; JV700 is without prejudice with protection; by the time after high pressure and the surge, fuse F recovers conducting again, so not only protected chip injury-free but also can be in protection normal use the later.
Need to prove, for IO mouth protection module 203, certain requirement is arranged aspect parts selection, the selection aspect of resettable fuse F parameter particularly, rated current should be about 50mA, be expressed as the maintenance electric current I H(IH=Hold current of resettable fuse F) approximately be 50mA, more than the rated voltage 20V; Usually, when electric current surpassed 120mA, fuse F just can move, and protection device is not damaged.Being understandable that this keeps size of current to decide according to different concrete application scenarioss, is to confirm through a large amount of actual measurements, chooses in the embodiment of the invention to keep electric current to be approximately 50mA; Selection for TVS pipe parameter, according to device package size and every electric parameter and discuss, its reverse off state voltage (cut-ff voltage) VRWM should be chosen in about 18V, because automobile storage battery voltage is 9～15V, the cut-ff voltage of TVS pipe should be selected bigger than battery voltage; Selecting for pulse peak power Pm be to be the bigger the better, but needs to consider its package size, encapsulates that more the Nature power is also just more big, does not do concrete restriction herein.
From the above, a kind of peripheral applications circuit that the embodiment of the invention provides, be applied to the JV700 chip, initial condition determination module 201 in this JV700 chip periphery application circuit respectively with the JV700 chip enable the analog switch output pin, electrification reset and chip enable pin POR_EN pin link to each other with input and output IO_10 pin, the pin voltage that is used for linking to each other is pulled to preset voltage or is pulled down to ground, power supply control module 202 links to each other with the power input VBAT1 of JV700 chip, for the control of powering by the JV700 chip of micro-control unit MCU, initial condition in the time of can determining to power on avoids causing owing to the misoperation of JV700 chip when powering on initial condition the problem of the uncontrollable or some other misoperation defective chip of JV700 chip internal effectively.Further, JV700 chip periphery application circuit also comprises IO mouth protection module 203, and described IO mouth protection mould 203 is realized the IO mouth of described JV700 chip is carried out overcurrent and overvoltage protection.
The those skilled in the art can be well understood to, and is the convenience described and succinct, the system of foregoing description, and the concrete course of work of device and unit can not repeat them here with reference to the corresponding process among the preceding method embodiment.
In several embodiment that the application provides, should be understood that, disclosed system, apparatus and method can realize by other mode.For example, device embodiment described above only is schematic, for example, the division of described unit, only be that a kind of logic function is divided, during actual the realization other dividing mode can be arranged, for example a plurality of unit or assembly can in conjunction with or can be integrated into another system, or some features can ignore, or do not carry out.Another point, the shown or coupling each other discussed or directly to be coupled or to communicate to connect can be by some interfaces, the indirect coupling of device or unit or communicate to connect can be electrically, machinery or other form.
Described unit as separating component explanation can or can not be physically to separate also, and the parts that show as the unit can be or can not be physical locations also, namely can be positioned at a place, perhaps also can be distributed on a plurality of network element.Can select wherein some or all of unit to realize the purpose of present embodiment scheme according to the actual needs.
In addition, each functional unit in each embodiment of the present invention can be integrated in the processing unit, also can be that the independent physics in each unit exists, and also can be integrated in the unit two or more unit.Above-mentioned integrated unit both can adopt the form of hardware to realize, also can adopt the form of SFU software functional unit to realize.
If described integrated unit is realized with the form of SFU software functional unit and during as independently production marketing or use, can be stored in the computer read/write memory medium.Based on such understanding, part or all or part of of this technical scheme that technical scheme of the present invention contributes to prior art in essence in other words can embody with the form of software product, this computer software product is stored in the storage medium, comprise that some instructions are with so that a computer equipment (can be personal computer, server, the perhaps network equipment etc.) carry out all or part of step of the described method of each embodiment of the present invention.And aforesaid storage medium comprises: various media that can be program code stored such as USB flash disk, portable hard drive, read-only memory (ROM, Read-Only Memory), random access memory (RAM, Random Access Memory), magnetic disc or CD.
More than the peripheral applications circuit of a kind of JV700 chip provided by the present invention is described in detail, for one of ordinary skill in the art, thought according to the embodiment of the invention, part in specific embodiments and applications all can change, in sum, this description should not be construed as limitation of the present invention.
Claims (7)
1. a peripheral applications circuit is applied to the JV700 chip, it is characterized in that, described peripheral applications circuit comprises initial condition determination module, power supply control module;
Described initial condition determination module links to each other with input and output IO_10 pin with enable analog switch output pin, electrification reset and the chip enable pin POR_EN of described JV700 chip respectively, and the pin voltage that described initial condition determination module is used for linking to each other is pulled to preset voltage or is pulled down to ground;
Described power supply control module links to each other with the power input of described JV700 chip, and described power supply control module is used for by micro-control unit MCU the control of powering of described JV700 chip.
2. peripheral applications circuit according to claim 1 is characterized in that, described initial condition determination module comprises pull-up resistor, first pull down resistor, second pull down resistor, the 3rd pull down resistor and N-type metal-oxide semiconductor (MOS) nmos fet;
Wherein, the analog switch output pin that enables of described JV700 chip links to each other with described pull-up resistor, and is connected to 3.3 volts of power supplys;
The POR_EN pin of described JV700 chip links to each other with described first pull down resistor and ground connection;
The IO10 pin of described JV700 chip links to each other with described second pull down resistor, described second pull down resistor links to each other with the drain electrode of described nmos fet, the source ground of described nmos fet, the grid of described nmos fet links to each other with the IO pin of described MCU, a described IO pin is used for realization to the diagnostic function of vehicle failure sign indicating number, and described grid and described the 3rd pull down resistor are connected to ground;
Described initial condition determination module, concrete being used for utilized described pull-up resistor when described JV700 chip power, the described voltage that enables the analog switch output pin is pulled to 3.3 volts, utilizes described first pull down resistor to carry out drop-down to the voltage of POR_EN pin; When opening diagnostic function, draw high the voltage of described grid, described nmos fet conducting is so that the described second pull down resistor ground connection when closing diagnostic function, utilizes described the 3rd pull down resistor to drag down the voltage of described grid.
3. peripheral applications circuit according to claim 2, it is characterized in that described pull-up resistor resistance is 680 ohm, the described first pull down resistor resistance is 10k ohm, the described second pull down resistor resistance is 110k ohm, and described the 3rd pull down resistor resistance is 10k ohm.
4. according to each described peripheral applications circuit of claim 1 to 3, it is characterized in that described power supply control module comprises NPN triode, pmos fet;
The base stage of described NPN triode links to each other with the 2nd IO pin of described MCU, and the collector electrode of described NPN triode links to each other with the grid of described pmos fet;
The source electrode of described pmos fet links to each other with the power input of described JV700 chip, and the drain electrode of described pmos fet is connected to 12 volts of power supplys;
Described power supply control module, concrete being used for when described the 2nd IO pin is low level, the not conducting of described NPN triode, so that the grid of described pmos fet is low level, the not conducting of described pmos fet is so that disconnect between the power input of described 12 volts of power supplys and described JV700 chip; When described the 2nd IO pin is high level, the conducting of described NPN triode, so that the grid of described pmos fet is high level, described pmos fet conducting, so that the power input of described 12 volts of power supplys and described JV700 chip is connected, give the power input power supply of described JV700 chip.
5. peripheral applications circuit according to claim 4; it is characterized in that; described peripheral applications circuit also comprises input and output IO mouth protection module; described IO mouth protection module is connected between the IO mouth of the IO mouth of described JV700 chip and the OBD of automobile mounted automatic diagnosis system diagnose connector, and described IO mouth protection module is used for the IO mouth of described JV700 chip is carried out overcurrent and overvoltage protection.
6. peripheral applications circuit according to claim 5 is characterized in that, described IO mouth protection module comprises resettable fuse and Transient Voltage Suppressor TVS;
The described resettable fuse of connecting respectively between each IO mouth of described JV700 chip and each IO mouth of described OBD diagnose connector is near the IO oral-lateral of described JV700 chip a described TVS in parallel and ground connection respectively;
Described IO mouth protection module, concrete being used for when instant high-voltage or high electric current are come from the OBD interface, described resettable fuse turn-offs and carries out overcurrent protection, and surge and high voltage transient protection are carried out in described TVS conducting.
7. peripheral applications circuit according to claim 6 is characterized in that,
The rated voltage of described resettable fuse is the 20-30 volt, and rated current is 50 microamperes, and the reverse off state voltage of described TVS is the 15-20 volt.
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| CN103337846B (en) | 2016-05-11 |
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