CN103308007B - The IC pin coplanarity measuring system of higher order reflection and grating image and method - Google Patents
The IC pin coplanarity measuring system of higher order reflection and grating image and method Download PDFInfo
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- CN103308007B CN103308007B CN201310200314.1A CN201310200314A CN103308007B CN 103308007 B CN103308007 B CN 103308007B CN 201310200314 A CN201310200314 A CN 201310200314A CN 103308007 B CN103308007 B CN 103308007B
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Abstract
The invention discloses IC pin coplanarity measuring system and the method for a kind of higher order reflection and grating image, it mainly comprises IC chip and to conduct oneself with dignity the intelligent visual detection system of oblique slip feeding mechanism, external trigger synchronization control circuit, IC chip pin imaging optical path system, image pick-up card and Based PC.IC chip pin imaging optical path system is made up of the catoptron of two groups of separate quasi-parallel blue light LED light source, two gratings, multiple organic assembling and isosceles prism.The detection grating fringe image of IC chip pin can be obtained by this imaging optical path system.Image acquisition and analyzing software system are analyzed the IC chip pin image with grating fringe, the isometric property of pin and grating fringe torsion characteristic in evaluation map picture, and according to the corresponding f Function Mapping relation of coplane degree error with grating fringe degree of crook, calculate corresponding coplane degree error.The present invention can realize two row's pin imagings simultaneously of IC chip, only needs the Polaroid Precision measurement that just can complete IC chip pin, and compact conformation, cost performance is high.
Description
Technical field:
Patent of the present invention belongs to electronic integrated circuit encapsulation field, the new method that the coplane degree being specifically related to the IC chip pin in a kind of Electronic Packaging is measured and new system.Be applicable to DIP (DualIn-linePackage, dual-in-line), SOP (SmallOut-LinePackage, little outline packages), the real-time online measuring of the large scale integrated circuit pin coplanarities such as PFP (PlasticFlatPackage, flat package).
Background technology:
Along with the development of surface mounting technology, SMD components achieves development at full speed.In pasted on surface of circuit board (SMT) production technology, for ensureing mounting quality, there is certain requirement to the size of IC chip pin and the accuracy of form and position, particularly have certain accuracy requirement by IC chip pin summit to the vertical distance (coplane degree) of pad.If this coplane degree is overproof, then some pin of device just can not close contact with PCB pad, the scolding tin melted during welding is just easily caused not reach the bottom of pin, scolding tin just can not be joined together to form good solder joint these pins and pad, the defects such as rosin joint, solder skip and virtual connection may be caused, finally can affect the reliability of product.So general IC chip production producer has strict tolerance to chip at pin coplanarity.
Because the pin of IC chip is very little, the method for traditional manual detection pin coplanarity can cause people's kopiopia, and testing result is easily subject to the impact of testing staff's subjective factor.Therefore, the accuracy of detection of manual detection is low, detection speed is slow.Industrial products based on machine vision detect and can overcome above-mentioned difficulties, are therefore widely used in the surface quality automatic monitoring of IC chip.
Existing ray cast method is that IC chip pin is placed in the smooth plane of level upward, and observe the vertical range between the highest pin and minimum pin in the horizontal direction by human eye, its difference is coplane degree.Ray cast method structure is simple, is easy to operation.But gauger's eyesight can affect the process of measurement, subjective factor is large, cannot ensure the precision measured.
Chinese patent CN100354601C adopts the measuring method similar with three-coordinates measuring machine etc. to carry out the measurement of IC pin coplanarity.The method needs a uniform frivolous flat board of two-sided smooth thickness, for acquisition device three pins the highest, thus sets up reference planes.Record the distance of each pin to reference planes by three-coordinates measuring machine, thus obtain coplane degree.But this contact measurement method can only be applicable to artificial sampling observation, detection speed is slow, and accuracy of detection is low, and may cause secondary damage to device.
Chinese patent CN101424511B adopts optical image acquisition and image recognition technology.But the system uses multiple valuable optical mirror slip, mechanical mechanism is complicated, and equipment cost is relatively high.Each imaging can only complete the image acquisition of single pin, and imaging must meet the following conditions: need the switching carrying out light signal; IC chip needs stop motion; Linear electric motors need round trip.Above condition all consumes the valuable time, causes image taking speed slow, is difficult to the requirement meeting high speed on-line checkingi.
Chinese patent CN102052907A proposes a kind of BGA coplane degree three-dimension measuring system based on moire projecting principle.This system uses two cameras to carry out imaging simultaneously, is similar to the method for binocular machine vision.This pin coplanarity measuring method based on Moire fringe is that use two cameras carry out imaging, respectively to obtain plane information and depth information.This system needs to be equipped with an assistant software control LCD in addition, thus produces Fictitious data base; Need artificial setting reference planes; High-precision motion platform is needed to realize machinery location.Measure when the method can realize large area, high-precision real.But the method adopts the structure of two camera imagings, make measurement mechanism volume large, system architecture is complicated, and detection algorithm operand is large, and equipment cost is higher.
US Patent No. 7012628B2 adopts the coplane degree of Vision Builder for Automated Inspection to the IC chip pin on production line to carry out quality testing.This system needs to carry out repeatedly imaging respectively to left side pin and right side pin, and all needs to carry out imaging from different angles, and the multiple image collected is analyzed, and finally realizes the accurate measurement of coplane degree.But require that in imaging process IC chip keeps static, repeatedly imaging, causes detection speed slow.
Jap.P. JP, 2003-207326, A are the coplane degree measurements realizing IC pin based on machine vision principle.The method uses two cameras to carry out image acquisition to the side view that IC chip two arranges pin respectively.The method requires that all pins are placed on same supporting plane, artificially sets a datum line before measuring.By the method for vision, measure the distance of end to datum line of all pins, and compare with calibration value, thus realize the Quick Measurement of coplane degree.But the method adopts double camera structure, complex structure.
For IC chip pin coplane degree high speed line Measurement Technique always monopolize by a few countries such as Japanese, German, thus cause such equipment price expensive, be difficult to be able to widespread use on a production line.In order to meet the demand of domestic and international producer to economical coplane degree measuring equipment, the present invention is devoted to design the Polaroid high-precision online real-time vision IC pin coplanarity measuring system of a kind of one camera.
Summary of the invention:
The object of the invention is the coplane degree on-line measurement realizing IC chip pin, overcomes existing coplane degree measurement mechanism complex structure, the shortcoming and defect part such as bulky, device fabrication cost is high, detection speed is slow and accuracy of detection is low.Be subject to the inspiration of ray cast method and grating image principle, propose a kind of coplane degree on-line intelligence vision measurement device be made up of some separate catoptrons, isosceles prism, grating and image acquisition units, to adapt to the demand of large-scale production.
For realizing object of the present invention, the present invention adopts following technical scheme:
The IC chip pin coplanarity measuring system of a kind of higher order reflection and grating image, mainly comprise IC chip to conduct oneself with dignity oblique slip feeding mechanism, external trigger synchronization control circuit, IC chip pin imaging optical path system, image pick-up card, camera, the intelligent visual detection system of Based PC, photoelectric sensor
Described IC chip pin imaging optical path system comprises symmetrical left side light path and right side light path, described left side light path comprises the left-half that left side blue light LED light source, left side transmission grating, left side first catoptron, left side second catoptron, left side the 3rd catoptron and two base angles are the isosceles prism of 45 degree, the light of described left side blue light LED light source from left to right parallel be emitted through left side transmission grating after, after the reflection of left side first catoptron, be radiated at the lower surface of IC chip pin Ray obliquity; Left side the second catoptron is arranged with miter angle, after diffuse light from IC chip pin is reflected, again vertically upward directive with 45 degree arrange left side the 3rd catoptron, left side the 3rd catoptron reflection ray from left to right level injection after, be radiated at the left side of isosceles prism, then vertically upward reflex to video camera;
Described right side light path comprises: right side blue light LED light source, right side transmission grating, right side first catoptron, right side second catoptron, right side the 3rd catoptron, two base angles are the right half part of the isosceles prism of 45 degree, the light of described right side blue light LED light source is parallel is from right to left emitted through right side transmission grating, after the reflection of right side first catoptron, be radiated at the lower surface of IC chip pin Ray obliquity; Right side the second catoptron is arranged with miter angle, after diffuse light from IC chip pin is reflected, again vertically upward directive with 45 degree arrange right side the 3rd catoptron, right side the 3rd catoptron reflection ray from right to left level injection after, be radiated at the right side of isosceles prism, then vertically upward reflex to video camera;
Described video camera comprises CCD camera and optical lens, be vertically mounted on directly over isosceles prism symmetrical center line, this video camera central axis upright in IC chip conduct oneself with dignity oblique slip feeding mechanism rail plate and overlap with the central plane of IC chip pin imaging optical path system;
Described IC chip oblique slip feeding mechanism of conducting oneself with dignity is positioned at the rail plate central axis of the oblique slip feeding mechanism and this IC chip is conducted oneself with dignity immediately below isosceles prism in the central plane of IC chip pin imaging optical path system;
Described photoelectric sensor is vertically mounted on IC chip and conducts oneself with dignity in the rail plate of oblique slip feeding mechanism, be positioned at the left margin place of camera field of view, when IC chip slip over guide rail pass through IC chip pin imaging optical path system time, the outside triggering synchronous control circuit of photoelectric sensor sends position signalling, this signal after treatment, to image pick-up card and left side blue light LED light source, right side blue light LED light source sends imaging signal, light source is glittering, simultaneous camera is taken pictures instantaneously, take a picture and be sent to the intelligent visual detection system with Based PC through figure capture card, the intelligent visual detection system of described Based PC is used for the photo of acquisition to carry out analyzing and processing to obtain the pin coplanarity of IC chip.
Further, described left side first catoptron, left side second catoptron, left side the 3rd catoptron and two base angles are that isosceles prism, right side first catoptron, right side second catoptron, right side the 3rd catoptron of 45 degree is stainless steel, and its reflecting surface or imaging surface all process through ultra-precision grinding machine.
Further, be provided with between described left side light path and right side light path prevent light signal from interfering with each other every tabula rasa.
Further, described optical lens 111 is telecentric lens.
The IC chip pin coplanarity measuring system of higher order reflection and grating image carries out a method for coplane degree measurement, comprises step:
Step 1, when IC chip slides to photoelectric sensor along rail plate, external trigger synchronization control circuit 302 toggling camera and image pick-up card capture slide and under IC chip pin 256 grades of gray level images, as the original process data of IC chip pin;
Step 2, realize the coarse positioning that IC chip two arranges pin;
Step 3, intercepting area-of-interest, set up the subimage of two row's pins;
Step 4, respectively medium filtering is carried out to two subimages, stress release treatment signal;
Step 5, respectively object edge detection is carried out to two subimages, obtain the edge feature signal of grating fringe and pin;
Step 6, employing average gray, as the segmentation threshold segmentation image of image, realize the binary conversion treatment of image;
Step 7, each pin accurately to be located, set up the subimage of each pin;
Step 8, analyze the subimage of each pin, follow the tracks of the change of grating fringe, calculate the pixel distance of the maximum distortion of grating fringe on each pin;
Step 9, imaging precision according to Design of Vision System, calculate the physical distance of the maximum distortion of grating fringe;
Step 10, the funtcional relationship corresponding with the degreeof tortuosity of grating fringe according to coplane degree error, calculate the coplane degree error e of each pin
i, and add up calculated pin number, respective function mapping relations are expressed as:
F (Δ H)=max{f
1(Δ H), f
2(Δ H) ..., f
n(Δ H) }-min{f
1(Δ H), f
2(Δ H) ..., f
n(Δ H) }, wherein: f
ifor the height tolerance of IC chip i-th pin, if f when offseting under pin
ifor just, f when pin offsets
ibe negative, K is the regulation coefficient of calculated value and actual value,
for the desired distance of the upper end lower surface of IC chip pin and the lower end lower surface of IC chip pin, Δ H is height tolerance, X
ifor the grating fringe degree of crook on IC chip i-th pin, d
ifor the maximum deflection distance of the grating fringe on IC chip i-th pin, α is the throw light of IC chip pin lower surface and the angle of vertical direction, γ is the incident angle of horizontal throw light on left side first catoptron or right side first catoptron, f (Δ H) is coplane degree, and its numerical value is the difference of the maxima and minima of the height tolerance of IC chip pin;
Whether all pin subimages of step 11, judgement IC chip are all analyzed complete, if so, then obtain the maximal value e of the coplane degree error of each pin
max=max{e
1, e
2... e
nand minimum value e
min=min{e
1, e
2... e
n, if not, then return step 8, until all subimages are analyzed complete;
Step 12, judge measured by the maximal value e of coplane degree error
maxwith minimum value e
minwhether within the scope of the coplane degree tolerance bound preset, be if so, then judged as that coplane degree is qualified, otherwise, for coplane degree is defective.
After the present invention is converted into CCD camera imaging the coplane degree measurement of IC pin, the otherness of strain line length is measured, and carries out distortion and amplification by the ultrafine strain line differential image of grating pair pin.By setting up coplane degree error and the corresponding f funtcional relationship of grating fringe degree of crook, realizing IC chip two and arranging the measurement of pin coplanarity in same visual field.The method is analyzed the degree of crook of grating fringe, and finally calculate corresponding coplane degree error according to coplane degree error to the respective function mapping relations of grating fringe degree of crook, and respective function mapping relations are expressed as:
F (Δ H)=max{f
1(Δ H), f
2(Δ H) ..., f
n(Δ H) }-min{f
1(Δ H), f
2(Δ H) ..., f
n(Δ H) }, wherein: f
ifor the height tolerance of IC i-th pin, if f when offseting under pin
ifor just, f when pin offsets
ibe negative, K is the regulation coefficient of calculated value and actual value,
for the desired distance of the upper end lower surface of IC pin and the lower end lower surface of IC pin, Δ H is height tolerance, X
ifor the grating fringe degree of crook on IC i-th pin, d
ifor the maximum deflection distance of the grating fringe on IC i-th pin, α is the throw light of IC chip pin lower surface and the angle of vertical direction, and γ is the incident angle of horizontal throw light on left side first catoptron or right side first catoptron.Think height tolerance f
iwith striped degree of crook X
idirect proportionality.Striped degree of crook is larger, then coplane degree error is larger.And striped degree of crook and maximum deflection distance, bending angle are relevant.Proportional coefficient K in the method determination funtcional relationship expression formula of demarcating by experiment (that is: according to designing requirement, is determined
the d of striped is obtained after imaging
i, actual measurement obtains throw light angle γ, and contact type measurement obtains f
i, substitute into above-mentioned Function Mapping relational expression calculating K, and the mean value of repetitive measurement calculating K).F (Δ H) called after coplane degree, its numerical value is the difference of the maxima and minima of the height tolerance of IC chip pin.
The present invention is using the lower plane of IC chip as plane of orientation.In order to make the IC chip of same model obtain the basically identical grating fringe of degree of crook, when imaging, IC chip can not rotate in X direction, can not rotate along Y-direction, can not move along Z-direction.
The present invention must meet following constraint: for the imaging each time of CCD camera, and the position of all eyeglasses and angle are all keep immobilizing, and light is projected on the pin of testee IC chip with fixing position and direction.
The IC chip pin imaging optical path system of grating, higher order reflection mirror and isosceles prism composition: the light that light source sends drops on the pin of IC chip, based on ray cast ratio juris, the lower surface reflected light of IC chip pin passes through the higher order reflection of multistage reflective mirror, and the lower surface image of two row pins is observed in the both sides of isosceles prism respectively.The CCD camera be placed on directly over isosceles prism carries out imaging to this.That is: by special imaging optical path, the measurement of IC chip pin coplane degree is converted into the information of length in image.On the basis of the above, between light source and catoptron, then add grating, obtain grating fringe image.If the coplanarity of the pin of IC chip is good, coplane degree error is little, the tendency of grating fringe curve is just basically identical, otherwise, if certain pin upwarps or lower curved, will be there is violent distortion and amplification in corresponding grating fringe, compared with the grating fringe in adjacent leads, seem particularly outstanding.
IC chip conduct oneself with dignity oblique slip feeding mechanism: IC slide mechanical moving device be using the self gravitation of IC as power source, whole mechanical hook-up is in tilted layout, and IC chip does rectilinear motion along inclined-plane from top to bottom along guide rail.Therefore, require that rail plate surfaceness is little, friction force when IC chip slides just can be little.Due to without extra power source, so whole compact mechanical structure, there is no power transmission and the vibration caused, be conducive to imaging.Particularly when the depth of field of camera lens is less, also can obtain image clearly.
The external trigger synchronization control circuit of photoelectric sensor and composition thereof: IC chip does rectilinear motion from top to bottom on the slide rail tilted.When IC moves to camera settings field range, after photoelectric sensor response, to external trigger synchronizing circuit outgoing position induced signal.After this external trigger synchronizing circuit processes signal, send trigger pip to camera and light source, finally, light source is of short duration glittering, and camera captures picture frame instantaneously simultaneously.This exposal model of stroboscopic at the volley, can improve the speed of detection.And solve the problem that LED light source in narrow space is difficult to dispel the heat.
The intelligent visual detection system of Based PC: grating fringe is able to imaging in CCD camera plane, the intelligent visual detection system of Based PC is analyzed grating fringe image, analyze the maximum deflection distance of grating fringe on each pin, and according to the funtcional relationship of coplane degree error and grating fringe degree of crook, finally try to achieve the coplane degree of IC chip pin.
System and method for of the present invention has detection method novelty, measures visualize, detection speed is fast, accuracy of detection is high, apparatus structure is compact, equipment manufacturing cost is cheap feature.Compared with prior art, there is following features and effect:
(1) this detection method is novel.This contrive equipment can be converted into intelligent measuring based on machine vision the measurement of IC pin coplanarity, and the coplanarity of pin measures the judgement being mapped as pin grating fringe degreeof tortuosity on image.
(2) detection speed is fast.Due to imaging while that CCD camera being carried out the light signal of IC chip both sides pin at every turn, only need the Polaroid detection that just can complete whole IC chip, thus detection speed is fast.
(3) accuracy of detection is high.Because grating fringe has amplification to IC chip pin coplanar error, the precision of measurement can be improved.
(4) apparatus structure is compact.The mechanical driving device of IC chip is using the deadweight of IC chip itself as power source, does not thus need extra propulsion system.Therefore, whole Design of Mechanical Structure is compact, and volume is little.
(5) equipment cost is low.Owing to adopting one camera imaging optical path system.Therefore, the low cost of manufacture of equipment.
Accompanying drawing explanation
Fig. 1 is imaging system higher order reflection of the present invention and grating image light path schematic diagram.
Fig. 2 is present system main body frame schematic diagram.
Fig. 3 is external trigger synchronization control circuit schematic diagram of the present invention.
Fig. 4 is image capturing system grating fringe imaging schematic diagram of the present invention.
Fig. 5 is coplanarity measuring method process flow diagram of the present invention.
Fig. 6 is single IC pin grating fringe projection imaging geometric relationship figure of the present invention.
Shown in figure be: 100-IC chip pin imaging optical path system, blue light LED light source on the left of 101-, transmission grating on the left of 102-, first catoptron on the left of 103-, 104-is every tabula rasa, first catoptron on the right side of 105-, transmission grating on the right side of 106-, blue light LED light source on the right side of 107-, second catoptron on the right side of 108-, 3rd catoptron on the right side of 109-, 110-CCD camera, 111-optical lens, 3rd catoptron on the left of 112-, second catoptron on the left of 113-, 114-IC chip, 115-Mitsubishi mirror, the intelligent vision measuring system of 201-Based PC, 202-image pick-up card, 301-photoelectric sensor, 302-external trigger synchronization control circuit, 303-IC chip is conducted oneself with dignity oblique slip feeding mechanism, the good and bad product classification device of 304-, 401-grating fringe, 601-curved stripes vertical projection plane, the horizontal projection plane of 602-grating fringe.
Embodiment:
In order to understand the present invention better, below in conjunction with accompanying drawing, the invention will be further described, but embodiments of the present invention are not limited thereto.
As shown in Figure 2, system body framework of the present invention comprises: the IC chip pin imaging optical path system 100 that multiple reflection mirror, grating and isosceles prism are formed, IC chip is conducted oneself with dignity oblique slip feeding mechanism 303, the image-generating unit that image pick-up card 202, CCD camera 110 and camera lens 111 are formed, the intelligent vision measuring system 201 of Based PC, and external trigger synchronization control circuit 302, good and bad product classification device 304.
As shown in Figure 1, special light path system for the present invention proposes: IC chip pin imaging optical path system 100, the left side light path of this IC chip pin imaging optical path system 100 comprises: described left side light path comprises left side blue light LED light source 101, left side transmission grating 102, left side the first catoptron 103, left side the second catoptron 113, left side the 3rd catoptron 112 and two base angles are the left-half of the isosceles prism 115 of 45 degree, the light of described left side blue light LED light source 101 from left to right parallel be emitted through left side transmission grating 102 after, by with YZ plane orthogonal and after left side first catoptron 103 becoming (90 ° of-γ) angle to install with XY plane reflects, Ray obliquity is radiated at the lower surface of IC chip pin, left side the second catoptron 113 is arranged with miter angle, after diffuse light from IC chip pin is reflected, again vertically upward directive with 45 degree arrange left side the 3rd catoptron 112, left side the 3rd catoptron 112 reflection ray from left to right level injection after, be radiated at the left side of isosceles prism 115, the image that light signal is formed finally is observed in the left side of isosceles prism 115.
Right side light path and left side light path separate, do not interfere with each other, form symmetric relation in position.Its light path component comprises: right side blue light LED light source 107, right side transmission grating 106, right side first catoptron 105, right side second catoptron 108, catoptron 109, two base angle, right side the 3rd are the right half part of the isosceles prism 115 of 45 degree, the light of described right side blue light LED light source 107 is parallel is from right to left emitted through right side transmission grating 106, after right side first catoptron 105 becoming (90 ° of-γ) angle to install with XY plane reflects, be radiated at the lower surface of IC chip pin with YZ plane orthogonal light Vertical Uniform; Right side the second catoptron 108 is arranged with 45 angles, after diffuse light from IC chip pin is reflected, again vertically upward directive with 45 degree arrange right side the 3rd catoptron 109, right side the 3rd catoptron 109 reflection ray from right to left level injection after, be radiated at the right side of isosceles prism 115, then vertically upward reflex to video camera.The transmittance process of its light signal is identical with left side light path, and finally, the image that right side light signal is formed is observed on the right side of isosceles prism 115.
Above-mentioned all optical modules are all take stainless steel as starting material, and all reflectings surface or imaging surface all need to add through ultra-precision grinding machine, thus present mirror effect, and are firmly arranged in narrow imaging space.
CCD camera 110 and optical lens 111 be arranged on isosceles prism 115 vertical directly over, Polaroidly can complete the image acquisition that IC chip two arranges pin.
Detected object IC chip 114 is positioned at IC chip and conducts oneself with dignity on the rail plate of oblique slip feeding mechanism 303, and below is every tabula rasa 104; IC chip 114 slides along rail plate is oblique from top to bottom with self gravitation, and its lower surface is as locating surface and be adjacent to rail plate upper surface.The three degree of freedom of rail plate restriction IC chip 114, that is: X-direction is rotated, Y-direction is rotated and Z-direction moves.As shown in Figure 3, when above IC chip 114 moves to photoelectric sensor 301, external trigger synchronization control circuit 302 gets the rising edge of position signalling.Position signalling, after respective handling, sends external trigger grab signal to image pick-up card 202, achieves Quick Acquisition IC chip pin image in motion.
The blackstreak of each transmission grating is incident upon the lower surface of IC chip pin.Pin lower surface is in the difference of short transverse, and after causing imaging, grating fringe produces distortion in various degree.As shown in Figure 4, the grating fringe of the part correspondence that height of pin remains unchanged 401 is straight-line segment, and grating fringe 401 corresponding to the arc transition part of pin is the segment of curve of rounding off.For the pin that coplane degree error is less, the maximum deflection of grating fringe is apart from almost equal; As shown in Figure 4, the 2nd pin of the 1st row is for upwarping pin, and its coplane degree error is large, and it is less that maximum deflection distance d compares correct situation, and grating fringe 401 bends in a clockwise direction and forms certain θ and bend positive angle; As shown in Figure 4, the 8th pin of the 1st row is lower curved pin, and its coplane degree error is also large, and it is comparatively large that maximum deflection distance d compares normal condition, and grating fringe 401 forms the bending negative angle of certain θ with counterclockwise bending.Demarcate before measuring, set up the f function corresponding relation of the degreeof tortuosity of coplane degree error and grating fringe 401.In the measurements can quantitative test, try to achieve the coplane degree error of pin.
As shown in Figure 5, for two rows, 16 pins, the higher order reflection proposed according to the present invention and the IC chip pin coplanarity measuring method of grating image, the coplane degree completing two row's pins according to the following steps detects, particularly upwarp, the detection of lower curved pin, comprise step:
Step S501, when IC chip slides to photoelectric sensor along rail plate, external trigger synchronization control circuit toggling camera and image pick-up card capture slide and under IC chip pin 256 grades of gray level images, as the original process data of IC chip pin;
Step S502, realize the coarse positioning that IC chip two arranges pin;
Step S503, intercepting area-of-interest, set up the subimage of two row's pins;
Step S504, respectively medium filtering is carried out to two subimages, stress release treatment signal;
Step S505, respectively object edge detection is carried out to two subimages, obtain the edge feature signal of grating fringe and pin;
Step S506, employing average gray, as the segmentation threshold segmentation image of image, realize the binary conversion treatment of image;
Step S507, each pin accurately to be located, set up the subimage of each pin;
Step S508, analyze the subimage of each pin, follow the tracks of the change of grating fringe, calculate the pixel distance of the maximum distortion of grating fringe on each pin;
Step S509, imaging precision according to Design of Vision System, calculate the physical distance of the maximum distortion of grating fringe;
Step S510, the funtcional relationship corresponding with the degreeof tortuosity of grating fringe according to coplane degree error, calculate the coplane degree error e of each pin
i, and add up calculated pin number, respective function mapping relations are expressed as:
F (Δ H)=max{f
1(Δ H), f
2(Δ H) ..., f
n(Δ H) }-min{f
1(Δ H), f
2(Δ H) ..., f
n(Δ H) } wherein: f
ifor the height tolerance of IC i-th pin, if f when offseting under pin
ifor just, f when pin offsets
ibe negative.K is the regulation coefficient of calculated value and actual value,
for the desired distance of the upper end lower surface of IC pin and the lower end lower surface of IC pin, Δ H is height tolerance, X
ifor the grating fringe degree of crook on IC i-th pin, d
ifor the maximum deflection distance of the grating fringe on IC i-th pin, α is the throw light of IC chip pin lower surface and the angle of vertical direction, and γ is the incident angle of horizontal throw light on left side first catoptron 103 or right side first catoptron 105.Think height tolerance f
iwith striped degree of crook X
idirect proportionality.Striped degree of crook is larger, then coplane degree error is larger.And striped degree of crook and maximum deflection distance, bending angle are relevant.Proportional coefficient K in the method determination funtcional relationship expression formula of demarcating by experiment (that is: according to designing requirement, is determined
the d of striped is obtained after imaging
i, actual measurement obtains throw light angle γ, and contact type measurement obtains f
isubstitute into above-mentioned Function Mapping relational expression calculating K, and the mean value of repetitive measurement calculating K), f (Δ H) called after coplane degree, its numerical value is the difference of the maxima and minima of the height tolerance of IC chip pin, and the concrete derivation of Function Mapping relation formula as shown in Figure 6.From single IC pin grating fringe projection imaging geometric relationship, the process that known linear fringe changes to curved stripes.Simultaneously, curved stripes vertical projection plane 601 can image reaction striped bend to because of, the slanted angle of the horizontal projection plane 602 of grating fringe is 90 ° of-γ, and its size can affect the degree of crook of striped, and wherein N-N ' is the normal of throw light on left side first catoptron 103;
Whether all pin subimages of step S511, judgement IC chip are all analyzed complete, if so, then obtain the maximal value e of the coplane degree error of each pin
max=max{e
1, e
2... e
nand minimum value e
min=min{e
1, e
2... e
n, if not, then return step 8, until all subimages are analyzed complete;
Step S512, judge measured by the maximal value e of coplane degree error
maxwith minimum value e
minwhether within the scope of the coplane degree tolerance bound preset, be if so, then judged as that coplane degree is qualified, otherwise, for coplane degree is defective.
The coplane degree specification product distinguished through above-mentioned steps and coplane degree defective separated through good and bad product classification device 304, to meet the needs of following process.
The above embodiment of the present invention is only for example of the present invention is clearly described, and is not the restriction to embodiments of the present invention.For those of ordinary skill in the field, can also make other changes in different forms on the basis of the above description.Here exhaustive without the need to also giving all embodiments.All any amendments done within the spirit and principles in the present invention, equivalent to replace and improvement etc., within the protection domain that all should be included in the claims in the present invention.
Claims (7)
1. the IC chip pin coplanarity measuring system of higher order reflection and grating image, mainly comprise IC chip to conduct oneself with dignity oblique slip feeding mechanism (303), external trigger synchronization control circuit (302), IC chip pin imaging optical path system (100), image pick-up card (202), camera, the intelligent visual detection system (201) of Based PC, photoelectric sensor (301), it is characterized in that:
Described IC chip pin imaging optical path system (100) comprises symmetrical left side light path and right side light path, described left side light path comprises left side blue light LED light source (101), left side transmission grating (102), left side the first catoptron (103), left side the second catoptron (113), left side the 3rd catoptron (112) and two base angles are the left-half of the isosceles prism (115) of 45 degree, the light in described left side blue light LED light source (101) from left to right parallel be emitted through left side transmission grating (102) after, after the reflection of left side first catoptron (103), be radiated at the lower surface of IC chip pin Ray obliquity, left side the second catoptron (113) is arranged with miter angle, after diffuse light from IC chip pin is reflected, again vertically upward directive with 45 degree arrange left side the 3rd catoptron (112), left side the 3rd catoptron (112) reflection ray from left to right level injection after, be radiated at the left side of isosceles prism (115), then vertically upward reflex to video camera,
Described right side light path comprises: right side blue light LED light source (107), right side transmission grating (106), right side first catoptron (105), right side second catoptron (108), right side the 3rd catoptron (109), two base angles are the right half part of the isosceles prism (115) of 45 degree, the light on described right side blue light LED light source (107) is parallel is from right to left emitted through right side transmission grating (106), after the reflection of right side first catoptron (105), be radiated at the lower surface of IC chip pin Ray obliquity; Right side the second catoptron (108) is arranged with miter angle, after diffuse light from IC chip pin is reflected, again vertically upward directive with 45 degree arrange right side the 3rd catoptron (109), right side the 3rd catoptron (109) reflection ray from right to left level injection after, be radiated at the right side of isosceles prism (115), then vertically upward reflex to video camera;
Described video camera comprises CCD camera (110) and optical lens (111), be vertically mounted on directly over isosceles prism (115) symmetrical center line, this video camera central axis upright in IC chip conduct oneself with dignity oblique slip feeding mechanism (303) rail plate and overlap with the central plane of IC chip pin imaging optical path system (100);
Described IC chip oblique slip feeding mechanism (303) of conducting oneself with dignity is positioned at the rail plate central axis of the oblique slip feeding mechanism (303) and this IC chip is conducted oneself with dignity immediately below isosceles prism (115) in the central plane of IC chip pin imaging optical path system (100);
Described photoelectric sensor (301) is vertically mounted on IC chip and conducts oneself with dignity in the rail plate of oblique slip feeding mechanism (303), be positioned at the left margin place of camera field of view, when IC chip (114) slip over guide rail pass through IC chip pin imaging optical path system (100) time, photoelectric sensor (301) outwards triggering synchronous control circuit (302) sends position signalling, this signal after treatment, to image pick-up card (202) and left side blue light LED light source (101), right side blue light LED light source (107) sends imaging signal, light source is glittering, simultaneous camera is taken pictures instantaneously, take a picture and be sent to the intelligent visual detection system (201) with Based PC through figure capture card (202), the intelligent visual detection system (201) of described Based PC is for carrying out analyzing and processing to obtain IC chip pin coplane degree by the photo of acquisition.
2. the IC chip pin coplanarity measuring system of higher order reflection according to claim 1 and grating image, it is characterized in that: described left side first catoptron (103), left side second catoptron (113), left side the 3rd catoptron (112) and two base angles are that isosceles prism (115), right side first catoptron (105), right side second catoptron (108), the right side the 3rd catoptron (109) of 45 degree is stainless steel, and its reflecting surface or imaging surface all process through ultra-precision grinding machine.
3. the IC chip pin coplanarity measuring system of higher order reflection according to claim 2 and grating image, is characterized in that: be provided with between described left side light path and right side light path prevent light signal from interfering with each other every tabula rasa (104).
4. the IC chip pin coplanarity measuring system of higher order reflection according to claim 3 and grating image, is characterized in that: described optical lens (111) is telecentric lens.
5. adopt the IC chip pin coplanarity measuring system of the higher order reflection described in any one of claim 1-4 kind and grating image to carry out a method for coplane degree measurement, comprise step:
Step 1, when IC chip slides to photoelectric sensor along rail plate, external trigger synchronization control circuit (302) toggling camera and image pick-up card capture slide and under IC chip pin 256 grades of gray level images, as the original process data of IC chip pin;
Step 2, realize the coarse positioning that IC chip two arranges pin;
Step 3, intercepting area-of-interest, set up the subimage of two row's pins;
Step 4, respectively medium filtering is carried out to two subimages, stress release treatment signal;
Step 5, respectively object edge detection is carried out to two subimages, obtain the edge feature signal of grating fringe and pin;
Step 6, employing average gray, as the segmentation threshold segmentation image of image, realize the binary conversion treatment of image;
Step 7, each pin accurately to be located, set up the subimage of each pin;
Step 8, analyze the subimage of each pin, follow the tracks of the change of grating fringe, calculate the pixel distance of the maximum distortion of grating fringe on each pin;
Step 9, imaging precision according to Design of Vision System, calculate the physical distance of the maximum distortion of grating fringe;
Step 10, the funtcional relationship corresponding with the degreeof tortuosity of grating fringe according to coplane degree error, calculate the coplane degree error e of each pin
i, and add up calculated pin number, respective function mapping relations are expressed as:
f(ΔH)＝max{f
1(ΔH),f
2(ΔH),......,f
N(ΔH)}-min{f
1(ΔH),f
2(ΔH),......,f
N(ΔH)}，
Wherein: f
ifor the height tolerance of IC chip i-th pin, if f when offseting under pin
ifor just, f when pin offsets
ibe negative, K is the regulation coefficient of calculated value and actual value,
for the desired distance of the upper end lower surface of IC chip pin and the lower end lower surface of IC chip pin, Δ H is height tolerance, X
ifor the grating fringe degree of crook on IC chip i-th pin, d
ifor the maximum deflection distance of the grating fringe on IC chip i-th pin, α is the throw light of IC chip pin lower surface and the angle of vertical direction, γ is the incident angle of horizontal throw light on left side first catoptron (103) or right side first catoptron (105), f (Δ H) is coplane degree, and its numerical value is the difference of the maxima and minima of the height tolerance of IC chip pin;
Whether all pin subimages of step 11, judgement IC chip are all analyzed complete, if so, then obtain the maximal value e of the coplane degree error of each pin
max=max{e
1, e
2... e
nand minimum value e
min=min{e
1, e
2... e
n, if not, then return step 8, until all subimages are analyzed complete;
Step 12, judge measured by the maximal value e of coplane degree error
maxwith minimum value e
minwhether within the scope of the coplane degree tolerance bound preset, be if so, then judged as that coplane degree is qualified, otherwise, for coplane degree is defective.
6. the IC chip pin coplanarity measuring method of higher order reflection according to claim 5 and grating image, it is characterized in that: described video camera is when capturing the pin gray level image of IC chip, the lower surface of rail plate is adjacent to as locating surface using IC chip, the rotation of described rail plate restriction IC chip X-direction, the rotation of Y-direction, the movement of Z-direction.
7. the IC chip pin coplanarity measuring method of higher order reflection according to claim 6 and grating image, it is characterized in that: described pin comprises and upwarps pin, normal pins and lower curved pin, after grating image, upwarp the grating fringe distortion along clockwise direction on pin, and in vertical direction with certain positive angle; Grating fringe distortion in the counterclockwise direction on lower curved pin, and in vertical direction with certain negative angle; Grating fringe on normal pins and the angle of vertical direction are zero, and, the grating fringe maximum deflection distance upwarped on pin is less than the grating fringe maximum deflection distance of normal pins, and the grating fringe maximum deflection distance on described lower curved pin is greater than the grating fringe maximum deflection distance of normal pins.
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