CN103297064B - Display decoding circuit based on Li Shi restriction competition counting coding - Google Patents

Display decoding circuit based on Li Shi restriction competition counting coding Download PDF

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CN103297064B
CN103297064B CN201310028311.4A CN201310028311A CN103297064B CN 103297064 B CN103297064 B CN 103297064B CN 201310028311 A CN201310028311 A CN 201310028311A CN 103297064 B CN103297064 B CN 103297064B
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input
door
outfan
inputs
liang
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CN103297064A (en
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赵霞
胡姮菲
刘勇
王刚
董乾
许立峰
陆清茹
李冰
刘芳兵
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Southeast University
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Southeast University
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Abstract

The invention discloses a kind of display decoding circuit based on Li Shi restriction competition counting coding, including control circuit and decoding circuit, described control circuit has coding input end, lamp test input, go out reset terminal and turn off the light and input/go out zero-output terminal, wherein, for test, lamp test input is driven whether digital display tube can normally work, go out reset terminal for eliminating undesirable 0, input of turning off the light is for extinguishing digital display tube, and the zero-output terminal that goes out shows whether should show 0 be off;Display decoding circuit based on Li Shi restriction competition counting coding designed by the present invention can improve the reliability of data, and can realize lamp test function, the zero power energy that goes out, function of turning off the light and zero instruction function of going out.

Description

Display decoding circuit based on Li Shi restriction competition counting coding
Technical field
The invention belongs to Digital Logical Circuits field, particularly relate to a kind of display decoding circuit based on Li Shi restriction competition counting coding.
Background technology
At present, known 16 scale codings are 8421 yards, this is the weight code on the basis of one group of natural binary, 8421 yards is the nibble in data, the basic data form of the modern information technologies such as byte (Byte), word (Word) can be formed easily, may be conveniently used the counting of logic circuit, calculate, store and exchange.But, 8421 yards is one group of 16 system cyclic code, when it encodes the conversion of adjacent interdigit, has the data of more than two to need the chance simultaneously changed.When being used in counting mode, sometimes, all there is saltus step in 4 bit binary data of 8421 yards, and multidigit changes the competition brought simultaneously and has an impact the reliability of data, adds the probability of corrupt data.
Gray code of the prior art, is mainly one restriction Competition coding, constrains each only permission one between each code word to change, but, it is not a kind of weight code due to Gray code, when being used for counting, very inconvenient, there is no regularity, i.e. lack characteristic sequence.If being used for counting, be intended to arrange corresponding depositor to four sequences, it is achieved that circuit more complicated.
Four Li Shi restriction competition counting codings are used for solving the problems referred to above, the restriction competition counting coding circuit of a kind of mode of reverse phase shift is provided, the data jump of more than two when it can limit conversion between two adjacent encoder groups, improve the reliability of data, and it has exclusive characteristic sequence, and to realize circuit simple.
But, four count codes of current this restriction competition the most do not apply to show that in decoding circuit, therefore, the present inventor is i.e. in view of this consideration, propose display decoding circuit shown in this case.
Summary of the invention
The main object of the present invention, is to provide a kind of display decoding circuit based on Li Shi restriction competition counting coding
The present invention solves above-mentioned technical problem, the technical scheme is that present invention devises a kind of display decoding circuit based on Li Shi restriction competition counting coding, including control circuit and decoding circuit, described decoding circuit includes a-g totally 7 cross-talk decoding circuit, described control circuit has coding input end, lamp test input, go out reset terminal and turn off the light and input/go out zero-output terminal, wherein:
Described coding input end is for 4 Li Shi restriction competition counting codings of input, described 4 Li Shi restriction competition counting coding is converted to 4 after control circuit processes and adds control Li Shi restriction competition counting coding, and transmit to decoding circuit, described decoding circuit output word shape code also controls the work of parameter discrimination method pipe;
The outfan of described lamp test input connects control circuit, when lamp test input input low level, it is 1111 that 4 of control control circuit output add control Li Shi restriction competition to count coding perseverance, and after decoded circuit, output word shape code is 8, and parameter discrimination method pipe is all lighted;
The outfan of the described reset terminal that goes out connects control circuit, when 4 Li Shi restriction competition countings of control circuit input are encoded to 0000, the reset terminal that goes out adds control Li Shi restriction competition counting by 4 of input low level control control circuit output and is encoded to 0010, after decoded circuit, output word shape code is empty, and parameter discrimination method pipe all extinguishes;
Described turning off the light inputs/goes out the outfan connection control circuit of zero-output terminal, when turn off the light input low level time, turn off the light and input/go out zero-output terminal and use as input, no matter input why 4 Li Shi restriction competition counting codings are worth, it is 0010 that 4 of control circuit output add control Li Shi restriction competition counting coding perseverance, after decoded circuit, output word shape code is empty, and parameter discrimination method pipe all extinguishes;
Be 0000 when control circuit inputs 4 Li Shi restriction competition counting coding perseverances, described in turn off the light and input/go out zero-output terminal and use as outfan, outfan output low level of turning off the light is effective.
A kind of structure that optimizes as the present invention: described control circuit includes 9 not gates, 4 two input nand gates, 4 two inputs and door, 1 four inputs and door and 1 three input nand gate;
The input of first to fourth not gate is successively as 4 coding input ends of control circuit, and outfan connects first liang of input nand gate, first liang of input and door, second liang of input nand gate and the first input end of the 3rd liang of input nand gate respectively, described first liang of input nand gate, first liang of input and door, second liang of input nand gate and the second input short circuit of the 3rd liang of input nand gate, and as the lamp test input of control circuit;
Described first liang of input nand gate, first liang of input are connected second liang respectively and input and door, the 4th liang of input nand gate, the 3rd liang of input and door, the 4th liang of input and the first input end of door with the outfan of door, second liang of input nand gate and the 3rd liang of input nand gate, and second liang of input and door, the 4th liang of input nand gate, the 3rd liang of input and door, the 4th liang of the second input short circuit inputted with door, and input/go out zero-output terminal as turning off the light of control circuit;
Described second liang of input and door, the 4th liang of input nand gate, the 3rd liang of input and door, the outfan of the 4th liang of input and door are sequentially output 4 and add control Li Shi restriction competition counting coding, and described outfan is sequentially output 4 inversion signals adding control Li Shi restriction competition counting coding via the 6th to the 9th not gate the most respectively;
Described four inputs are connected the outfan of first to fourth not gate respectively with the input of door, and four inputs are connected the first input end of three input nand gates with the outfan of door, second input of described three input nand gates connects lamp test input, 3rd input connects the outfan of the 5th not gate, and the input of the 5th not gate is as the reset terminal that goes out of control circuit, the outfan of described three input nand gates connects turning off the light of control circuit and inputs/go out zero-output terminal.
A kind of structure that optimizes as the present invention: described a cross-talk decoding circuit comprises 9 four inputs and inputs or door, wherein with door and 4 three:
One one to the 1st input is connected the one one three input or the first to the 3rd input of door respectively with the outfan of door, one four to the 1st input is connected the one two three input or the first to the 3rd input of door respectively with the outfan of door, one seven to the 1st input is connected the one three three input or the first to the 3rd input of door respectively with the outfan of door, and the outfan of the one one to the 1st input or door connects the one four three input or the first to the 3rd input of door respectively;
One one four input is connected the outfan of the 6th not gate with the first input end of door and the one eight four input inputs and the first input end of door with door and the 1st;
One one four input is connected the outfan of the 7th not gate with the second input of door and the one two four input inputs and the second input of door with door and the 1st with door, the first the May 4th input;
One one four input is connected the outfan of the 8th not gate with the 3rd input of door and the one two four input inputs and the 3rd input of door with door and the 1st;
One one four input is connected the outfan of the 9th not gate with the four-input terminal of door and the one four four input inputs and the four-input terminal of door with door and the 1st with door, the first the May 4th input;
One two four input is connected second liang of outfan inputted with door and the one three four input and inputs first input end with door with door, the one six four input with door and the 1st with door, the one four four input and door, the first the May 4th input with the first input end of door;
One two four input is connected the 4th liang of outfan inputted with door and the one three four input with the four-input terminal of door and door, the one six four input and door, the one seven four input input the four-input terminal with door with door and the 1st;
One three four input is connected the outfan of the 4th liang of input nand gate and the one four four input and door, the one seven four input and door, the one eight four input and door and the one nine four input and the second input of door with the second input of door;
One four four input is connected the 3rd liang of outfan inputted with door and the input of the first the May 4th and inputs threeth input with door with door, the one eight four input with door and the 1st with door, the one six four input and door, the one seven four input with the 3rd input of door.
A kind of structure that optimizes as the present invention: described b cross-talk decoding circuit comprises 9 four inputs and inputs or door, wherein with door and 4 three:
2nd 1 to the 2nd 34 input is connected the 2nd 13 input or the first to the 3rd input of door respectively with the outfan of door, 2nd 4 to the 2nd 64 input is connected the 2nd 23 input or the first to the 3rd input of door respectively with the outfan of door, 2nd 7 to the 2nd 94 input is connected the 2nd 33 input or the first to the 3rd input of door respectively with the outfan of door, and the outfan of the 2nd 1 to the 2nd 33 input or door connects the 2nd 43 input or the first to the 3rd input of door respectively;
2nd 14 input is connected the outfan of the 6th not gate with the first input end of door and the 2nd 84 input inputs and the first input end of door with door and the 2nd 94;
2nd 14 input is connected the outfan of the 7th not gate with the second input of door and the 2nd 24 input inputs and the second input of door with door and the 2nd 94 with door, the 2nd 64 input with door, the 2nd 34 input;
2nd 14 input is connected the outfan of the 8th not gate with the 3rd input of door and the 2nd 24 input inputs and the 3rd input of door with door and the second the May 4th with door, the 2nd 44 input with door, the 2nd 34 input;
2nd 14 input is connected the outfan and the 2nd 24 of the 9th not gate and inputs and door, the second the May 4th input and door, the 2nd 94 input and the four-input terminal of door with the four-input terminal of door;
2nd 24 input is connected second liang of outfan inputted with door and the 2nd 34 input and inputs first input end with door with door, the 2nd 64 input with door and the 2nd 74 with door, the 2nd 44 input and door, the second the May 4th input with the first input end of door;
2nd 34 input is connected the 4th liang of outfan inputted with door and the 2nd 44 input with the four-input terminal of door and door, the 2nd 64 input and door, the 2nd 74 input input the four-input terminal with door with door and the 2nd 84;
2nd 44 input is connected the outfan of the 4th liang of input nand gate and the input of the second the May 4th and door, the 2nd 74 input and door and the 2nd 84 input and the second input of door with the second input of door;
2nd 64 input is connected the 3rd liang of input and the outfan of door and the 2nd 74 input and inputs the 3rd input with door with door, the 2nd 84 input with door and the 2nd 94 with the 3rd input of door.
A kind of structure that optimizes as the present invention: described c cross-talk decoding circuit comprises 9 four inputs and inputs or door, wherein with door and 4 three:
3rd 1 to the 3rd 34 input is connected the 3rd 13 input or the first to the 3rd input of door respectively with the outfan of door, 3rd 4 to the 3rd 64 input is connected the 3rd 23 input or the first to the 3rd input of door respectively with the outfan of door, Radix Notoginseng is connected the 3rd 33 input or the first to the 3rd input of door to three nine-day periods after the winter solstice four input respectively with the outfan of door, and the outfan of the 3rd 1 to the 3rd 33 input or door connects the 3rd 43 input or the first to the 3rd input of door respectively;
3rd 14 input is connected the outfan of the 6th not gate with the first input end of door and three nine-day periods after the winter solstice four inputs and the first input end of door;
3rd 14 input is connected the outfan of the 7th not gate with the second input of door and the 3rd 24 input inputs and the second input of door with door and Radix Notoginseng four with door, the 3rd 64 input;
3rd 14 input is connected the outfan of the 8th not gate with the 3rd input of door and the 3rd 24 input inputs and the 3rd input of door with door and the 3rd 44 with door, the 3rd 34 input;
3rd 14 input is connected the outfan of the 9th not gate with the four-input terminal of door and the 3rd 24 input inputs and the four-input terminal of door with door and the 3rd 64 with door and the input of the 3rd the May 4th with door, the 3rd 44 input;
3rd 24 input is connected outfan and the 3rd 34 input of second liang of input and door and inputs and the first input end of door with door and the 3rd 84 with door, Radix Notoginseng four input with door, the 3rd 64 input with door, the 3rd the May 4th input with door, the 3rd 44 input with the first input end of door;
3rd 34 input is connected outfan and the 3rd 44 input and the door of the 4th liang of input nand gate with the second input of door, the 3rd the May 4th inputs and door, the 3rd 84 input input and the second input of door with door and three nine-day periods after the winter solstice four;
3rd 34 input is connected the 4th liang of input and the outfan of door and Radix Notoginseng four input and inputs the four-input terminal with door with door, the 3rd 84 input with door and three nine-day periods after the winter solstice four with the four-input terminal of door;
3rd the May 4th input is connected the 3rd liang of outfan inputted with door and the 3rd 64 input with the 3rd input of door and door, Radix Notoginseng four input and door, the 3rd 84 input input the 3rd input with door with door and three nine-day periods after the winter solstice four.
A kind of structure that optimizes as the present invention: described d cross-talk decoding circuit comprises 9 four inputs and inputs or door, wherein with door and 4 three:
4th 1 to the 4th 34 input is connected the 4th 13 input or the first to the 3rd input of door respectively with the outfan of door, 4th 4 to the 4th 64 input is connected the 4th 23 input or the first to the 3rd input of door respectively with the outfan of door, 4th 7 to the 4th 94 input is connected the 4th 33 input or the first to the 3rd input of door respectively with the outfan of door, and the outfan of the 4th 1 to the 4th 33 input or door connects the 4th 43 input or the first to the 3rd input of door respectively;
4th 14 input is connected the outfan of the 6th not gate with the first input end of door and the 4th 74 input inputs and the first input end of door with door and the 4th 94 with door, the 4th 84 input;
4th 14 input is connected outfan and the 4th 24 input and the door of the 7th not gate with the second input of door, the 4th the May 4th inputs and door, the 4th 84 input input and the second input of door with door and the 4th 94;
4th 14 input is connected the outfan and the 4th 24 of the 8th not gate and inputs and door, the 4th 34 input and door, the 4th 94 input and the 3rd input of door with the 3rd input of door;
4th 14 input is connected the outfan of the 9th not gate with the four-input terminal of door and the 4th 44 input inputs and the four-input terminal of door with door and the 4th 84 with door, the 4th the May 4th input;
4th 24 input is connected second liang of input and the outfan of door and the 4th 34 input with the first input end of door and door, the 4th 44 input input with door, the 4th the May 4th and input the first input end with door with door and the 4th 64;
4th 24 input is connected the 4th liang of outfan inputted with door and the 4th 34 input with the four-input terminal of door and door, the 4th 64 input and door, the 4th 74 input input the four-input terminal with door with door and the 4th 94;
4th 34 input is connected the outfan of the 4th liang of input nand gate and the 4th 44 input and door, the 4th 64 input and door and the 4th 74 input and the second input of door with the second input of door;
4th 44 input is connected the outfan of the 3rd liang of input and door with the 3rd input of door and the 4th the May 4th inputs and door, the 4th 64 input input the 3rd input with door with door, the 4th 74 input and door and the 4th 84.
A kind of structure that optimizes as the present invention: described e cross-talk decoding circuit comprises 9 four inputs and inputs or door, wherein with door and 4 three:
May Day inputs to be connected respectively with the outfan of door to the 5th 34 and inputs May Day three or the first to the 3rd input of door, the May 4th is connected the 5th 23 to the 5th 64 input respectively with the outfan of door and inputs or the first to the 3rd input of door, 5th 7 to the 5th 94 input is connected the 5th 33 input or the first to the 3rd input of door respectively with the outfan of door, and the outfan of input on May Day to the 5th 33 or door connects five-four-three input or the first to the 3rd input of door respectively;
Input on May Day four is connected the outfan of the 6th not gate with the first input end of door and the input of the 5th the May 4th inputs and the first input end of door with door and the 5th 94 with door, the 5th 84 input with door, the 5th 74 input with door, the 5th 64 input;
Input on May Day four is connected the outfan of the 7th not gate with the second input of door and the 5th 24 input inputs and the second input of door with door and the 5th 84 with door, the 5th 74 input with door, the 5th 64 input with door, the 5th 34 input;
Input on May Day four is connected the outfan of the 8th not gate with the 3rd input of door and the 5th 24 input inputs and the 3rd input of door with door and the 5th 94 with door, the 5th 84 input;
Input on May Day four is connected the outfan of the 9th not gate with the four-input terminal of door and the 5th 34 input inputs and the four-input terminal of door with door and the 5th 64 with door, the 5th the May 4th input;
5th 24 input is connected second liang of outfan inputted with door and the 5th 34 input and door, the May 4th four input and the first input end of door with the first input end of door;
5th 24 input is connected the outfan of the 4th liang of input and door with the four-input terminal of door and the May 4th four inputs and door, the 5th 74 input input the four-input terminal with door with door, the 5th 84 input and door and the 5th 94;
5th 34 input is connected the outfan of the 3rd liang of input and door with the 3rd input of door and the May 4th four inputs and door, the 5th the May 4th input input the 3rd input with door with door, the 5th 64 input and door and the 5th 74;
The May 4th four input is connected the outfan of the 4th liang of input nand gate with the second input of door and the 5th the May 4th inputs and door and the 5th 94 inputs the second input with door.
A kind of structure that optimizes as the present invention: described f cross-talk decoding circuit comprises 9 four inputs and inputs or door, wherein with door and 4 three:
6th 1 to the 6th 34 input is connected the 6th 13 input or the first to the 3rd input of door respectively with the outfan of door, 6th 4 to the 6th 64 input is connected the 6th 23 input or the first to the 3rd input of door respectively with the outfan of door, 6th 7 to the 6th 94 input is connected the 6th 33 input or the first to the 3rd input of door respectively with the outfan of door, and the outfan of the 6th 1 to the 6th 33 input or door connects the 6th 43 input or the first to the 3rd input of door respectively;
6th 14 input is connected the outfan of the 6th not gate with the first input end of door and the 6th 64 input inputs and the first input end of door with door and the 6th 94 with door, the 6th 84 input with door, the 6th 74 input;
6th 14 input is connected the outfan of the 7th not gate with the second input of door and the 6th 44 input inputs and the second input of door with door and the 6th 84;
6th 14 input is connected the outfan of the 8th not gate with the 3rd input of door and the 6th 24 input inputs and the 3rd input of door with door and the 6th 94 with door, the 6th 84 input;
6th 14 input is connected the outfan of the 9th not gate with the four-input terminal of door and the 6th 24 input inputs and the four-input terminal of door with door and the 6th 74 with door, the 6th 44 input with door, the 6th 34 input;
6th 24 input is connected second liang of input and the outfan of door and the 6th 34 input and inputs the first input end with door with door, the 6th 44 input with door and the 6th the May 4th with the first input end of door;
6th 24 input is connected outfan and the 6th 34 input and the door of the 4th liang of input nand gate with the second input of door, the 6th the May 4th inputs and door, the 6th 74 input input and the second input of door with door and the 6th 94;
6th 34 input is connected the 3rd liang of outfan inputted with door and the 6th 44 input with the 3rd input of door and door, the 6th the May 4th input and door, the 6th 64 input input the 3rd input with door with door and the 6th 74;
6th the May 4th input is connected the 4th liang of input and the outfan of door and the 6th 64 input and inputs the four-input terminal with door with door, the 6th 84 input with door and the 6th 94 with the four-input terminal of door.
A kind of structure that optimizes as the present invention: described g cross-talk decoding circuit comprises 9 four inputs and inputs or door, wherein with door and 4 three:
The July 1st inputs to be connected respectively with the outfan of door to the 7th 34 and inputs the July 1st three or the first to the 3rd input of door, 7th 4 to the 7th 64 input is connected the 7th 23 input or the first to the 3rd input of door respectively with the outfan of door, 7th 7 to the 7th 94 input is connected the 7th 33 input or the first to the 3rd input of door respectively with the outfan of door, and the outfan of the input July 1st to the 7th 33 or door connects the 7th 43 input or the first to the 3rd input of door respectively;
The input July 1st four is connected second liang of outfan inputted with door and the 7th 24 input and inputs first input end with door with door, the Seventh Five-Year Plan four input with door and the 7th 64 with door, the 7th 34 input and door, the 7th 44 input with the first input end of door;
The input July 1st four is connected the outfan of the 7th not gate with the second input of door and the Seventh Five-Year Plan four inputs and door and the 7th 84 inputs the second input with door;
The input July 1st four is connected the outfan of the 8th not gate with the 3rd input of door and the 7th 24 input inputs and the 3rd input of door with door and the 7th 94 with door, the 7th 34 input;
The input July 1st four is connected the 4th liang of outfan inputted with door and the 7th 24 input and inputs four-input terminal with door with door, the 7th 84 input with door and the 7th 94 with door, the 7th 64 input and door, the 7th 74 input with the four-input terminal of door;
7th 24 input is connected the outfan of the 4th liang of input nand gate and the 7th 34 input and door, the 7th 44 input and door, the 7th 64 input and door, the 7th 74 input and door and the 7th 94 input and the second input of door with the second input of door;
7th 34 input is connected outfan and the 7th 44 input and the door of the 9th not gate with the four-input terminal of door and the Seventh Five-Year Plan four inputs and the four-input terminal of door;
7th 44 input is connected the outfan of the 3rd liang of input and door with the 3rd input of door and the Seventh Five-Year Plan four inputs and door, the 7th 64 input input the 3rd input with door with door, the 7th 74 input and door and the 7th 84;
7th 74 input is connected the outfan of the 6th not gate with the first input end of door and the 7th 84 input inputs and the first input end of door with door and the 7th 94.
The present invention compared with prior art has the advantage that
The present invention is that the Li Shi restriction competition counting coding of the reliability improving data provides display decoding circuit, can observe, with direct convenience, the ten's digit that this code word is corresponding in application in the future, and lamp test function, the zero power energy that goes out, function of turning off the light and zero instruction function of going out can be realized.
Accompanying drawing explanation
Fig. 1 is the general frame of the display decoding circuit based on Li Shi restriction competition counting coding designed by the present invention;
Fig. 2 is the schematic diagram of control circuit part of the present invention;
Fig. 3 is the decoding circuit part a section decoding scheme of the present invention;
Fig. 4 is the decoding circuit part b section decoding scheme of the present invention;
Fig. 5 is the decoding circuit part c section decoding scheme of the present invention;
Fig. 6 is the decoding circuit part d section decoding scheme of the present invention;
Fig. 7 is the decoding circuit part e section decoding scheme of the present invention;
Fig. 8 is the decoding circuit part f section decoding scheme of the present invention;
Fig. 9 is the decoding circuit part g section decoding scheme of the present invention.
Detailed description of the invention
The code word that the input of the present invention is used is 4 Li Shi restriction competition counting codings.It is the corresponding relation between 4 Li Shi restriction competition counting codings and conventional 8421 yards and 16 system numbers as shown in table 1;
Table 1
16 system numbers 8421 yards Restriction competition counting coding
B3B2B1B0 B3B2B1B0
0 0000 0000
1 0001 0001
2 0010 1001
3 0011 1011
4 0100 0011
5 0101 0111
6 0110 0101
7 0111 1101
8 1000 1111
9 1001 1110
A 1010 0110
B 1011 0100
C 1100 1100
D 1101 1000
E 1110 1010
F 1111 0010
As shown in Figure 1, the present invention devises a kind of display decoding circuit based on Li Shi restriction competition counting coding, it is characterized in that: include control circuit and decoding circuit, described decoding circuit includes a-g totally 7 cross-talk decoding circuit, described control circuit has coding input end, lamp test input, go out reset terminal and turn off the light and input/go out zero-output terminal, wherein:
As shown in table 2, true value corresponding relation is had between 4 Li Shi restriction competition counting codings of the input of the present invention and output digital display tube a-g7 section graphemic code, wherein, inputting 4 Li Shi restriction competition counting codings and be corresponding in turn to numeral 0-16, four represent with A3, A2, A1, A0 respectively from high to low;The font (numeral method is that high level is effective here) of output digital display tube graphemic code correspondence digital display tube, front 10 fonts are numeral 0-9, rear 6 fonts are the pseudo-code of regulation, and output digital display tube a-g7 section graphemic code represents with Ya, Yb, Yc, Yd, Ye, Yf and Yg respectively.
Table 2
As in figure 2 it is shown, described control circuit comprises the first to the 9th not gate I1-I9, first to fourth liang of input nand gate AN1-AN4, first to fourth liang of input and door A1-A4, the one or four input and door F1, the one or three input nand gate T1, wherein:
First to fourth input port A0-A3 of Li Shi restriction Competition coding connects the input of first to fourth not gate I1-I4 respectively;The outfan of first to fourth not gate I1-I4 connects the first NAND gate AN1, first and door A1, the second NAND gate AN2, the first input end of the 3rd NAND gate AN3 respectively, connects first to fourth input of the one or four input and door F1 the most respectively;First NAND gate AN1, first be connected respectively with door A1, the second NAND gate AN2, the outfan of the 3rd NAND gate AN3 second with door A2, the 4th NAND gate AN4, the 3rd with the first input end of door A3, the 4th and door A4;Second with door A2, the 4th NAND gate AN4, the 3rd input being connected the six to nine not gate I6-I9 with the outfan of door A3, the 4th and door A4, second with door A2, the 4th NAND gate AN4, the 3rd export respectively with door A3, the 4th and door A4 and to add first to fourth port A4-A7 that control Li Shi encodes;Six to nine not gate I6-I9 exports first to fourth port anti-phase adding control Li Shi coding respectivelyIf not considering first to fourth and door A1-A4 and the impact (the second input is high level) of the second input of first to fourth NAND gate AN1-AN4, then 4 Li Shi restriction competition counting coding A0-A3 of input add control Li Shi restriction competition counting coding A4-A7 through the anti-phase output 4 obtaining control circuit of two-stage, and its level is identical with the level of 4 Li Shi restriction competition counting coding A0-A3 of input.
Lamp test inputConnect the first NAND gate AN1, first and door A1, the second NAND gate AN2, the second input of the 3rd NAND gate AN3, connect second input of the one or three input nand gate T1 the most respectively;The outfan of the one or three input nand gate T1 connects second input of second and door A2, the 4th NAND gate AN4, the 3rd and door A3, the 4th and door A4.Lamp test input can check whether charactron can normally work.When lamp test inputSignal input time, first liang of input nand gate AN1, first liang of input are respectively 1,0,1,1 with door A1, second liang of input nand gate AN2, the 3rd liang of input nand gate AN3 output, one or three input nand gate T1 is output as 1, then second liang of input is respectively 1,1,1,1 with door A2, the 4th liang of input nand gate AN4, the 3rd liang of input with door A3, the 4th liang of output inputted with door A4, corresponding output 4 adds control Li Shi restriction competition counting coding A4A5A6A7=1111, for decoding circuit below, identical with during input A3=A2=A1=A0=1.As shown in Table 2, during input A3=A2=A1=A0=1, all high level of Ya-Yg are exported.Therefore, should light for seven sections of digital display tube simultaneously, can check that can each section of this digital display tube normal luminous, it is achieved lamp test function.
Go out reset terminalConnect the 3rd input of the one or three input nand gate T1;One or four input is connected the first input end of the one or three input nand gate T1 with the outfan of door F1;The outfan of the one or three input nand gate T1 connect second with door A2, the 4th NAND gate AN4, the 3rd with second input of door A3, the 4th and door A4 and turn off the light and input/go out zero-output terminalGo out reset terminalZero extinguishing of display can be would not want to.Be not intended to that the zero of display refers to that least significant non-zero position is later after 0 or the arithmetic point that the highest nonzero digit when multidigit show was former 0.When inputting Li Shi restriction competition counting coding A3-A0 and being 0000, the one or four input is output as 1 with door F1;If now going out reset terminalFor low level, one or three input nand gate T1 output low level, then second liang of input is respectively 0,1,0,0 with door A2, the 4th liang of input nand gate AN4, the 3rd liang of input with door A3, the 4th liang of output inputted with door A4, corresponding output adds control Li Shi and encodes A4A5A6A7=0100, for decoding circuit below, identical with during input A3A2A1A0=0010.As can be seen from Table 2, when input is for A3A2A1A0=0010, output Ya-Yg is low level simultaneously.Therefore, seven sections of digital display tube go out entirely so that 0 extinguishing that digital display tube should show, it is achieved go out zero power energy.
Turn off the light and input/go out zero-output terminalIt it is a bifunctional input/output terminal.
It is input of turning off the light when using as input, adds control signal of turning off the lightNo matter what the state of A3A2A1A0 is, is extinguished by drive charactron each section simultaneously.WhenTime, second liang of input is respectively 0,1,0,0 with door A2, the 4th liang of input nand gate AN4, the 3rd liang of input with door A3, the 4th liang of output inputted with door A4, corresponding output adds control Li Shi and encodes A4A5A6A7=0100, be equivalent to input A3A2A1A0=0010, Ya-Yg output low level simultaneously, 7 sections of whole extinguishings of digital display tube, it is achieved function of turning off the light.
It is the zero-output terminal that goes out when using as outfan, as seen from Figure 2:
BI ‾ / RBO ‾ = ( A ‾ 3 · A ‾ 2 · A ‾ 1 · A ‾ 0 · LT ‾ · RBI ‾ )
Above formula shows, only when input is for A3=A2=A1=A0=0, and has zero input signal of going outTime,Just meeting output low level,Represent zero extinguishing that decoder will should show.
Truth table can draw the logical relation expression formula between output Ya-Yg and input A3-A0 as shown in Table 2, the most as follows:
Y a = A ‾ 3 A ‾ 2 A ‾ 1 A ‾ 0 + A 3 A ‾ 2 A ‾ 1 A 0 + A 3 A ‾ 2 A 1 A 0 + A ‾ 3 A 2 A 1 A 0 + A ‾ 3 A 2 A ‾ 1 A 0 +
A 3 A 2 A ‾ 1 A 0 + A 3 A 2 A 1 A 0 + A 3 A 2 A 1 A ‾ 0 + A ‾ 3 A 2 A 1 A ‾ 0
Y b = A ‾ 3 A ‾ 2 A ‾ 1 A ‾ 0 + A ‾ 3 A ‾ 2 A ‾ 1 A 0 + A 3 A ‾ 2 A ‾ 1 A 0 + A 3 A ‾ 2 A 1 A 0 + A ‾ 3 A ‾ 2 A 1 A 0 +
A 3 A 2 A ‾ 1 A 0 + A 3 A 2 A 1 A 0 + A 3 A 2 A 1 A ‾ 0 + A ‾ 3 A 2 A ‾ 1 A ‾
Y c = A ‾ 3 A ‾ 2 A ‾ 1 A ‾ 0 + A ‾ 3 A ‾ 2 A ‾ 1 A 0 + A 3 A ‾ 2 A 1 A 0 + A ‾ 3 A ‾ 2 A 1 A 0 + A ‾ 3 A 2 A 1 A 0 +
A ‾ 3 A 2 A ‾ 1 A 0 + A 3 A 2 A ‾ 1 A 0 + A 3 A 2 A 1 A 0 + A 3 A 2 A 1 A ‾
Y d = A ‾ 3 A ‾ 2 A ‾ 1 A ‾ 0 + A 3 A ‾ 2 A ‾ 1 A 0 + A 3 A ‾ 2 A 1 A 0 + A ‾ 3 A 2 A 1 A 0 + A ‾ 3 A 2 A ‾ 1 A 0 +
A 3 A 2 A 1 A 0 + A 3 A 2 A 1 A ‾ 0 + A ‾ 3 A 2 A ‾ 1 A ‾ 0 + A 3 A ‾ 2 A ‾ 1 A ‾ 0
Y e = A ‾ 3 A ‾ 2 A ‾ 1 A ‾ 0 + A 3 A ‾ 2 A ‾ 1 A 0 + A ‾ 3 A 2 A ‾ 1 A 0 + A 3 A 2 A 1 A 0 + A ‾ 3 A 2 A 1 A ‾ +
A ‾ 3 A 2 A ‾ 1 A ‾ 0 + A 3 A 2 A ‾ 1 A ‾ 0 + A 3 A ‾ 2 A ‾ 1 A ‾ 0 + A 3 A ‾ 2 A 1 A ‾
Y f = A ‾ 3 A ‾ 2 A ‾ 1 A ‾ 0 + A ‾ 3 A ‾ 2 A 1 A 0 + A ‾ 3 A 2 A 1 A 0 + A ‾ 3 A 2 A ‾ 1 A 0 + A 3 A 2 A 1 A 0 +
A 3 A 2 A 1 A ‾ 0 + A ‾ 3 A 2 A 1 A ‾ 0 + A 3 A ‾ 2 A ‾ 1 A ‾ 0 + A 3 A ‾ 2 A 1 A ‾ 0
Y g = A 3 A ‾ 2 A ‾ 1 A 0 + A 3 A ‾ 2 A 1 A 0 + A ‾ 3 A ‾ 2 A 1 A 0 + A ‾ 3 A 2 A 1 A 0 + A ‾ 3 A 2 A ‾ 1 A 0 +
A 3 A 2 A 1 A 0 + A 3 A 2 A 1 A ‾ 0 + A 3 A ‾ 2 A ‾ 1 A ‾ 0 + A ‾ 3 A ‾ 2 A 1 A ‾ 0
Can draw the decoding scheme of the Ya-Yg of output correspondence input according to above-mentioned input/output relation expression formula, as shown in Fig. 3 to Fig. 9, each section in described a-g cross-talk decoding circuit respectively comprises 9 four inputs and door and 4 three inputs or door, wherein:
In a section decoding circuit:
One or four input is connected with the first input end of door G1 and to add that to control the first input end that Li Shi encodes anti-phaseAnd the eight or four input and door G8, the 9th 4 input and the first input end of door G9;
One or four input is connected with second input of door G1 and to add that to control the second input that Li Shi encodes anti-phaseAnd the two or four input and door G2, the May 4th input and door G5, the six or four input and second input of door G6;
One or four input is connected with the 3rd input of door G1 and to add that to control the 3rd input that Li Shi encodes anti-phaseAnd the two or four input and door G2, the three or four input and the 3rd input of door G3;
One or four input is connected with the four-input terminal of door G1 and to add that to control the four-input terminal that Li Shi encodes anti-phaseAnd the four or four input and door G4, the May 4th input and door G5, the 9th 4 input and the four-input terminal of door G9;
Two or four input is connected with the first input end of door G2 and adds the first input end A4 that control Li Shi encodes, and the three or four input inputs and door G5, the six or four input and door G6, the seven or four input and the first input end of door G7 with door G4, the May 4th with door G3, the four or four input;
Two or four input is connected the four-input terminal A7 adding control Li Shi coding with the four-input terminal of door G2, the three or four input and door G3, the six or four input and door G6, the seven or four input and door G7, the eight or four inputs and the four-input terminal of door G8;
Three or four input is connected the second input A5 adding control Li Shi coding with second input of door G3, and the four or four input and door G4, the seven or four input and door G7, the eight or four input and door G8, the 9th 4 inputs and second input of door G9;
Four or four input is connected the 3rd input A6 adding control Li Shi coding with the 3rd input of door G4, and the May 4th input and door G5, the six or four input and door G6, the seven or four input and door G7, the eight or four input and door G8, the 9th 4 inputs and the 3rd input of door G9.
In b section decoding circuit:
One or four input is connected with the first input end of door G1 and to add that to control the first input end that Li Shi encodes anti-phaseAnd the eight or four input and door G8, the 9th 4 input and the first input end of door G9;
One or four input is connected with second input of door G1 and to add that to control the second input that Li Shi encodes anti-phaseAnd the two or four input and door G2, the three or four input and door G3, the six or four input and door G6, the 9th 4 input and second input of door G9;
One or four input is connected with the 3rd input of door G1 and to add that to control the 3rd input that Li Shi encodes anti-phaseAnd the two or four input and door G2, the three or four input and door G3, the four or four input and door G4, the May 4th input and the 3rd input of door G5;
One or four input is connected with the four-input terminal of door G1 and to add that to control the four-input terminal that Li Shi encodes anti-phaseAnd the two or four input and door G2, the May 4th input and door G5, the 9th 4 input and the four-input terminal of door G9;
Two or four input is connected with the first input end of door G2 and adds the first input end A4 that control Li Shi encodes, and the three or four input inputs and door G5, the six or four input and door G6, the seven or four input and the first input end of door G7 with door G4, the May 4th with door G3, the four or four input;
Three or four input is connected the four-input terminal A7 adding control Li Shi coding with the four-input terminal of door G3, and the four or four input and door G4, the six or four input and door G6, the seven or four input and door G7, the eight or four inputs and the four-input terminal of door G8;
Four or four input is connected the second input A5 adding control Li Shi coding with second input of door G4, and the May 4th inputs and door G5, the seven or four input and door G7, the eight or four input and second input of door G8;
Six or four input is connected the 3rd input A6 adding control Li Shi coding with the 3rd input of door G6, and the seven or four inputs and door G7, the eight or four input and door G8, the 9th 4 input and the 3rd input of door G9.
In c section decoding circuit:
One or four input is connected with the first input end of door G1 and to add that to control the first input end that Li Shi encodes anti-phaseAnd the 9th 4 input and the first input end of door G9;
One or four input is connected with second input of door G1 and to add that to control the second input that Li Shi encodes anti-phaseAnd the two or four input and door G2, the six or four input and door G6, the seven or four input and second input of door G7;
One or four input is connected with the 3rd input of door G1 and to add that to control the 3rd input that Li Shi encodes anti-phaseAnd the two or four input and door G2, the three or four input and door G3, the four or four input and the 3rd input of door G4;
One or four input is connected with the four-input terminal of door G1 and to add that to control the four-input terminal that Li Shi encodes anti-phaseAnd the two or four input and door G2, the four or four input and door G4, the May 4th input and door G5, the six or four input and the four-input terminal of door G6;
Two or four input is connected the first input end A4 adding control Li Shi coding with the first input end of door G2, and the three or four input and door G3, the four or four input and door G4, the May 4th input and door G5, the six or four input and door G6, the seven or four input and door G7, the eight or four inputs and the first input end of door G8;
Three or four input is connected the second input A5 adding control Li Shi coding with second input of door G3, and the four or four input and door G4, the May 4th input and door G5, the eight or four input and door G8, the 9th 4 inputs and second input of door G9;
Three or four input is connected the four-input terminal A7 adding control Li Shi coding with the four-input terminal of door G3, and the seven or four inputs and door G7, the eight or four input and door G8, the 9th 4 input and the four-input terminal of door G9;
The May 4th input is connected the 3rd input A6 adding control Li Shi coding with the 3rd input of door G5, and the six or four input and door G6, the seven or four input and door G7, the eight or four input and door G8, the 9th 4 inputs and the 3rd input of door G9.
In d section decoding circuit:
One or four input is connected with the first input end of door G1 and to add that to control the first input end that Li Shi encodes anti-phaseAnd the seven or four input and door G7, the eight or four input and door G8, the 9th 4 input and the first input end of door G9;
One or four input is connected with second input of door G1 and to add that to control the second input that Li Shi encodes anti-phaseAnd the two or four input and door G2, the May 4th input and door G5, the eight or four input and door G8, the 9th 4 input and second input of door G9;
One or four input is connected with the 3rd input of door G1 and to add that to control the 3rd input that Li Shi encodes anti-phaseAnd the two or four input and door G2, the three or four input and door G3, the 9th 4 input and the 3rd input of door G9;
One or four input is connected with the four-input terminal of door G1 and to add that to control the four-input terminal that Li Shi encodes anti-phaseAnd the four or four input and door G4, the May 4th input and door G5, the eight or four input and the four-input terminal of door G8;
Two or four input is connected the first input end A4 adding control Li Shi coding with the first input end of door G2, and the three or four input and door G3, the four or four input and door G4, the May 4th input and door G5, the six or four inputs and the first input end of door G6;
Two or four input is connected the four-input terminal A7 adding control Li Shi coding with the four-input terminal of door G2, and the three or four input and door G3, the six or four input and door G6, the seven or four input and door G7, the 9th 4 inputs and the four-input terminal of door G9;
Three or four input is connected the second input A5 adding control Li Shi coding with second input of door G3, and the four or four inputs and door G4, the six or four input and door G6, the seven or four input and second input of door G7;
Four or four input is connected the 3rd input A6 adding control Li Shi coding with the 3rd input of door G4, and the May 4th input and door G5, the six or four input and door G6, the seven or four input and door G7, the eight or four inputs and the 3rd input of door G8.
In e section decoding circuit:
One or four input is connected with the first input end of door G1 and to add that to control the first input end that Li Shi encodes anti-phaseAnd the May 4th input and door G5, the six or four input and door G6, the seven or four input and door G7, the eight or four input and door G8, the 9th 4 input and the first input end of door G9;
One or four input is connected with second input of door G1 and to add that to control the second input that Li Shi encodes anti-phaseAnd the two or four input and door G2, the three or four input and door G3, the six or four input and door G6, the seven or four input and door G7, the eight or four input and second input of door G8;
One or four input is connected with the 3rd input of door G1 and to add that to control the 3rd input that Li Shi encodes anti-phaseAnd the two or four input and door G2, the eight or four input and door G8, the 9th 4 input and the 3rd input of door G9;
One or four input is connected with the four-input terminal of door G1 and to add that to control the four-input terminal that Li Shi encodes anti-phaseAnd the three or four input and door G3, the May 4th input and door G5, the six or four input and the four-input terminal of door G6;
Two or four input is connected with the first input end of door G2 and adds the first input end A4 controlling Li Shi coding, and the three or four inputs and door G3, the four or four input and the first input end of door G4;
Two or four input is connected the four-input terminal A7 adding control Li Shi coding with the four-input terminal of door G2, and the four or four input and door G4, the seven or four input and door G7, the eight or four input and door G8, the 9th 4 inputs and the four-input terminal of door G9;
Three or four input is connected the 3rd input A6 adding control Li Shi coding with the 3rd input of door G3, and the four or four input and door G4, the May 4th input and door G5, the six or four input and door G6, the seven or four inputs and the 3rd input of door G7;
Four or four input is connected with second input of door G4 and adds the second input A5 controlling Li Shi coding, and the May 4th inputs and door G5, the 9th 4 input and second input of door G9.
In f section decoding circuit:
One or four input is connected with the first input end of door G1 and to add that to control the first input end that Li Shi encodes anti-phaseAnd the six or four input and door G6, the seven or four input and door G7, the eight or four input and door G8, the 9th 4 input and the first input end of door G9;
One or four input is connected with second input of door G1 and to add that to control the second input that Li Shi encodes anti-phaseAnd the four or four input and door G4, the eight or four input and second input of door G8;
One or four input is connected with the 3rd input of door G1 and to add that to control the 3rd input that Li Shi encodes anti-phaseAnd the two or four input and door G2, the eight or four input and door G8, the 9th 4 input and the 3rd input of door G9;
One or four input is connected with the four-input terminal of door G1 and to add that to control the four-input terminal that Li Shi encodes anti-phaseAnd the two or four input and door G2, the three or four input and door G3, the four or four input and door G4, the seven or four input and the four-input terminal of door G7;
Two or four input is connected the first input end A4 adding control Li Shi coding with the first input end of door G2, and the three or four inputs and door G3, the four or four input and door G4, the May 4th input and the first input end of door G5;
Two or four input is connected the second input A5 adding control Li Shi coding with second input of door G2, and the three or four input and door G3, the May 4th input and door G5, the seven or four input and door G7, the 9th 4 inputs and second input of door G9;
Three or four input is connected the 3rd input A6 adding control Li Shi coding with the 3rd input of door G3, and the four or four input and door G4, the May 4th input and door G5, the six or four input and door G6, the seven or four inputs and the 3rd input of door G7;
The May 4th input is connected the four-input terminal A7 adding control Li Shi coding with the four-input terminal of door G5, and the six or four inputs and door G6, the eight or four input and door G8, the 9th 4 input and the four-input terminal of door G9.
In g section decoding circuit:
One or four input is connected the first input end A4 adding control Li Shi coding with the first input end of door G1, and the two or four input and door G2, the three or four input and door G3, the four or four input and door G4, the May 4th input and door G5, the six or four inputs and the first input end of door G6;
One or four input is connected with second input of door G1 and to add that to control the second input that Li Shi encodes anti-phaseAnd the May 4th inputs and door G5, the eight or four input and second input of door G8;
One or four input is connected with the 3rd input of door G1 and to add that to control the 3rd input that Li Shi encodes anti-phaseAnd the two or four input and door G2, the three or four input and door G3, the 9th 4 input and the 3rd input of door G9;
One or four input is connected the four-input terminal A7 adding control Li Shi coding with the four-input terminal of door G1, and the two or four input and door G2, the six or four input and door G6, the seven or four input and door G7, the eight or four input and door G8, the 9th 4 inputs and the four-input terminal of door G9;
Two or four input is connected the second input A5 adding control Li Shi coding with second input of door G2, and the three or four input and door G3, the four or four input and door G4, the six or four input and door G6, the seven or four input and door G7, the 9th 4 inputs and second input of door G9;
Three or four input is connected with the four-input terminal of door G3 and to add that to control the four-input terminal that Li Shi encodes anti-phaseAnd the four or four input and door G4, the May 4th input and the four-input terminal of door G5;
Four or four input is connected the 3rd input A6 adding control Li Shi coding with the 3rd input of door G4, and the May 4th input and door G5, the six or four input and door G6, the seven or four input and door G7, the eight or four inputs and the 3rd input of door G8;
Seven or four input is connected with the first input end of door G7 and to add that to control the first input end that Li Shi encodes anti-phaseAnd the eight or four input and door G8, the 9th 4 input and the first input end of door G9.
Above example is only the technological thought that the present invention is described, it is impossible to limiting protection scope of the present invention with this, every technological thought proposed according to the present invention, any change done on the basis of technical scheme, within each falling within scope.

Claims (9)

1. a display decoding circuit based on Li Shi restriction competition counting coding, it is characterized in that: include control circuit and decoding circuit, described decoding circuit includes a-g totally 7 cross-talk decoding circuit, described control circuit has coding input end, lamp test input, go out reset terminal and turn off the light and input/go out zero-output terminal, wherein:
Described coding input end is for 4 Li Shi restriction competition counting codings of input, described 4 Li Shi restriction competition counting coding is converted to 4 after control circuit processes and adds control Li Shi restriction competition counting coding, and transmit to decoding circuit, described decoding circuit output word shape code also controls the work of parameter discrimination method pipe;
When lamp test input input low level, it is 1111 that 4 of control control circuit output add control Li Shi restriction competition to count coding perseverance, and after decoded circuit, output word shape code is 8, and parameter discrimination method pipe is all lighted;
When 4 Li Shi restriction competition countings of control circuit input are encoded to 0000, the reset terminal that goes out adds control Li Shi restriction competition counting by 4 of input low level control control circuit output and is encoded to 0010, after decoded circuit, output word shape code is empty, and parameter discrimination method pipe all extinguishes;
When turn off the light input low level time, turn off the light and input/go out zero-output terminal and use as input, no matter input why 4 Li Shi restriction competition counting codings are worth, it is 0010 that 4 of control circuit output add control Li Shi restriction competition counting coding perseverance, after decoded circuit, output word shape code is empty, and parameter discrimination method pipe all extinguishes;
Be 0000 when control circuit inputs 4 Li Shi restriction competition counting coding perseverances, described in turn off the light and input/go out zero-output terminal and use as outfan, zero-output terminal output low level of going out is effective.
Display decoding circuit based on Li Shi restriction competition counting coding the most according to claim 1, it is characterised in that: described control circuit includes 9 not gates, 4 two input nand gates, 4 two inputs and door, 1 four inputs and door and 1 three input nand gate;
The code bit of 4 Li Shi restriction competition counting codings is raised successively by first to the 4th;
The input of first to fourth not gate is successively as 4 Li Shi restriction competition counting coding input ends of control circuit, and outfan connects first liang of input nand gate, first liang of input and door, second liang of input nand gate and the first input end of the 3rd liang of input nand gate respectively, described first liang of input nand gate, first liang of input and door, second liang of input nand gate and the second input short circuit of the 3rd liang of input nand gate, and as the lamp test input of control circuit;
Described first liang of input nand gate, first liang of input are connected second liang respectively and input and door, the 4th liang of input nand gate, the 3rd liang of input and door, the 4th liang of input and the first input end of door with the outfan of door, second liang of input nand gate and the 3rd liang of input nand gate, and second liang of input and door, the 4th liang of input nand gate, the 3rd liang of input and door, the 4th liang of the second input short circuit inputted with door, and input/go out zero-output terminal as turning off the light of control circuit;
Described second liang of input and door, the 4th liang of input nand gate, the 3rd liang of input and door, the outfan of the 4th liang of input and door are sequentially output 4 and add control Li Shi restriction competition counting coding, and described outfan is sequentially output 4 inversion signals adding control Li Shi restriction competition counting coding via the 6th to the 9th not gate the most respectively;
Described four inputs are connected the outfan of first to fourth not gate respectively with the input of door, and four inputs are connected the first input end of three input nand gates with the outfan of door, second input of described three input nand gates connects lamp test input, 3rd input connects the outfan of the 5th not gate, and the input of the 5th not gate is as the reset terminal that goes out of control circuit, the outfan of described three input nand gates connects turning off the light of control circuit and inputs/go out zero-output terminal.
The display decoding circuit competing counting coding based on Li Shi restriction the most according to claim 2, it is characterised in that: described a cross-talk decoding circuit comprises 9 four inputs and inputs or door, wherein with door and 4 three:
First to the 3rd 4 input is connected the one or three input or the first to the 3rd input of door respectively with the outfan of door, 4th to the 6th 4 input is connected the two or three input or the first to the 3rd input of door respectively with the outfan of door, 7th to the 9th 4 input is connected the three or three input or the first to the 3rd input of door respectively with the outfan of door, and the outfan of the first to the 3rd 3 input or door connects the four or three input or the first to the 3rd input of door respectively;
One or four input is connected the outfan of the 6th not gate with the first input end of door and the eight or four input inputs and the first input end of door with door and the 9th 4;
One or four input is connected the outfan of the 7th not gate with the second input of door and the two or four input inputs and the second input of door with door and the six or four with door, the May 4th input;
One or four input is connected the outfan of the 8th not gate with the 3rd input of door and the two or four input inputs and the 3rd input of door with door and the three or four;
One or four input is connected the outfan of the 9th not gate with the four-input terminal of door and the four or four input inputs and the four-input terminal of door with door and the 9th 4 with door, the May 4th input;
Two or four input is connected second liang of outfan inputted with door and the three or four input and inputs first input end with door with door, the six or four input with door and the seven or four with door, the four or four input and door, the May 4th input with the first input end of door;
Two or four input is connected the 4th liang of outfan inputted with door and the three or four input with the four-input terminal of door and door, the six or four input and door, the seven or four input input the four-input terminal with door with door and the eight or four;
Three or four input is connected the outfan of the 4th liang of input nand gate and the four or four input and door, the seven or four input and door, the eight or four input and door and the 9th 4 input and the second input of door with the second input of door;
Four or four input is connected the 3rd liang of outfan inputted with door and the May 4th input and inputs threeth input with door with door, the eight or four input with door and the 9th 4 with door, the six or four input and door, the seven or four input with the 3rd input of door.
The display decoding circuit competing counting coding based on Li Shi restriction the most according to claim 2, it is characterised in that: described b cross-talk decoding circuit comprises 9 four inputs and inputs or door, wherein with door and 4 three:
First to the 3rd 4 input is connected the one or three input or the first to the 3rd input of door respectively with the outfan of door, 4th to the 6th 4 input is connected the two or three input or the first to the 3rd input of door respectively with the outfan of door, 7th to the 9th 4 input is connected the three or three input or the first to the 3rd input of door respectively with the outfan of door, and the outfan of the first to the 3rd 3 input or door connects the four or three input or the first to the 3rd input of door respectively;
One or four input is connected the outfan of the 6th not gate with the first input end of door and the eight or four input inputs and the first input end of door with door and the 9th 4;
One or four input is connected the outfan of the 7th not gate with the second input of door and the two or four input inputs and the second input of door with door and the 9th 4 with door, the six or four input with door, the three or four input;
One or four input is connected the outfan of the 8th not gate with the 3rd input of door and the two or four input inputs and the 3rd input of door with door and the May 4th with door, the four or four input with door, the three or four input;
One or four input is connected the outfan and the two or four of the 9th not gate and inputs and door, the May 4th input and door, the 9th 4 input and the four-input terminal of door with the four-input terminal of door;
Two or four input is connected second liang of outfan inputted with door and the three or four input and inputs first input end with door with door, the six or four input with door and the seven or four with door, the four or four input and door, the May 4th input with the first input end of door;
Three or four input is connected the 4th liang of outfan inputted with door and the four or four input with the four-input terminal of door and door, the six or four input and door, the seven or four input input the four-input terminal with door with door and the eight or four;
Four or four input is connected the outfan of the 4th liang of input nand gate and the May 4th input and door, the seven or four input and door and the eight or four input and the second input of door with the second input of door;
Six or four input is connected the 3rd liang of input and the outfan of door and the seven or four input and inputs the 3rd input with door with door, the eight or four input with door and the 9th 4 with the 3rd input of door.
The display decoding circuit competing counting coding based on Li Shi restriction the most according to claim 2, it is characterised in that: described c cross-talk decoding circuit comprises 9 four inputs and inputs or door, wherein with door and 4 three:
First to the 3rd 4 input is connected the one or three input or the first to the 3rd input of door respectively with the outfan of door, 4th to the 6th 4 input is connected the two or three input or the first to the 3rd input of door respectively with the outfan of door, 7th to the 9th 4 input is connected the three or three input or the first to the 3rd input of door respectively with the outfan of door, and the outfan of the first to the 3rd 3 input or door connects the four or three input or the first to the 3rd input of door respectively;
One or four input is connected the outfan and the 9th 4 of the 6th not gate and inputs the first input end with door with the first input end of door;
One or four input is connected the outfan of the 7th not gate with the second input of door and the two or four input inputs and the second input of door with door and the seven or four with door, the six or four input;
One or four input is connected the outfan of the 8th not gate with the 3rd input of door and the two or four input inputs and the 3rd input of door with door and the four or four with door, the three or four input;
One or four input is connected the outfan of the 9th not gate with the four-input terminal of door and the two or four input inputs and the four-input terminal of door with door and the six or four with door and the May 4th input with door, the four or four input;
Two or four input is connected outfan and the three or four input of second liang of input and door and inputs and the first input end of door with door and the eight or four with door, the seven or four input with door, the six or four input with door, the May 4th input with door, the four or four input with the first input end of door;
Three or four input is connected outfan and the four or four input and the door of the 4th liang of input nand gate with the second input of door, the May 4th inputs and door, the eight or four input input and the second input of door with door and the 9th 4;
Three or four input is connected the 4th liang of input and the outfan of door and the seven or four input and inputs the four-input terminal with door with door, the eight or four input with door and the 9th 4 with the four-input terminal of door;
The May 4th input is connected the 3rd liang of outfan inputted with door and the six or four input with the 3rd input of door and door, the seven or four input and door, the eight or four input input the 3rd input with door with door and the 9th 4.
The display decoding circuit competing counting coding based on Li Shi restriction the most according to claim 2, it is characterised in that: described d cross-talk decoding circuit comprises 9 four inputs and inputs or door, wherein with door and 4 three:
First to the 3rd 4 input is connected the one or three input or the first to the 3rd input of door respectively with the outfan of door, 4th to the 6th 4 input is connected the two or three input or the first to the 3rd input of door respectively with the outfan of door, 7th to the 9th 4 input is connected the three or three input or the first to the 3rd input of door respectively with the outfan of door, and the outfan of the first to the 3rd 3 input or door connects the four or three input or the first to the 3rd input of door respectively;
One or four input is connected the outfan of the 6th not gate with the first input end of door and the seven or four input inputs and the first input end of door with door and the 9th 4 with door, the eight or four input;
One or four input is connected outfan and the two or four input and the door of the 7th not gate with the second input of door, the May 4th inputs and door, the eight or four input input and the second input of door with door and the 9th 4;
One or four input is connected the outfan and the two or four of the 8th not gate and inputs and door, the three or four input and door, the 9th 4 input and the 3rd input of door with the 3rd input of door;
One or four input is connected the outfan of the 9th not gate with the four-input terminal of door and the four or four input inputs and the four-input terminal of door with door and the eight or four with door, the May 4th input;
Two or four input is connected second liang of input and the outfan of door and the three or four input with the first input end of door and door, the four or four input input with door, the May 4th and input the first input end with door with door and the six or four;
Two or four input is connected the 4th liang of outfan inputted with door and the three or four input with the four-input terminal of door and door, the six or four input and door, the seven or four input input the four-input terminal with door with door and the 9th 4;
Three or four input is connected the outfan of the 4th liang of input nand gate and the four or four input and door, the six or four input and door and the seven or four input and the second input of door with the second input of door;
Four or four input is connected the outfan of the 3rd liang of input and door with the 3rd input of door and the May 4th inputs and door, the six or four input input the 3rd input with door with door, the seven or four input and door and the eight or four.
The display decoding circuit competing counting coding based on Li Shi restriction the most according to claim 2, it is characterised in that: described e cross-talk decoding circuit comprises 9 four inputs and inputs or door, wherein with door and 4 three:
First to the 3rd 4 input is connected the one or three input or the first to the 3rd input of door respectively with the outfan of door, 4th to the 6th 4 input is connected the two or three input or the first to the 3rd input of door respectively with the outfan of door, 7th to the 9th 4 input is connected the three or three input or the first to the 3rd input of door respectively with the outfan of door, and the outfan of the first to the 3rd 3 input or door connects the four or three input or the first to the 3rd input of door respectively;
One or four input is connected the outfan of the 6th not gate with the first input end of door and the May 4th input inputs and the first input end of door with door and the 9th 4 with door, the eight or four input with door, the seven or four input with door, the six or four input;
One or four input is connected the outfan of the 7th not gate with the second input of door and the two or four input inputs and the second input of door with door and the eight or four with door, the seven or four input with door, the six or four input with door, the three or four input;
One or four input is connected the outfan of the 8th not gate with the 3rd input of door and the two or four input inputs and the 3rd input of door with door and the 9th 4 with door, the eight or four input;
One or four input is connected the outfan of the 9th not gate with the four-input terminal of door and the three or four input inputs and the four-input terminal of door with door and the six or four with door, the May 4th input;
Two or four input is connected second liang of outfan inputted with door and the three or four input and door, the four or four input and the first input end of door with the first input end of door;
Two or four input is connected the 4th liang of outfan inputted with door and the four or four input with the four-input terminal of door and door, the seven or four input and door, the eight or four input input the four-input terminal with door with door and the 9th 4;
Three or four input is connected the 3rd liang of outfan inputted with door and the four or four input with the 3rd input of door and door, the May 4th input and door, the six or four input input the 3rd input with door with door and the seven or four;
Four or four input is connected the outfan of the 4th liang of input nand gate with the second input of door and the May 4th inputs and door and the 9th 4 inputs the second input with door.
The display decoding circuit competing counting coding based on Li Shi restriction the most according to claim 2, it is characterised in that: described f cross-talk decoding circuit comprises 9 four inputs and inputs or door, wherein with door and 4 three:
First to the 3rd 4 input is connected the one or three input or the first to the 3rd input of door respectively with the outfan of door, 4th to the 6th 4 input is connected the two or three input or the first to the 3rd input of door respectively with the outfan of door, 7th to the 9th 4 input is connected the three or three input or the first to the 3rd input of door respectively with the outfan of door, and the outfan of the first to the 3rd 3 input or door connects the four or three input or the first to the 3rd input of door respectively;
One or four input is connected the outfan of the 6th not gate with the first input end of door and the six or four input inputs and the first input end of door with door and the 9th 4 with door, the eight or four input with door, the seven or four input;
One or four input is connected the outfan of the 7th not gate with the second input of door and the four or four input inputs and the second input of door with door and the eight or four;
One or four input is connected the outfan of the 8th not gate with the 3rd input of door and the two or four input inputs and the 3rd input of door with door and the 9th 4 with door, the eight or four input;
One or four input is connected the outfan of the 9th not gate with the four-input terminal of door and the two or four input inputs and the four-input terminal of door with door and the seven or four with door, the four or four input with door, the three or four input;
Two or four input is connected second liang of input and the outfan of door and the three or four input and inputs the first input end with door with door, the four or four input with door and the May 4th with the first input end of door;
Two or four input is connected outfan and the three or four input and the door of the 4th liang of input nand gate with the second input of door, the May 4th inputs and door, the seven or four input input and the second input of door with door and the 9th 4;
Three or four input is connected the 3rd liang of outfan inputted with door and the four or four input with the 3rd input of door and door, the May 4th input and door, the six or four input input the 3rd input with door with door and the seven or four;
The May 4th input is connected the 4th liang of input and the outfan of door and the six or four input and inputs the four-input terminal with door with door, the eight or four input with door and the 9th 4 with the four-input terminal of door.
The display decoding circuit competing counting coding based on Li Shi restriction the most according to claim 2, it is characterised in that: described g cross-talk decoding circuit comprises 9 four inputs and inputs or door, wherein with door and 4 three:
First to the 3rd 4 input is connected the one or three input or the first to the 3rd input of door respectively with the outfan of door, 4th to the 6th 4 input is connected the two or three input or the first to the 3rd input of door respectively with the outfan of door, 7th to the 9th 4 input is connected the three or three input or the first to the 3rd input of door respectively with the outfan of door, and the outfan of the first to the 3rd 3 input or door connects the four or three input or the first to the 3rd input of door respectively;
One or four input is connected second liang of outfan inputted with door and the two or four input and inputs first input end with door with door, the May 4th input with door and the six or four with door, the three or four input and door, the four or four input with the first input end of door;
One or four input is connected the outfan of the 7th not gate with the second input of door and the May 4th inputs and door and the eight or four inputs the second input with door;
One or four input is connected the outfan of the 8th not gate with the 3rd input of door and the two or four input inputs and the 3rd input of door with door and the 9th 4 with door, the three or four input;
One or four input is connected the 4th liang of outfan inputted with door and the two or four input and inputs four-input terminal with door with door, the eight or four input with door and the 9th 4 with door, the six or four input and door, the seven or four input with the four-input terminal of door;
Two or four input is connected the outfan of the 4th liang of input nand gate and the three or four input and door, the four or four input and door, the six or four input and door, the seven or four input and door and the 9th 4 input and the second input of door with the second input of door;
Three or four input is connected outfan and the four or four input and the door of the 9th not gate with the four-input terminal of door and the May 4th inputs and the four-input terminal of door;
Four or four input is connected the outfan of the 3rd liang of input and door with the 3rd input of door and the May 4th inputs and door, the six or four input input the 3rd input with door with door, the seven or four input and door and the eight or four;
Seven or four input is connected the outfan of the 6th not gate with the first input end of door and the eight or four input inputs and the first input end of door with door and the 9th 4.
CN201310028311.4A 2013-01-24 2013-01-24 Display decoding circuit based on Li Shi restriction competition counting coding Active CN103297064B (en)

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Citations (3)

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Publication number Priority date Publication date Assignee Title
CN1972131A (en) * 2006-07-28 2007-05-30 东南大学 Restraint competition count code circuit with mode of reverse phase shift
CN102594358A (en) * 2012-03-28 2012-07-18 东南大学 Code system conversion circuit for converting binary-coded decimal (BCD) codes to Lee restrict competition count codes
CN102594359A (en) * 2012-03-28 2012-07-18 东南大学 Realization circuit of 8-bit restrict competition count codes

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CN1972131A (en) * 2006-07-28 2007-05-30 东南大学 Restraint competition count code circuit with mode of reverse phase shift
CN102594358A (en) * 2012-03-28 2012-07-18 东南大学 Code system conversion circuit for converting binary-coded decimal (BCD) codes to Lee restrict competition count codes
CN102594359A (en) * 2012-03-28 2012-07-18 东南大学 Realization circuit of 8-bit restrict competition count codes

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