CN103296164A - Semiconductor light-emitting structure - Google Patents
Semiconductor light-emitting structure Download PDFInfo
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- CN103296164A CN103296164A CN2013102108482A CN201310210848A CN103296164A CN 103296164 A CN103296164 A CN 103296164A CN 2013102108482 A CN2013102108482 A CN 2013102108482A CN 201310210848 A CN201310210848 A CN 201310210848A CN 103296164 A CN103296164 A CN 103296164A
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Abstract
The invention relates to a semiconductor light-emitting structure comprising a substrate, a first semiconductor layer, a quantum well light-emitting layer, and a second semiconductor layer. The first semiconductor layer, the quantum well light-emitting layer and the second semiconductor layer are sequentially formed on one side of the substrate. The quantum well light-emitting layer at least comprises well layers and barrier layers in two cycles. In the same cycle, the barrier layers are located on one side adjacent to the substrate; a first buffer layer is arranged between at least one barrier layer and the well layer in the adjacent cycle; the degree of lattice mismatch between material of the first buffer layer and material of the barrier layer and the degree of lattice mismatch between material of the first buffer layer and material of the well layers are both smaller than the degree of lattice mismatch between the material of the barrier layers and the material of the well layers. In the semiconductor light-emitting structure, stress of the well layers upon the barrier layers is buffered, so that lattice defects caused by the stress are reduced and lighting efficiency is further improved.
Description
Technical field
The present invention relates to light-emitting diode pipe manufacturer field, particularly relate to a kind of semiconductor light emitting structure.
Background technology
Earlier 1990s, the third generation wide bandgap semiconductor materials that with the nitride is representative has obtained historical breakthrough, on gallium nitride (GaN) sill, successfully prepare green, blueness and violet light diode (LED), make the LED white-light illuminating become possibility.From first GaN LED tube core to 1994 in 1971 year, the blue light GaN based diode of high electron mobility has appearred in GaN High Electron Mobility Transistor (HEMT), the development of GaN semi-conducting material is very rapid, market demand actuating force is very big, become the leading of illumination market with replacing incandescent lamp and fluorescent lamp, have the great development space.
The GaN base semiconductor is by the represented compound semiconductor of following chemical formula:
Al
aIn
bGa
1-a-bN，(0≤a≤1，0≤b≤1，0≤a+b≤1)，
The GaN base semiconductor is called III group-III nitride semiconductor, nitride-based semiconductor etc. again.Wherein, the part of III family element is by the compound semiconductor of alternative above-mentioned chemical formula such as B (boron), Tl (thallium), and the compound semiconductor of the above-mentioned chemical formula that substituted by P (phosphorus), As (arsenic), Sb (antimony), Bi (bismuth) etc. of the part of N (nitrogen) wherein, be also included within the GaN base semiconductor.Wherein, for example the light emitting element structure of pn junction structure, double-heterostructure and mqw light emitting layer structure etc. can send green glow to ultraviolet light by the GaN base LED that the GaN base semiconductor constitutes, and puts into the actual use of signal, display device etc.
GaN based semiconductor light emitting epitaxial structure of the prior art as shown in Figure 1, in Fig. 1, have the N-GaN layer 120, mqw light emitting layer 130 and the P-GaN layer 140 that stack gradually from bottom to top on the substrate 110, wherein, mqw light emitting layer 130 is built layer 132 stacked formation by InGaN trap layer 131 and GaN.
In the process of grown quantum trap luminescent layer 130, InGaN trap layer 131 is directly built layer 132 growth at GaN usually and is formed, owing to have lattice mismatch between InGaN and the GaN, when GaN builds the growing InGaN trap layer 131 of layer 132, can make InGaN trap layer 131 produce dislocation defects, make the luminous efficiency of whole mqw light emitting layer 130 reduce.
Therefore, how to provide a kind of semiconductor light emitting structure, can improve the luminous efficiency of mqw light emitting layer, become those skilled in the art's technical issues that need to address.
Summary of the invention
The problem that the semiconductor light emitting structure of prior art exists luminous efficiency to reduce the invention provides a kind of semiconductor light emitting structure that can address the above problem.
The invention provides a kind of semiconductor light emitting structure, described semiconductor light emitting structure comprises: substrate and first semiconductor layer, mqw light emitting layer and second semiconductor layer that are formed at described substrate one side successively; Wherein, the material of described first semiconductor layer, mqw light emitting layer and second semiconductor layer is III-V family semi-conducting material, described mqw light emitting layer comprises the trap layer in two cycles and builds layer that in one-period, described trap layer is positioned at the side near described substrate at least;
Has one first resilient coating between the described trap layer of at least one described base layer and adjacent periods, described first resilient coating is towards the described described base of the side contacts layer of building layer, described first resilient coating is towards the described trap layer of a side contacts of described trap layer, wherein, the lattice mismatch of the material of the lattice mismatch of the material of described first resilient coating and the described material of building layer and described first resilient coating and the material of described trap layer is all less than the lattice mismatch of the material of the described material of building layer and described trap layer.
Further, in described semiconductor light emitting structure, the material of described trap layer comprises first V group element, the compound of the one III family element and the 2nd III family element, the described material of building layer comprises the compound of first V group element and an III family element, described first resilient coating also is III-V family semi-conducting material, the material of described first resilient coating comprises first V group element, the compound of the one III family element and the 2nd III family element, wherein, the concentration of the 2nd III family element is lower than the concentration of the 2nd III family element in the material of described trap layer in the material of described first resilient coating.
Further, in described semiconductor light emitting structure, the concentration non-uniform Distribution of the 2nd III family element in the material of described first resilient coating, the concentration of described the 2nd III family element is from raising gradually towards a described side to the side towards described trap layer of building layer.
Further, in described semiconductor light emitting structure, described first resilient coating comprises the some first stacked sub-resilient coating, wherein, the concentration of the 2nd III family element described in the material of described some first sub-resilient coatings is from extremely raising gradually away from the described described first sub-resilient coating of building layer near the described described first sub-resilient coating of building layer.
Further, in described semiconductor light emitting structure, a described III family element is gallium, and described the 2nd III family element is indium or aluminium, and described V group element is phosphorus, arsenic or nitrogen.
Further, in described semiconductor light emitting structure, described first semiconductor layer is gallium nitride first semiconductor layer, and described second semiconductor layer is gallium nitride second semiconductor layer, and described mqw light emitting layer is the InGaN/gallium nitride quantum well layer in cycle.
Further, in described semiconductor light emitting structure, has one second resilient coating between at least one described trap layer and its described base layer with one-period, described second resilient coating is towards the described trap layer of a side contacts of described trap layer, described second resilient coating is towards the described described base of the side contacts layer of building layer, wherein, the lattice mismatch of the lattice mismatch of the material of described second resilient coating and the described material of building layer and the material of described second resilient coating and the material of described trap layer is all less than the lattice mismatch of the material of the described material of building layer and described trap layer, the material of described second resilient coating comprises V group element, the one III family element and the 2nd III family element, wherein, the concentration of the 2nd III family element is lower than the concentration of the 2nd III family element in the material of described trap layer in the material of described second resilient coating.
Further, in described semiconductor light emitting structure, described arbitrary trap aspect has described first resilient coating to a side of described substrate, and a side that deviates from described substrate has described second resilient coating.
Further, in described semiconductor light emitting structure, the concentration non-uniform Distribution of the 2nd III family element in the material of described second resilient coating, the concentration of described the 2nd III family element is from reducing gradually towards a described side to the side towards described trap layer of building layer.
Further, in described semiconductor light emitting structure, described second resilient coating comprises the some second stacked sub-resilient coating, wherein, the concentration of the 2nd III family element extremely reduces away from the described described second sub-resilient coating of building layer gradually from the described second sub-resilient coating near described base layer in the material of the described second sub-resilient coating.
Further, in described semiconductor light emitting structure, described first semiconductor layer is n type semiconductor layer, and described second semiconductor layer is p type semiconductor layer.
Compared with prior art, semiconductor light emitting structure provided by the invention has the following advantages:
1. in the semiconductor light emitting structure of the present invention, has one first resilient coating between the described trap layer of at least one described base layer and adjacent periods, described first resilient coating is towards the described described base of the side contacts layer of building layer, described first resilient coating is towards the described trap layer of a side contacts of described trap layer, the lattice mismatch of the lattice mismatch of the material of described first resilient coating and the described material of building layer and the material of described first resilient coating and the material of described trap layer is all less than the lattice mismatch of the material of the described material of building layer and described trap layer, compared with prior art, the lattice of described first resilient coating and described trap layer and described base layer all is complementary, so buffering by described first resilient coating, make described trap layer and the described stress of building between the layer obtain buffering, thereby reduce the described trap layer defects that stress causes, make described trap layer defects reduce, can improve luminous efficiency.
When the material of described trap layer comprises first V group element, during the compound of the one III family element and the 2nd III family element, the described material of building layer comprises the compound of first V group element and an III family element, described first resilient coating also is III-V family semi-conducting material, the material of described first resilient coating comprises first V group element, the compound of the one III family element and the 2nd III family element, wherein, the concentration of the 2nd III family element is lower than the concentration of the 2nd III family element in the material of described trap layer in the material of described first resilient coating, guaranteed that the 2nd III family concentration of element is stable in the described trap layer, can prevent that the 2nd III family Elements Diffusion in the trap layer is in the layer of described base, avoiding influencing described trap layer and described structural constituent of building layer, thereby prevent from influencing luminous efficiency and the emission wavelength of described mqw light emitting layer.
2. in the semiconductor light emitting structure of the present invention, between described arbitrary trap layer and its described trap layer with one-period, has one second resilient coating, the concentration of the 2nd III family element is lower than the concentration of the 2nd III family element in the material of described trap layer in the material of described second resilient coating, can be the described process of building layer of deposition on the described trap layer, make the 2nd III family element in the described trap layer build the quantity that layer diffusion run off and reduce to described, guaranteed that the 2nd III family concentration of element is stable in the described trap layer, luminous efficiency and emission wavelength are stable; Further, in the material of described second resilient coating, make and reduce gradually to described concentration of building the 2nd III family element the layer from described trap layer, can be so that the 2nd III family constituent content has a uniform transition profile in epitaxial loayer, make stress discharge gradually, reduce described trap layer defects further, make described trap layer finer and close, improve luminous efficiency.
Description of drawings
Fig. 1 is the schematic diagram of semiconductor light emitting structure of the prior art;
Fig. 2 is the schematic diagram of the semiconductor light emitting structure of first embodiment of the invention;
Fig. 3 is the schematic diagram of first resilient coating of first embodiment of the invention;
Fig. 4 is the schematic diagram of the semiconductor light emitting structure of second embodiment of the invention;
Fig. 5 is the schematic diagram of second resilient coating of second embodiment of the invention.
Embodiment
In the semiconductor light emitting structure of prior art, the mqw light emitting layer of described semiconductor light emitting structure is generally stacked trap layer and base layer of cycle, and the luminous efficiency of whole mqw light emitting layer is not high.The inventor finds through the further investigation to the prior art reaction chamber, though the lattice constant of described trap layer and base layer is more approaching, but the element such as indium because described trap layer for example can mix, can make and the lattice mismatch phenomenon occur between described trap layer and the base layer, please in conjunction with Fig. 1, when when GaN builds the growing InGaN trap layer 131 of layer 132, can make InGaN trap layer 131 produce dislocation defects; Especially at the trap layer in a plurality of cycles with when building stacked growth, every layer of trap layer and build and produce certain dislocation between the layer, when stacked trap layer and base layer are got over for a long time, the trap layer that is positioned at the upper strata is more obvious with the dislocation defects of building layer, so, it is bigger to cause the back to be grown in the defective of described trap layer on upper strata, and luminous efficiency is not high, thereby influences the luminous efficiency of whole mqw light emitting layer.
The inventor further discovers, can and build between the layer at described trap layer and prepare resilient coating, has one first resilient coating between the described trap layer of at least one described base layer and adjacent periods, described first resilient coating is towards the described described base of the side contacts layer of building layer, described first resilient coating is towards the described trap layer of a side contacts of described trap layer, wherein, the lattice mismatch of the material of the lattice mismatch of the material of described first resilient coating and the described material of building layer and described first resilient coating and the material of described trap layer is all less than the lattice mismatch of the material of the described material of building layer and described trap layer.When described when building the described trap layer of layer preparation following one-period, the lattice of described first resilient coating and described trap layer and described base layer all is complementary, avoid directly when the described trap layer of described base layer preparation because of the lattice generation stress that do not match, so buffering by described first resilient coating, make described trap layer and the described stress of building layer obtain buffering, thereby reduce the described trap layer defects that stress causes, make described trap layer defects reduce, can improve luminous efficiency.When the material of described trap layer for comprising first V group element, during the compound of the one III family element and the 2nd III family element, the described material of building layer is the compound that comprises first V group element and an III family element, described first resilient coating also is III-V family semi-conducting material, the material of described first resilient coating is for comprising first V group element, the compound of the one III family element and the 2nd III family element, wherein, the concentration of the 2nd III family element is lower than the concentration of the 2nd III family element in the material of described trap layer in the material of described first resilient coating, guaranteed that the 2nd III family concentration of element is stable in the described trap layer, can prevent that the 2nd III family Elements Diffusion in the trap layer is in the layer of described base, avoiding influencing described trap layer and described structural constituent of building layer, thereby prevent from influencing luminous efficiency and the emission wavelength of described mqw light emitting layer.
Further, between described arbitrary trap layer and its described trap layer with one-period, has one second resilient coating, the concentration of the 2nd III family element is lower than the concentration of the 2nd III family element in the material of described trap layer in the material of described second resilient coating, can be the described process of building layer of deposition on the described trap layer, make the 2nd III family element in the described trap layer build the quantity that layer diffusion run off and reduce to described, guaranteed in the described trap layer that the 2nd III family concentration of element is stable, luminous efficiency and emission wavelength stable; Further, in the material of described second resilient coating, make and reduce gradually to described concentration of building the 2nd III family element the layer from described trap layer, can be so that the 2nd III family constituent content has a uniform transition profile in epitaxial loayer, make stress discharge gradually, reduce described trap layer defects further, make the finer and close raising luminous efficiency of described trap layer.
Because above-mentioned research, the present invention proposes a kind of semiconductor light emitting structure, comprising: substrate and first semiconductor layer, mqw light emitting layer and second semiconductor layer that are formed at described substrate one side successively; Has one first resilient coating between the described trap layer of at least one described base layer and adjacent periods, described first resilient coating is towards the described described base of the side contacts layer of building layer, described first resilient coating is towards the described trap layer of a side contacts of described trap layer, wherein, the lattice mismatch of the material of the lattice mismatch of the material of described first resilient coating and the described material of building layer and described first resilient coating and the material of described trap layer is all less than the lattice mismatch of the material of the described material of building layer and described trap layer.
Compare with the prior art semiconductor light emitting structure, in the semiconductor light emitting structure of the present invention, when described when building the described trap layer of layer preparation following one-period, the lattice of described first resilient coating and described trap layer and described base layer all is complementary, avoid directly when the described trap layer of described base layer preparation because of the lattice generation stress that do not match, so buffering by described first resilient coating, make described trap layer and the described stress of building layer obtain buffering, thereby reduce the described trap layer defects that stress causes, make described trap layer defects reduce, can improve luminous efficiency.
See also Fig. 2, Fig. 2 is the schematic diagram of the semiconductor light emitting structure of first embodiment of the invention.In the present embodiment, described semiconductor light emitting structure 200 comprises trap layer and the base layer in two cycles: the trap layer A231 of period 1 is with base layer A232 and the trap layer B231 of second round and build a layer B232, have one first resilient coating 250 between the base layer A232 of period 1 and the trap layer B231 of second round, only connect by described first resilient coating 250 between the base layer A232 of described period 1 and the trap layer B231 of second round.
As shown in Figure 2, described semiconductor light emitting structure 200 comprises substrate 210, is formed at first semiconductor layer 220, mqw light emitting layer 230 and second semiconductor layer 240 of described substrate 210 1 sides successively, described mqw light emitting layer 230 comprises the trap layer A231 of period 1 and builds layer A232, the trap layer B231 of second round and build layer B232, in with one-period, described trap layer is positioned at the side near described substrate 210.Have one first resilient coating 250 between the base layer A232 of period 1 and the trap layer B231 of second round, only connect by described first resilient coating 250 between the base layer A232 of described period 1 and the trap layer B231 of second round.Wherein, described first semiconductor layer 220, the material of mqw light emitting layer 230 and second semiconductor layer 240 is III-V family semi-conducting material, the lattice mismatch of the material of the base layer A232 of the material of described first resilient coating 250 and period 1 is less than the lattice mismatch of the material of the material of the base layer A232 of described period 1 and the trap layer B231 of second round, and the lattice mismatch of the material of the trap layer B231 of the material of described first resilient coating 250 and second round is less than the lattice mismatch of the material of the material of the base layer A232 of described period 1 and the trap layer B231 of second round.When the base of described period 1 layer A232 prepares the trap layer B231 of second round, described first resilient coating 250 all is complementary with the base layer A232 of described period 1 and the lattice of the trap layer B231 of second round, avoid directly when the base of described period 1 layer A232 prepares the trap layer B231 of second round, because of the lattice of the base layer A232 of described period 1 and the trap layer B231 of the second round generation stress that do not match, so buffering by described first resilient coating 250, make the base layer A232 of described period 1 and the stress of the trap layer B231 of second round obtain buffering, thereby the trap layer B231 defective of the second round that the minimizing stress causes, make the trap layer B231 defective of second round reduce, can improve luminous efficiency.
Wherein, the material of described first semiconductor layer 220 and second semiconductor layer 240 includes the compound of first V group element and an III family element, the material of the trap layer B231 of the trap layer A231 of period 1 and second round comprises first V group element, the compound of the one III family element and the 2nd III family element, the material of the base layer A232 of period 1 and the base layer B232 of second round is the compound that comprises first V group element and an III family element, described first resilient coating 250 also is III-V family semi-conducting material, and the material of described first resilient coating 250 is for comprising first V group element, the compound of the one III family element and the 2nd III family element.Preferably, a described III family element is gallium, and described the 2nd III family element is indium or aluminium, and described V group element is phosphorus, arsenic or nitrogen.For example, in the present embodiment, described first semiconductor layer 220 is n type gallium nitride, described second semiconductor layer 240 is P type gallium nitride, InGaN/gallium nitride quantum well layer that described mqw light emitting layer 230 is the cycle, wherein, InGaN is the trap layer, and gallium nitride is for building layer.But the material of described semiconductor light emitting structure 200 is not limited to above-mentioned execution mode, and for example described mqw light emitting layer 230 can also be for the aluminium gallium nitride alloy/gallium nitride quantum well layer in cycle etc., also within thought range of the present invention.
In the present embodiment, described the 2nd III family element is indium, and the concentration of phosphide element is lower than the concentration of phosphide element in the material of described trap layer B231 in the material of described first resilient coating 250.When the base of described period 1 layer A232 prepares the trap layer B231 of second round, because the concentration of phosphide element is lower than the concentration of phosphide element among the trap layer B231 of second round in the material of described first resilient coating 250, make that concentration from the base layer A232 of described period 1 to the phosphide element the trap layer B231 of described second round is to increase gradually and not mutated, on the one hand, make the 2nd III family element among the described trap layer B231 build the quantity that layer A232 diffusion runs off and reduce to described, guaranteed phosphide element concentration stabilize among the trap layer B231 of described second round, avoid among the base layer A232 of described period 1, spreading, help luminous efficiency and the emission wavelength of the trap layer B231 of described second round to stablize; On the other hand, because the concentration of phosphide element is lower than the concentration of phosphide element among the trap layer B231 of second round in the material of described first resilient coating 250, so slowed down the lattice fit, make stress discharge gradually, defective among the trap layer B231 that reduces described second round further, make the trap layer B231 of described second round finer and close, improve luminous efficiency.
Wherein, the concentration of phosphide element can be evenly to distribute or non-uniform Distribution in the material of described first resilient coating 250, when in the material of described first resilient coating 250 during the phosphide element non-uniform Distribution, the concentration of described phosphide element is from raising gradually towards a described side to the side towards described trap layer of building layer, that is, trap layer B231's concentration of described phosphide element gradually to second round raises from the base of described period 1 layer A232.Thereby make the slow transition of concentration of phosphide element, preferably the stress that causes of less lattice mismatch.
In addition, described first resilient coating 250 is not limited to one deck structure, described first resilient coating 250 can also comprise the some first sub-resilient coating that stacks gradually, as shown in Figure 3, described first resilient coating 250 can also comprise three layer of first sub-resilient coating 251, the first sub-resilient coating 252 and the first sub-resilient coating 253 that stacks gradually, wherein, the concentration of phosphide element raises gradually in the first sub-resilient coating 251, the first sub-resilient coating 252 and the first sub-resilient coating 253, and the concentration of phosphide element is maximum in the first sub-resilient coating 253 of the trap layer B231 of close described second round.When described first resilient coating 250 comprises the some first sub-resilient coating that stacks gradually, can also make the concentration of phosphide element in a plurality of first sub-resilient coating transition gradually, the stress that causes of less lattice mismatch preferably, and make things convenient for the technology manufacturing.Wherein, the number of plies of the described first sub-resilient coating is not done concrete restriction, when the number of plies of the described first sub-resilient coating more for a long time, the concentration of phosphide element is crossed and is getted over slowly, the effect that reduces stress is more good, but the number of plies of the described first sub-resilient coating is too many, can make that in making described semiconductor light emitting structure process, process gas switches frequent, increases the complexity of technical process, therefore, the number of plies of the described first sub-resilient coating is preferably three layers or four layers.
See also Fig. 4, Fig. 4 is the schematic diagram of the semiconductor light emitting structure of second embodiment of the invention.The semiconductor light emitting structure 300 of described second execution mode is basic identical with the semiconductor light emitting structure 200 of described first execution mode, its difference is: in described semiconductor light emitting structure 300, has one second resilient coating 360 between at least one described trap layer and its described base layer with one-period, described trap layer only is connected by described second resilient coating with its described base layer with one-period, wherein, the lattice mismatch of the material of the lattice mismatch of the material of described second resilient coating 360 and the described material of building layer and described second resilient coating 360 and the material of described trap layer is all less than the lattice mismatch of the material of the described material of building layer and described trap layer.
In the present embodiment, have described second resilient coating 360 between the base layer B332 of the trap layer B331 of second round and second round, only connect by described second resilient coating 360 between the base layer B332 of the trap layer B331 of described second round and second round.When the trap layer B331 in described second round prepares the base layer B332 of second round, described second resilient coating 360 all is complementary with the trap layer B331 of second round and the lattice of the base layer B332 of second round, avoid directly when the trap layer B331 of described second round prepares the base layer B332 of second round, because of the lattice of the trap layer B331 of described second round and the base layer B332 of the second round generation stress that do not match, so buffering by described second resilient coating 360, make the trap layer B331 of described second round and the stress of the base layer B332 of second round obtain buffering, thereby the base layer B332 defective of the second round that the minimizing stress causes, make the base layer B332 defective of second round reduce, thereby when preparing described second semiconductor layer 240 again, can guarantee the lattice quality of described second semiconductor layer 240.
In the present embodiment, the lower surface of the trap layer B331 of described second round one side of described substrate 310 (namely towards) has described first resilient coating 350, and upper surface (side that namely deviates from described substrate 310) has described second resilient coating 360, described first resilient coating 350 and described second resilient coating 360 are clamped the trap layer B331 of described second round, be symmetricly set on the both sides up and down of the trap layer B331 of described second round, thereby make that the lattice of mqw light emitting layer 330 is better, the concentration of phosphide element is more stable.In addition, lower surface and the upper surface of trap layer A331 that can also the described period 1 have described first resilient coating 350 and described second resilient coating 360 respectively, can also make that the lattice of described mqw light emitting layer 330 is better, and the concentration of phosphide element is more stable.
The material of described second resilient coating 360 is preferable comprises V group element, an III family element and the 2nd III family element.Wherein, the concentration of the 2nd III family element is lower than the concentration of the 2nd III family element in the material of trap layer B331 of described second round in the material of described second resilient coating 360, avoid phosphide element among the base layer B232 of described second round, to spread the defective among the base layer B232 that reduces described second round simultaneously from the trap layer B331 of described second round.
Wherein, the concentration of phosphide element can be evenly to distribute or non-uniform Distribution in the material of described second resilient coating 360, when in the material of described second resilient coating 360 during the phosphide element non-uniform Distribution, the concentration of described phosphide element is from reducing gradually towards a described side to the side towards described trap layer of building layer, namely, base layer A232 to the described period 1 reduces the concentration of described phosphide element gradually from the trap layer B331 of described second round, thereby make the slow transition of concentration of phosphide element, can reduce the stress that lattice mismatch causes preferably.
In addition, described second resilient coating 350 is not limited to one deck structure, described second resilient coating 350 can also comprise the some second sub-resilient coating that stacks gradually, as shown in Figure 5, described second resilient coating 350 can also comprise the two-layer second sub-resilient coating 361, the second sub-resilient coating 362 that stacks gradually, wherein, the concentration of phosphide element reduces successively in the second sub-resilient coating 361, the second sub-resilient coating 362, and the concentration of phosphide element is maximum in the second sub-resilient coating 361 of the trap layer B331 of close described second round.When described second resilient coating 350 comprises the some second sub-resilient coating that stacks gradually, can also make the concentration of phosphide element in a plurality of second sub-resilient coating transition gradually, the stress that causes of less lattice mismatch preferably, and make things convenient for the technology manufacturing.Wherein, the number of plies of the described second sub-resilient coating is not done concrete restriction, when the number of plies of the described second sub-resilient coating more for a long time, the concentration of phosphide element is crossed and is getted over slowly, the effect that reduces stress is more good, but the number of plies of the described second sub-resilient coating is too many, can make that in making described semiconductor light emitting structure process, process gas switches frequent, increases the complexity of technical process, therefore, the number of plies of the described second sub-resilient coating is preferably three layers or four layers.
In the present embodiment, the lattice of described first resilient coating and described trap layer and described base layer all is complementary, described second resilient coating also all is complementary with the lattice of described trap layer and described base layer, so buffering by described first resilient coating and described second resilient coating, make described trap layer and the described stress of building between the layer obtain buffering, thereby reduce the described trap layer defects that stress causes, make described trap layer defects reduce, can improve luminous efficiency better.
Though the present invention discloses as above with preferred embodiments, the present invention is defined in this.For example, the mqw light emitting layer in the described semiconductor light emitting structure is not limited to the trap layer in two cycles and builds layer, can also be multicycle more, as three cycles, five cycles or ten cycles etc.; And, described first resilient coating and described second resilient coating can be arranged arbitrarily, as, all have described first resilient coating between the described trap layer of each described base layer and adjacent periods, and all have described second resilient coating between each described trap layer and its described base layer with one-period; Or, all have described first resilient coating between the described trap layer of part described base layer and adjacent periods, all have described second resilient coating between the described trap layer of part and its described base layer with one-period.Any those skilled in the art without departing from the spirit and scope of the present invention, all can do various changes and modification, so protection scope of the present invention should be as the criterion with claim institute restricted portion.
Claims (11)
1. a semiconductor light emitting structure comprises: substrate and first semiconductor layer, mqw light emitting layer and second semiconductor layer that are formed at described substrate one side successively; Wherein, the material of described first semiconductor layer, mqw light emitting layer and second semiconductor layer is III-V family semi-conducting material, described mqw light emitting layer comprises the trap layer in two cycles and builds layer that in one-period, described trap layer is positioned at the side near described substrate at least;
It is characterized in that: have one first resilient coating between the described trap layer of at least one described base layer and adjacent periods, described first resilient coating is towards the described described base of the side contacts layer of building layer, described first resilient coating is towards the described trap layer of a side contacts of described trap layer, wherein, the lattice mismatch of the material of the lattice mismatch of the material of described first resilient coating and the described material of building layer and described first resilient coating and the material of described trap layer is all less than the lattice mismatch of the material of the described material of building layer and described trap layer.
2. semiconductor light emitting structure as claimed in claim 1, it is characterized in that: the material of described trap layer is for comprising first V group element, the compound of the one III family element and the 2nd III family element, the described material of building layer is the compound that comprises first V group element and an III family element, described first resilient coating also is III-V family semi-conducting material, the material of described first resilient coating is for comprising first V group element, the compound of the one III family element and the 2nd III family element, wherein, the concentration of the 2nd III family element is lower than the concentration of the 2nd III family element in the material of described trap layer in the material of described first resilient coating.
3. semiconductor light emitting structure as claimed in claim 2, it is characterized in that: the concentration non-uniform Distribution of the 2nd III family element in the material of described first resilient coating, the concentration of described the 2nd III family element is from raising gradually towards a described side to the side towards described trap layer of building layer.
4. semiconductor light emitting structure as claimed in claim 2, it is characterized in that: described first resilient coating comprises the some first stacked sub-resilient coating, wherein, the concentration of the 2nd III family element described in the material of described some first sub-resilient coatings is from extremely raising gradually away from the described described first sub-resilient coating of building layer near the described described first sub-resilient coating of building layer.
5. semiconductor light emitting structure as claimed in claim 2, it is characterized in that: a described III family element is gallium, and described the 2nd III family element is indium or aluminium, and described V group element is phosphorus, arsenic or nitrogen.
6. semiconductor light emitting structure as claimed in claim 5, it is characterized in that: described first semiconductor layer is gallium nitride first semiconductor layer, described second semiconductor layer is gallium nitride second semiconductor layer, and described mqw light emitting layer is the InGaN/gallium nitride quantum well layer in cycle.
7. as any described semiconductor light emitting structure among the claim 2-6, it is characterized in that: have one second resilient coating between at least one described trap layer and its described base layer with one-period, described second resilient coating is towards the described trap layer of a side contacts of described trap layer, described second resilient coating is towards the described described base of the side contacts layer of building layer, wherein, the lattice mismatch of the lattice mismatch of the material of described second resilient coating and the described material of building layer and the material of described second resilient coating and the material of described trap layer is all less than the lattice mismatch of the material of the described material of building layer and described trap layer, the material of described second resilient coating is for comprising V group element, the compound of the one III family element and the 2nd III family element, wherein, the concentration of the 2nd III family element is lower than the concentration of the 2nd III family element in the material of described trap layer in the material of described second resilient coating.
8. semiconductor light emitting structure as claimed in claim 7, it is characterized in that: described arbitrary trap aspect has described first resilient coating to a side of described substrate, and a side that deviates from described substrate has described second resilient coating.
9. semiconductor light emitting structure as claimed in claim 7, it is characterized in that: the concentration non-uniform Distribution of the 2nd III family element in the material of described second resilient coating, the concentration of described the 2nd III family element is from reducing gradually towards a described side to the side towards described trap layer of building layer.
10. semiconductor light emitting structure as claimed in claim 7, it is characterized in that: described second resilient coating comprises the some second stacked sub-resilient coating, wherein, the concentration of the 2nd III family element extremely reduces away from the described described second sub-resilient coating of building layer gradually from the described second sub-resilient coating near described base layer in the material of the described second sub-resilient coating.
11. semiconductor light emitting structure as claimed in claim 1 is characterized in that: described first semiconductor layer is n type semiconductor layer, and described second semiconductor layer is p type semiconductor layer.
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