CN103259519A - Active upward-pulling circuit of drain electrode open circuit signal - Google Patents

Active upward-pulling circuit of drain electrode open circuit signal Download PDF

Info

Publication number
CN103259519A
CN103259519A CN2013102011152A CN201310201115A CN103259519A CN 103259519 A CN103259519 A CN 103259519A CN 2013102011152 A CN2013102011152 A CN 2013102011152A CN 201310201115 A CN201310201115 A CN 201310201115A CN 103259519 A CN103259519 A CN 103259519A
Authority
CN
China
Prior art keywords
pull
current
circuit
rate
holding wire
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
CN2013102011152A
Other languages
Chinese (zh)
Inventor
李�真
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Suzhou Baker Microelectronics Co Ltd
Original Assignee
Suzhou Baker Microelectronics Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Suzhou Baker Microelectronics Co Ltd filed Critical Suzhou Baker Microelectronics Co Ltd
Priority to CN2013102011152A priority Critical patent/CN103259519A/en
Publication of CN103259519A publication Critical patent/CN103259519A/en
Pending legal-status Critical Current

Links

Images

Landscapes

  • Electronic Switches (AREA)
  • Logic Circuits (AREA)

Abstract

The invention discloses an active upward-pulling circuit of a drain electrode open circuit signal and provides a circuit and a method for reducing signal rising time in a signal line of a drain electrode open circuit or a collector electrode opening circuit. Voltage of the signal line is monitored so as to ensure whether the signal line is pulled to be low. If the signal line is not pulled to be low, the voltage of the indicated signal line exceeds a threshold value electrical level, and extra upward-pulling currents are provided. The voltage of the signal line is responded to, and the extra currents are provided gradually. Or, no matter whether the voltage exceeds a threshold or not, all the currents will be provided. The circuit can be used for monitoring the change rate of the voltage of the signal line, and enabling the upward-pulling currents to exist only when the change rate exceeds a positive threshold value level.

Description

The active pull up circuit of open-drain signal
Technical field
The invention provides and use open-drain or open collector drives holding wire to increase circuit and the method for exchange velocity, more specifically, provide the rate of change sensitivity, pull-up circuit and method that lag behind, active.
Professional term " open-drain " will be extensive use of in following description.Although " open-drain " may illustrate the usage of field-effect transistor, for example MOSFET can be with the transistor of other type in the function in this field, and triode also is the same.Therefore, the professional term open-drain can be understood that a wide in range concept at this, and this professional term comprises open-collector circuit.Deeper, the present invention not only uses MOSFET, and this transistor can comprise the transistor that other is fit to.
The open-drain circuit is extensive use of in the interconnection electronic device.The open-drain holding wire uses in computer system, and is driven by a plurality of signal sources, for example, and the interruption of microprocessor input.
Background technology
The transistor that device is coupled between open-drain holding wire and the ground by control is uploaded delivery signal at the open-drain holding wire.This transistor as switch normally, a N channel-type MOSFET, but other transistor that is fit to can be used for realizing this purpose.
When this device made that transistor is ON, holding wire was coupled to ground, was the state of LOW or level (for example, being lower than about 0.4 volt) thereby cause its voltage to pull down to one.On the contrary, when all devices made that the driving transistors of their correspondences is OFF, by being connected to the pull-up circuit between holding wire and the power supply, holding wire was biased to one and is the state of HIGH (for example, 5 volts).
The transfer rate of signal depends on the open-drain holding wire, the speed of the cyclical-transformation of holding wire between LOW and HIGH state.Because be connected to the existence of the parasitic capacitance of holding wire, the speed of parasitic capacitance charging and discharge has determined the speed that switch switches.The increase of the parasitic capacitance charging and discharging speed that can slow down, and reduce maximum signal transmissibility.Therefore, many open-drain circuit based on the interconnect devices standard have specified maximum signal line capacitance (being generally 100 pico farads) to guarantee enough performances.
Another factor that determines parasitic capacitance charging and discharging speed is the size of resistance on charging and discharge channel.Because the resistance when transistor is ON on the output transistor is very little usually, so parasitic capacitance discharge can be very fast, switch also very fast like this from HIGH to the LOW state.But parasitic capacitance is charged by the pull-up current that pull-up circuit provides.
In the typical case who uses the open-drain holding wire used, pull-up circuit was a resistance that is coupled between holding wire and the positive source.Because the resistance value the when resistance value of pull-up resistor is ON than transistor usually is a lot of greatly, so the speed of parasitic capacitance charging can be slow more a lot of than its discharge.Therefore, signal elevating time is more a lot of slowly fall time than signal.
A kind of technology of reducing signal elevating time is to use a pull-up resistor that resistance value is very little.Use the little resistance of resistance to increase the pull-up current that can get, the charge rate of any like this parasitic capacitance when transistor is OFF can be very fast.But reducing pull-up resistor can have adverse influence in circuit working.
For example, pull-up resistance values reduce increased when driving transistors is ON from V CCFlow to the electric current on ground.The electrical power of loss is represented in the increase of this electric current, and this is important index to application of power, for example the powered battery device.Therefore the increase of this electric current also can increase the pressure drop of driving transistors, has increased line voltage signal and has reduced noise margin during for LOW at holding wire.
With reference to after aforementioned, use the open-drain structure, be increased in exchanges data rate in the transmission system by the rise time that reduces the open-drain holding wire, and do not comprise reduction and the more loss of electrical power of noise margin, expect.
Summary of the invention:
The objective of the invention is to use the open-drain structure to be increased in exchanges data rate in the transmission system by the rise time that reduces the open-drain holding wire, and do not comprise reduction and the more loss of electrical power of noise margin.
These or other purpose of the present invention realizes that by following circuit and method provide a pull-up current by a variable current source, this electric current is the function of voltage on the holding wire.Especially, when line voltage signal represented that holding wire draws to LOW, pull-up current increased.
In first example, when voltage surpasses threshold voltage on holding wire, provide extra pull-up current.In a preferred examples, the rate of change of circuit with supervisory signal (dV/dt) is provided, only working as signal provides higher pull-up current above threshold value and rate of change for timing, such as in the conversion of holding wire from LOW to HIGH.
Documents, patent of invention: on draw and pull-down circuit application number: 98105944.9
Documents, patent of invention: what have that dog days assist can tolerate five volts integrated circuit signal pad, application number: 200880015599.9
Description of drawings:
Above-mentioned or other purpose of the present invention is after considering following detailed, and reference pattern, and wherein the identical identical part of symbolic representation will be significantly, wherein:
Figure 1A to 1C is the simplification principle schematic of describing three types pull-up circuit of previously known;
Fig. 2 A and 2B are respectively the signal voltages of Figure 1A to 1C pull-up circuit about the functional image of time, and pull-up current is about the functional image of signal voltage;
Fig. 3 is the simplification principle schematic of first kind of example of the pull-up circuit of the principle according to the present invention;
Fig. 4 is that Fig. 3 pull-up circuit pull-up current is about the functional image of signal voltage;
Fig. 5 is the simplification principle schematic of second kind of example of the pull-up circuit of the principle according to the present invention;
Fig. 6 is that Fig. 5 pull-up circuit pull-up current is about the functional image of signal voltage;
Fig. 7 is the simplification principle schematic of the third example of the active pull up circuit of the principle according to the present invention.
Embodiment:
The open-drain structure that is to use Figure 1A to 1C realizes the simplification principle schematic of circuit of the previously known of holding wire.Device that is coupled to holding wire 11 of device 16 expressions, and can be any device from the integrated circuit to the computer peripheral.Device 16 comprises driving transistors 14, and controls ON and OFF (not shown) by extra circuit in device 16.Alternatively, device 16 can comprise that a terminal is to control outside driving transistors.Though have only a device to be connected to holding wire 11 in the schematic diagram in Fig. 1,3 and 5, the technical staff in this field will appreciate that can a plurality of devices.
Capacitor 18 expressions are connected to the parasitic capacitance of holding wire 11, comprise the stray capacitance that is connected to holding wire 11 and is coupled to driver and the receiver of holding wire 11.The main influence of parasitic capacitance 18 (its value is generally the quantity of 100 pico farads) is the speed of transfer of data on the limiting signal line 11.Particularly, the speed of parasitic capacitance charging and discharge determines message transmission rate on the holding wire 11.Based on this reason, most of communication protocols use the open-drain structure with the maximum of specification signal line capacitance.For example, the maximum of the signal line capacitance of the specification of 12C permission is 400 pico farads.
Driving transistors 14 is connected between holding wire 11 and the ground, so that device 16 is LOW by switching driving transistors 14 for ON draws holding wire.Be LOW because any device that similarly is connected to holding wire 11 can draw holding wire, thus only when the driving transistors 14 that is connected to each device switches to OFF holding wire be HIGH.
Therefore, can to select to come drive signal line by the transistor that closure links to each other with this device be LOW to any device that is connected to holding wire 11.On the contrary, when the transistor 14 of all devices that are connected to holding wire 11 was OFF, the pull-up circuit bias signal line that is connected to holding wire 11 was HIGH.
In Figure 1A, pull-up circuit 10 is by being connected to V CCAnd the pull-up resistor between the holding wire 11 12 is formed.When transistor 14 switched to OFF, electric current flow to holding wire 11 by pull-up resistor, made and moved V on it to CCTypically, the resistance value of pull-up resistor 12 is one kilohm.
A kind of type signal of holding wire 11 is shown as solid line among Figure 1A in Fig. 2 A.In time T 0Before, transistor 14 is OFF, and holding wire 11 is HIGH.At T 0Constantly, transistor 14 switches to ON by device 16, and a low-resistance channel is provided between holding wire 11 and ground.This makes electric capacity 18 repid discharges to earth terminal, and at T 1Constantly holding wire 11 is drawn and be LOW.T 0And T 1Between blanking time, namely holding wire reaches HIGH state required time after transistor 14 switches to OFF, is expressed as rise time (t 1).
In essence, the circuit of Figure 1A is resistance-capacitance (RC) circuit.The response of RC circuit is the exponential waveform that (is determined by circuit time constant) in a period of time, and wherein time constant is the product of circuit capacitance and resistance in the current channel.The circuit that time constant is big, its rising and fall time are longer.
In typical open-drain system, the resistance the when resistance value of pull-up resistor 12 is ON much larger than driving transistors.This causes signal elevating time (t r) be signal (t fall time t) a lot of doubly.Because the message transmission rate of holding wire 11 is limited to signal elevating time (t to a great extent r), the technology that improves data transmission rate generally is conceived to shorten the rise time of open-drain system.
For example describe in background technology, the rise time can reduce by the resistance value that reduces resistance 12.This can make the RC circuit time constant reduce, and therefore, provides the shorter rise time.Can cause more power losss and noise susceptibility because reduce pull-up resistance values, invent other and reduced the technology of signal elevating time.
The principle schematic of Figure 1B has illustrated such known technology that reduces the rise time.Open-drain circuit 20 comprises pull-up resistor 12, transistor 14 and capacitor 18, corresponding to the like among Figure 1A.Pull-up circuit 20 also comprises an extra pull-up resistor 12a, and it can select by switch 13 in parallel with resistance 12.Switch 13 can be, CD4066CMOS switch for example, and it is by level control of control input end 15.The LOW signal of control input end 15 makes switch 13 be OFF, and the HIGH signal to make switch be ON.
In the circuit of Figure 1B, when transistor 14 was ON, holding wire 11 was that LOW and switch 13 are OFF.When transistor 14 primitively switches to OFF, and suppose that not having other device draws holding wire 11 into low, pull-up resistor 12 provides electric current to make parasitic capacitance 18 chargings, and synchronous signal line voltage begins to rise.When rising to when being enough to diverter switch 13 for ON, line voltage signal (is generally 1/2nd V CC), resistance 12a is parallel to pull-up resistor 12, thereby reduces pull-up resistance values effectively and improve pull-up current.
Pull-up resistor is function about the value of resistance 12 and 12a in switch 13 decrement when opening.For example, if the resistance value of switch 12 and 12a equates that effective pull-up resistance values reduces by half when switch 13 is ON so.Reduce the RC time constant like this, and then cause holding wire 11 to draw the rise time into HIGH to shorten.
Fig. 2 A and 2B have shown the response of pull-up circuit 20.From time t 0To t 1, roughly the same among the response of circuit and waveform and Figure 1A.At moment t 2, transistor 14 switches to OFF, and voltage is to begin rising on the holding wire corresponding to the identical wavy curve of Figure 1A.At moment t 4, holding wire 11 reaches and is about 1/2nd V CCVoltage and switch 13 switch to ON, thereby reduce pull-up resistance values greatly.The pull-up resistance values that reduces has also reduced the RC time constant, and line voltage signal rises rapidly, shown in dash line among Fig. 2 A.Corresponding pull-up current shows with dash line in Fig. 2 B.
Significantly, in the circuit of Figure 1B, rise at line voltage signal that to be enough to be before switch 13 switches to ON, all driving transistorss of holding wire are necessary for OFF.Like this, after considering overload current discussed above, power loss and noise margin, pull-up resistor 12 must be enough greatly, and draw performance for providing on suitable, and resistance 12a must be enough little.
Fig. 1 C has shown the alternative scheme of the third optional pull-up circuit, and wherein the pull-up current of holding wire 11 is provided by constant current source 32.In the circuit of Figure 1A and 1B, when holding wire 11 voltages rose, pull-up current descended, and response wave shape is the indicial response curve.Use constant current source to guarantee that the charge rate of pull-up current and electric capacity 18 keeps constant, line voltage signal is linear to be increased thereby make.More than dotted line in Fig. 2 A and 2B has illustrated these.It should be noted that and work as line voltage signal near power supply, pull-up current is owing to the minimizing of constant current source electric current headroom reduces.
Although the circuit of Figure 1B and 1C reduces signal elevating time in the open-drain circuit be effectively, be to use the pull-up circuit of these types, its peak signal transfer rate still is limited in below the 1MHZ.In addition, be noted that parasitic capacitance must remain a minimum value, for example, by the length that reduces holding wire 11 or the number of devices that is connected to holding wire 11.
Forward Fig. 3 to, it has described first example according to pull-up circuit of the present invention.Pull-up circuit 40 comprises transistor 41 to 44 and resistance 45 to 48.Transistor 41 connects together to constitute a current mirror with 42, make the collector current I of transistor 42 like this 2Be proportional to the collector current I of transistor 41 1If holding wire is LOW, transistor 43 is biased to OFF, and electric current I 1Value by resistance 45 and 46 determines.
When all open-drain driving transistorss that is connected to holding wire 11, for example transistor 14, are OFF, and the collector current of transistor 42 begins to parasitic capacitance 18 chargings, and synchronous signal line 11 voltages rise.When the base-emitter voltage of line voltage signal 11 above transistor 43, transistor begins conducting and passes through resistance 47 delivered currents.Electric current I 1And I 3And flow through the transistor 41 of current mirror, increase electric current I simultaneously 2And make extra current charges to parasitic capacitance 18.When holding wire 11 voltages continue to rise electric current I 3The same continuation increases, and causes electric current I 2Continue to increase.Therefore, pull-up current is the direct function of line voltage signal.
Finally, electric current I 2Enough big, thus the voltage drop of resistance 48 begins to make the base stage-emitter-base bandgap grading forward bias of junction transistor 44, causes electric current I 4Conducting.Electric current I 4Be tending towards the electric current I that offseting signal line voltage rises and causes 3Increase, therefore offer electric current I 2A upper limit.At last, begin near V when line voltage signal CC, pull-up current I 2Because transistor 42 is saturated and resistance 48 both end voltage reduce and begin to descend.
Draw and be LOW when the open-drain driver that is connected to holding wire 11 (for example transistor 14) switches to ON holding wire 11, opposite situation begins.At first, the decline of line voltage signal has increased the current mirror headroom, and pull-up current is increased to the upper limit that transistor 14 arranges.Pull-up current is still much smaller than the electric current by driving transistors, so line voltage signal continues to descend.Final signal line 11 voltages are enough low so that transistor 43 is OFF, eliminate electric current I 3And reduce pull-up current simultaneously to resistance 45 and 46 level that arrange.Fig. 3 circuit pull-up current illustrates at Fig. 4 about the typical image of line voltage signal.
Fig. 4 has also shown a dotted line, the load line of the resistance when its expression is ON corresponding to driving transistors.This expression transistor 14 for unlike signal line voltage can cancellation electric current, i.e. pull-down current.When pull-up circuit of design example such as Fig. 3, importantly pull-up current will always keep the electric current that can hinder less than transistor 14.Otherwise transistor 14 can not be LOW so that holding wire 11 draws by the enough electric currents of cancellation.
Fig. 5 has shown an explanatory view of a preferred pull-up circuit example.According to principle of the present invention, pull-up circuit 60 only provides additional pull-up current when holding wire 11 is not drawn to LOW.
Pull-up circuit 60 is worked in the identical mode of Fig. 3 circuit.Transistor 61 and 62 constitutes a current mirror, and wherein the electric current by transistor 62 provides pull-up current to holding wire 11.Transistor 63 makes pull-up current I when line voltage signal rises 2Increase, and the maximum pull-up current of transistor 64 restrictions is an acceptable level.But circuit 60 comprises additional circuit, to produce hysteresis in the pull-up circuit current-voltage characteristic, as shown in Figure 6.
Operational amplifier 67 and electric capacity 68 and resistance 69 constitute a differentiator together, the variation of voltage on its supervisory signal line 11.The output of operational amplifier 67 is the signal that an expression line voltage signal changes speed, i.e. rate of change.When the signal corresponding to positive rate of change surpasses a threshold voltage, signal of comparator 53 outputs makes transistor 54 switch to ON.Threshold voltage is provided at '+' input of comparator 53 by current source 65 and diode 51 and 52.Transistor 54 switches to ON and makes electric current I 3Flow through transistor 63, and the pull-up current of an increase is provided with the same way as with Fig. 3 description.
But, because line voltage signal is constant or descends that when voltage change ratio was lower than threshold value, it was OFF that comparator 53 keeps transistor 54, and pull-up current I 2Be limited in the value that is arranged by current source 66.Transistor 54 is introduced the current-voltage characteristic that a hysteresis is given pull-up circuit 60 with relevant rate-of-change circuit.The pull-up current that pull-up circuit 60 provides depends on that signal voltage is to rise or descend.A representative current-voltage characteristic is shown in Figure 6.
Because pull-up circuit 60 only provides additional pull-up current when holding wire 11 voltages rise, pull-up current may surpass the pull-down current (dotting) of load line in Fig. 6.It is very fast that this causes pull-up current to rise.In fact, as long as the pull-up current of increase only just is provided when holding wire 11 is not drawn to LOW, the variation of pull-up current may be that the step of moment changes.
Forward Fig. 7 to, it describes the pull-up circuit that hysteresis, non-linear pull-up current typically are provided in detail.Pull-up circuit 70 comprises four basic circuit parts: level sensitive circuit 71, the voltage on its signal lines 11; The rate of change testing circuit, the rate of change of its signal lines voltage; Nominal pull-up current circuit 88, it provides pull-up current when holding wire is stable or draws to LOW; High power pull-up current circuit 95, it provides the pull-up current of increase when needed.In addition, pull-up circuit 70 comprises the circuit of realizing low-power mode in the battery power supply system.
The additional voltage and the signal that offer the circuit of Fig. 7 do not show therein.For example, the voltage regulator circuit (not shown) provides voltage to BIASH and BIASL, with flash and the low limit of the MOSFET current source of the Fig. 7 that setovers respectively, and provides reference voltage to V REFAdditional circuit provides a stopping signal to SHDN.SGNL is connected to holding wire, for example the holding wire 11 of Fig. 5.
Forward each part of Fig. 7 below to, level sensitive circuit 71 comprises a differential amplifier 72, and it is according to being relevant at V REFTerminal voltage (reference voltage) at the voltage of SGNL end with electric current I 1Be divided into I 1aAnd I 1bElectric current I 1dProvide electric current I by current mirror reflects 2, be tending towards moving node 74 to earth terminal.Similarly, electric current I 1bProvide electric current I by current mirror 75 and 76 reflections 3, be tending towards just node 74 and draw high to V CC
If the voltage at the SGNL end is lower than V REF(generally electing 0.6 volt as), electric current I so 1aLess than electric current I 1b, and the while electric current I 2Less than electric current I 3This can cause node 74 to be pulled to high level.On the contrary, if the voltage of holding at SGNL is higher than V REF, electric current I so 1aGreater than electric current I 1b, and the while electric current I 2Greater than electric current I 3This can cause node 74 to draw being low level.Therefore, node 74 surpasses V at SGNL voltage REFThe time be LOW, otherwise be HIGH.
Forward rate of change testing circuit 77 now to, constant current I 1By transistor 78,79 and 80 and current mirror 82 provide together.Electric current I 4Provide electric current I respectively by current mirror 81 and 82 reflections 5And I 6Preferably, the gain of current mirror 81 is roughly twices of current mirror 82, makes electric current I like this 5Be I 6Twice, and node 83 draws and is high level.
Electric capacity 84 has hindered any flip-flop of SGNL voltage, gives current mirror 82 and transmit alternating component.Especially, the SGNL voltage of an increase can increase the electric current of inflow current mirror 82.Simultaneously, the electric current of inflow current mirror 81 reduces, and has therefore reduced electric current I 5One of SGNL voltage enough fast positive change can cause electric current I 6Greater than I 5, and node 83 drawn be low level.Select electric capacity 84 and resistance 85 to provide the suitable sensitiveness to rate of change together, rather than to holding wire (SGNL) noise tetchiness.The suitable value of electric capacity 84 and resistance 85 is respectively 2 pico farads and 187 ohm.
Nominal pull-up current circuit 88 provides pull-up current when SGNL is stable or draws to LOW.Circuit 88 comprises current mirror 89, and its output current takes back SGNL, and its input current is arranged by transistor 90 and 91.Transistor 92 may switch to OFF by the low level of SHDN end, and isolation resistance 90, therefore reduces the input current of current mirror 89.
The sort circuit structure provides a kind of method that reduces pull-up current to a stopped status.For example, when holding wire is HIGH and keeps high level during a period of time, pull-up current can be reduced to low state, to preserve energy in the powered battery device.Preferably, pull-up circuit 88 is designed to: general pull-up current is 250mA when SHDN is HIGH, and the low-power pull-up current is 100uA when SHDN is LOW.
At last, when SGNL voltage surpassed threshold voltage (being determined by level sensitive circuit 71) and surpasses minimum positive rate of change (being determined by rate of change testing circuit 77), pull-up current improves circuit 95 provided additional pull-up current.The input of gate circuit 96 is coupled to the output of output, node 83 and the rate of change testing circuit 77 of node 74, level sensitive circuit 71.As mentioned above, in case the voltage of holding at SGNL surpasses V REF, node 74 draws and is LOW; In case it is enough big that the voltage change ratio of SGNL becomes, node 83 draws and is LOW.Have only when two inputs all are LOW, the output of gate circuit 96 just is HIGH.Therefore, when satisfying when the pull-up current situation of increase is provided, gate circuit 96 is output as HIGH.
The HIGH output of gate circuit 96 makes transistor 97 switch to OFF, transistor 98 is ON, thereby makes constant current source can comprise transistor 99 and current mirror 100.The output-parallel of current mirror 100 provides the pull-up current of increase like this to the output of current mirror 89.Preferably, the output current of current mirror 100 is 1.7mA.
In addition, the HIGH of gate circuit 96 output makes transistor 101 switch to ON.Transistor 101 provides an additional input current source to current mirror 89, and its output current is increased.Preferably, transistor 101 is 300uA for the output current of the current mirror of ON increase.Therefore, satisfied when the situation of level and voltage change ratio, that is, in the conversion of LOW to HIGH, pull-up current is increased to 2mA from 250uA, thereby reduces signal elevating time effectively,
Technical staff in this field will appreciate that and can be realized by other example that is not the present invention describes that in this explanation rather than restriction as purpose, and the present invention is only by following claim restriction.

Claims (9)

1. the active pull up circuit of an open-drain signal, it is characterized in that: the pull-up circuit on the open-drain holding wire comprises:
The circuit of monitor signal voltage on the open-drain holding wire;
The circuit of monitor signal rate of change on the open-drain holding wire;
In response to the monitoring voltage and rate of change so that the circuit of pull-up current to the open-drain line to be provided;
The circuit of restriction pull-up current in a maximum level.
2. the active pull up circuit of a kind of open-drain signal according to claim 1 is characterized in that: provide the circuit of pull-up current to comprise: first circuit, and the rate of change that is independent of monitoring provides first electric current; Second circuit provides second electric current in response to the rate of change of monitoring.
3. the active pull up circuit of a kind of open-drain signal according to claim 1, it is characterized in that: pull-up circuit comprises:
The circuit of monitoring signal voltage on the open-drain line;
The circuit of monitoring change rate signal on the open-drain line;
The rate of change that is independent of monitoring provides the circuit of first pull-up current;
The circuit of second pull-up current is provided in response to the rate of change of monitoring;
Pull-up current increases in response to surpassing threshold voltage according, and the increment of pull-up current is the function that is relevant to the level of threshold voltage;
Rate of change in response to monitoring surpasses the changes of threshold rate, and pull-up current increases.
4. the active pull up circuit of a kind of open-drain signal according to claim 1 is characterized in that: the method for biasing open-drain holding wire comprises:
Improve pull-up current and give holding wire;
Monitor signal voltage;
The rate of change of signal on the monitor signal line;
Rate of change in response to monitoring surpasses the changes of threshold rate so that extra pull-up current to be provided;
Voltage in response to monitoring surpasses threshold voltage so that extra pull-up current to be provided.
The extra pull-up current that offers holding wire is the function that is relevant to threshold voltage;
The pull-up current that provides comprises first electric current of the rate of change that is independent of monitoring, in response to second electric current of rate of change of monitoring;
When the rate of change of monitoring surpasses the changes of threshold rate, provide second electric current.
5. the active pull up circuit of a kind of open-drain signal according to claim 1 is characterized in that: the circuit of biasing open-drain holding wire comprises:
A current mirror, it contains an input and output, and output provides pull-up current to the open-drain holding wire in response to the electric current of input;
Regulate current source for one, be coupled to the input of current mirror;
A variable current source, be coupled to input and the holding wire of current mirror, its voltage in response to holding wire provides electric current to the current mirror input, variable current source comprises that the differentiator (when the rate of change of voltage on the holding wire surpasses predetermined threshold value, providing to input to current mirror) of holding wire is provided for a resistance, an input;
Only when voltage surpassed threshold voltage, variable current source provided electric current to the current mirror input;
Circuit comprises that also the restriction pull-up current surpasses the circuit of predetermined maximum value.
6. the active pull up circuit of a kind of open-drain signal according to claim 1, it is characterized in that: pull-up circuit comprises:
The method of signal voltage on the monitor signal line;
The method of change rate signal on the monitor signal line;
In response to the monitoring voltage and rate of change so that the method for pull-up current to holding wire to be provided, comprise: the rate of change that is independent of monitoring provides first mode of first electric current, rate of change in response to monitoring provides second mode of second electric current and the mode that increases by second electric current in response to signal voltage on the holding wire.
7. the active pull up circuit of a kind of open-drain signal according to claim 6, it is characterized in that: provide the method for pull-up current to comprise that the rate of change that is independent of monitoring provides first mode of first electric current, second mode of second electric current is provided in response to the rate of change of monitoring;
Also comprise the mode that increases by second electric current in response to signal voltage on the holding wire;
When voltage surpassed threshold voltage, pull-up current increased, and wherein the increment of pull-up current is the function that is relevant to threshold voltage;
When the rate of change of monitoring surpassed the changes of threshold rate, pull-up current increased.
8. the active pull up circuit of a kind of open-drain signal according to claim 1, it is characterized in that: pull-up circuit comprises:
Level sensitive circuit provides first signal in response to the voltage on the open-drain holding wire;
The rate of change testing circuit provides secondary signal in response to the rate of change on holding wire;
First current source provides pull-up current to holding wire;
Control circuit is in response to the first and second signal controlling pull-up currents.
The level monitoring circuit comprises first capacitor, and the rate of change monitoring circuit comprises that a capacitor-coupled is to second capacitor.
9. the active pull up circuit of a kind of open-drain signal according to claim 8 is characterized in that: voltage surpasses a predetermined voltage on the first signal indication holding wire, and secondary signal represents that voltage change ratio surpasses predetermined rate of change on the holding wire;
Control circuit comprises a switch, switches to ON in response to first and second signals.First current source on the holding wire comprises a resistance;
First current source on the holding wire comprises a constant current source;
Circuit also comprises second current source, provides pull-up current to holding wire in response to first and second signals;
Second current source comprises the value that reduces pull-up current in response to stopping signal.
CN2013102011152A 2013-05-27 2013-05-27 Active upward-pulling circuit of drain electrode open circuit signal Pending CN103259519A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN2013102011152A CN103259519A (en) 2013-05-27 2013-05-27 Active upward-pulling circuit of drain electrode open circuit signal

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN2013102011152A CN103259519A (en) 2013-05-27 2013-05-27 Active upward-pulling circuit of drain electrode open circuit signal

Publications (1)

Publication Number Publication Date
CN103259519A true CN103259519A (en) 2013-08-21

Family

ID=48963257

Family Applications (1)

Application Number Title Priority Date Filing Date
CN2013102011152A Pending CN103259519A (en) 2013-05-27 2013-05-27 Active upward-pulling circuit of drain electrode open circuit signal

Country Status (1)

Country Link
CN (1) CN103259519A (en)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN109075793A (en) * 2016-03-17 2018-12-21 赛灵思公司 For reducing structuring multiple selector occupied space and the system and method for improving its yield in programmable logic device
CN112650377A (en) * 2020-12-22 2021-04-13 海光信息技术股份有限公司 I2C bus pull-up power supply method, circuit and chip
CN112702176A (en) * 2020-12-22 2021-04-23 海光信息技术股份有限公司 I2C bus power supply control circuit, control method and chip

Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN85109185A (en) * 1985-01-15 1986-10-22 得克萨斯仪器公司 The adjustable accelerating circuit that is used for transistor-transistor logic circuit type door
CN1030834A (en) * 1987-06-29 1989-02-01 数字设备公司 Bus transmitter with controlled trapezoidal slew rate
US6958626B2 (en) * 2003-07-31 2005-10-25 Infineon Technologies Ag Off chip driver
CN1821925A (en) * 2004-12-14 2006-08-23 因芬尼昂技术股份公司 Method to improve current and slew rate ratio of off-chip drivers
CN101116246A (en) * 2004-12-07 2008-01-30 模拟设备股份有限公司 Self-timed switching regulator predriver

Patent Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN85109185A (en) * 1985-01-15 1986-10-22 得克萨斯仪器公司 The adjustable accelerating circuit that is used for transistor-transistor logic circuit type door
CN1030834A (en) * 1987-06-29 1989-02-01 数字设备公司 Bus transmitter with controlled trapezoidal slew rate
US6958626B2 (en) * 2003-07-31 2005-10-25 Infineon Technologies Ag Off chip driver
CN101116246A (en) * 2004-12-07 2008-01-30 模拟设备股份有限公司 Self-timed switching regulator predriver
CN1821925A (en) * 2004-12-14 2006-08-23 因芬尼昂技术股份公司 Method to improve current and slew rate ratio of off-chip drivers

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN109075793A (en) * 2016-03-17 2018-12-21 赛灵思公司 For reducing structuring multiple selector occupied space and the system and method for improving its yield in programmable logic device
CN112650377A (en) * 2020-12-22 2021-04-13 海光信息技术股份有限公司 I2C bus pull-up power supply method, circuit and chip
CN112702176A (en) * 2020-12-22 2021-04-23 海光信息技术股份有限公司 I2C bus power supply control circuit, control method and chip
CN112650377B (en) * 2020-12-22 2022-09-02 海光信息技术股份有限公司 I2C bus pull-up power supply method, circuit and chip

Similar Documents

Publication Publication Date Title
EP0973261B1 (en) Active pullup circuitry for open-drain signals
CN108880492A (en) D audio frequency amplifier and its reduction method of output-stage power consumption
CN103825461B (en) With the closely-controlled drive circuit to grid voltage
CN109067159B (en) A kind of soft start controller and load switching device of load switching device
US7705638B2 (en) Switching control circuit with reduced dead time
US11429169B2 (en) VCONN in power delivery chargers
CN101677210A (en) Switch driver with low impedance initial drive and higher impedance final drive
CN105226919A (en) A kind of soft-sphere model method of power MOSFET and circuit
US20210320630A1 (en) Output stage circuit
CN112106298A (en) Load switch with controlled slew rate
CN103066988A (en) Interface circuit and achievement method for limiting output port voltage slew rate
CN103259519A (en) Active upward-pulling circuit of drain electrode open circuit signal
KR20150105809A (en) control circuit including load switch, electronic apparatus including the load switch and controlling method thereof
CN103326315A (en) Under-voltage protection circuit and high-voltage integrated circuit
JP2013225807A (en) Signal transmission circuit, power unit and lighting device
CN105450212A (en) Output circuit and light coupling device
CN107040250A (en) A kind of voltage mode drive circuit
CN101552598B (en) Grid driving circuit for switching power transistor
CN101364797B (en) Active voltage clamping grid driver circuit
CN209948734U (en) Automatic load detection circuit
CN103501173A (en) Pull-up resistor circuit for preventing inverse current transmission and input-output port circuit
US20140266326A1 (en) Method for Reducing Overdrive Need in MOS Switching and Logic Circuit
CN112003458B (en) Access pipe control circuit, power management chip and power device
CN205178854U (en) Power MOSFET's soft drive circuit
CN209949083U (en) Power amplifier chip and radio transmitter

Legal Events

Date Code Title Description
C06 Publication
PB01 Publication
C10 Entry into substantive examination
SE01 Entry into force of request for substantive examination
C02 Deemed withdrawal of patent application after publication (patent law 2001)
WD01 Invention patent application deemed withdrawn after publication

Application publication date: 20130821