CN101552598B - Grid driving circuit for switching power transistor - Google Patents
Grid driving circuit for switching power transistor Download PDFInfo
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- CN101552598B CN101552598B CN2008100905696A CN200810090569A CN101552598B CN 101552598 B CN101552598 B CN 101552598B CN 2008100905696 A CN2008100905696 A CN 2008100905696A CN 200810090569 A CN200810090569 A CN 200810090569A CN 101552598 B CN101552598 B CN 101552598B
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- power transistor
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- 229910021420 polycrystalline silicon Inorganic materials 0.000 claims description 4
- 229920005591 polysilicon Polymers 0.000 claims description 4
- 230000000052 comparative effect Effects 0.000 claims 1
- 238000010586 diagram Methods 0.000 description 4
- 229910044991 metal oxide Inorganic materials 0.000 description 3
- 150000004706 metal oxides Chemical class 0.000 description 3
- 239000004065 semiconductor Substances 0.000 description 3
- 238000006243 chemical reaction Methods 0.000 description 2
- 230000007423 decrease Effects 0.000 description 2
- 238000000034 method Methods 0.000 description 2
- 230000007704 transition Effects 0.000 description 2
- 230000000694 effects Effects 0.000 description 1
- 230000003071 parasitic effect Effects 0.000 description 1
- 238000012797 qualification Methods 0.000 description 1
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Abstract
The invention relates to a grid driving circuit used for switching a power transistor, which comprises a transistor pair, a first conductive path and a second conductive path, wherein the transistor pair is electrically connected to a grid of the power transistor so as to control connection or disconnection of the power transistor, the first conductive path is electrically connected to the grid ofthe power transistor and the transistor pair and is provided with a fixed resistance value, and the second conductive path is electrically connected to the grid of the power transistor and the transi stor and is provided with a changeable resistance value corresponding to the change of the grid voltage of the power transistor.
Description
Technical field
The present invention relates to a kind of drive circuit, be meant a kind of transistorized drive circuit of power switched that is used for especially.
Background technology
Power transistor is applied to provide the situation of big electric current to load, therefore, determines that power transistor conducting and the order of closing are very important, to avoid causing power loss even damage because of short circuit current flows through power transistor.For example, the D class A amplifier A has comprised the output stage of being made up of a P type power transistor and a N type power transistor provides output current respectively, please refer to Fig. 1, Fig. 1 is a D class A amplifier A output circuit 10, wherein comprised an output stage 15 and gate driver circuit 30,35, output stage 15 includes a P type power transistor 20 and a N type power transistor 25, this two power transistors grid voltage is respectively by gate driver circuit 30,35 controls, gate driver circuit 30,35 P of conducting simultaneously type power transistors 20 flow to ground to avoid short circuit current from power vd D with N type power transistor 25.Output stage 15 when normal running P type power transistor 20 and N type power transistor 25 one of them be not conducting, and when change-over time (transition time), gate driver circuit 30,35 at first makes P type power transistor 20 and 25 both the neither conductings of N type power transistor, and then conducting both one of them.As a rule, can cause bigger output distortion (because two neither conductings of power transistor) long change-over time, and than causing bigger electromagnetic interference (EMI) (because load has inductance characteristic) short change-over time, one of the object of the invention be find out a kind of controlling mechanism can balance output distortion and electromagnetic interference, that is provide grid control circuit with suitable change-over time.
Fig. 2 A and Fig. 2 B are N type power transistor 25 grid voltages and the drain voltage voltage schematic diagram under very fast and slow gate voltage switches respectively among Fig. 1, well known metal oxide semiconductor transistor has parasitic capacitance in drain electrode and gate pitch, therefore as grid voltage V
GNear this transistorized critical voltage V
THThe time drain voltage V
DGrid voltage V can be risen
GCan in a period of time, keep definite value up to drain voltage V
DReach certain voltage, the total conversion time, (transition time) equaled T
1Add T
2, T
2Be proportional to T
1So the total conversion time is by T
1Decide.In Fig. 2 A, V
GWith V
DChange comparatively fast, cause the short and stronger electromagnetic interference (EMI) effect of generation change-over time; In Fig. 2 B, V
GWith V
DChange slowlyer, cause change-over time long and produce bigger output distortion, in fact, P type power transistor equally must solve identical problem.
Summary of the invention
By being, main purpose of the present invention promptly is to provide a kind of power transistor drive circuit, and this drive circuit comprises two different conductive paths makes electric current to flow out from the power transistor grid, with the change-over time between power controlling transistor turns and not conducting.
According to the embodiment of the invention, it discloses a kind of transistorized gate driver circuit of power switched that is used for, it is right that this gate driver circuit includes a transistor that is electrically connected to this power transistor grid, be electrically connected to one first right conductive path of this power transistor grid and this transistor and be electrically connected to this power transistor grid and one second conductive path that this transistor is right, to the power controlling transistor turns whether this transistor, this first conductive path has a fixed resistance value, and this second conductive path has a variable resistance that becomes with the power transistor grid voltage.
Description of drawings
Fig. 1 is D class A amplifier A output circuit figure.
Fig. 2 A and Fig. 2 B are N type power transistor grid voltage and the drain voltage voltage schematic diagram under very fast and slow gate voltage switches respectively among Fig. 1.
Fig. 3 is the circuit diagram of gate driver circuit one embodiment of the present invention.
Fig. 4 is the resistance value curve chart that a resistance and one operates in the linear zone metal oxide semiconductor transistor.
Fig. 5 is the gate voltage curve figure corresponding to N type power transistor among Fig. 3 of the present invention.
Fig. 6 is the circuit diagram of another embodiment of gate driver circuit of the present invention.
Fig. 7 is that a resistance and one operates in the transistorized resistance value curve chart of linear zone P-type mos.
Fig. 8 is the gate voltage curve figure corresponding to P type power transistor among Fig. 6 of the present invention.
[main element symbol description]
10 D class A amplifier A output circuits, 15 output stages
20 P type power transistors, 25 N type power transistors
30,35 gate driver circuits, 105,205,215 P transistor npn npns
110,115,210 N transistor npn npns, 120,220 resistance
Embodiment
See also Fig. 3, Fig. 3 is gate driver circuit one embodiment of the present invention, identical among N type power transistor 25 and Fig. 1, gate driver circuit 35 includes a transistor to (that is among the figure P transistor npn npn 105 and N transistor npn npn 110), one N transistor npn npn 115 and a resistance 120, the gate coupled of the grid of P transistor npn npn 105 and N transistor npn npn 110 and control by a control signal, (inverter) is similar to inverter, P transistor npn npn 105 and N transistor npn npn 110 conducting simultaneously or not conducting, that is another not conducting during one of them conducting, the grid of N transistor npn npn 115 and the grid that drains and be connected and be coupled to P transistor npn npn 105 and N type power transistor 25, the source electrode of N transistor npn npn 115 then is coupled to the drain electrode of N transistor npn npn 110.This configuration is biased in linear zone (linear region) with N transistor npn npn 115, therefore N transistor npn npn 115 can be considered as a variable resistor, its resistance value is by the grid voltage decision of N type power transistor 25, in simple terms, less N type power transistor 25 grid voltages can produce big resistance value in the drain electrode and the source terminal of N transistor npn npn 115, and vice versa.In addition, one fixed resistance, 120 1 ends are coupled to the grid of N type power transistor 25, the other end then is coupled with the source electrode of N transistor npn npn 115 and the drain electrode of N transistor npn npn 110, and in fact, resistance 120 is generally polysilicon (polysilicon) resistance in the IC processing procedure.
N transistor npn npn 115 electrical characteristics can be considered a variable resistor, resistance 120 then has a fixed resistance value, this the two provide two different conductive paths that the grid of N type power transistor 25 and the drain electrode of N transistor npn npn 110 are done charge or discharge, please refer to Fig. 4, Fig. 4 is the resistance value curve chart that a resistance and one operates in the linear zone metal oxide semiconductor transistor, resistance 120 in the first path presentation graphs 3, and the N transistor npn npn 115 among second path representation Fig. 3, as shown in Figure 4, as the grid voltage V of N type power transistor 25
GThe second path resistor value can increase during decline, if grid voltage V
GReduce to critical voltage value (threshold voltage) V near N transistor npn npn 115
TH, the resistance value meeting convergence infinity of N transistor npn npn 115, the resistance value in first path then keeps constant always, as grid voltage V
GEqual a reference voltage V
REFThe time this two curve can intersect, that is to say, as grid voltage V
GGreater than reference voltage V
REFThe time, the first path resistance value can be greater than the second path resistor value, and as grid voltage V
GLess than reference voltage V
REFThe time, the first path resistance value can be less than the second path resistor value, and resistance 120 provides two conductive paths to make electric current can flow to the drain electrode of N transistor npn npn 110 from the grid of N type power transistor 25 with N transistor npn npn 115.
Electric current has the physical characteristic that flows to low resistance path, therefore as grid voltage V
GGreater than reference voltage V
REFThe time, the electric current that the has major part N transistor npn npn 115 of flowing through is as grid voltage V
GLess than reference voltage V
REFThe time, the electric current that the has major part resistance 120 of flowing through please refer to Fig. 5, and Fig. 5 is the gate voltage curve figure corresponding to N type power transistor among Fig. 3 of the present invention, because Fig. 3 circuit provides two different conductive paths, grid voltage V among Fig. 5
GThe T of curve chart
1Partly be divided into T
AWith T
BTwo partly.Grid voltage V at the beginning
GBe positioned at high-voltage level, when control signal when low level fades to high level, V
GBegin to descend still still greater than reference voltage V
REF, the electric charge major part that is stored in N type power transistor 25 grids flows to N transistor npn npn 110 via the conductive path with low-resistance value (that is N transistor npn npn 115) and to ground, interval during this period of time T
AGate voltage curve as shown in Figure 5.Next grid voltage V
GContinue to drop to less than reference voltage V
REFBut near critical voltage V
THThe place stop, at T
BThe electric charge that major part remains in N type power transistor 25 grids in the interval can flow to N transistor npn npn 110 via resistance 120 rather than N transistor npn npn 115 during this period of time.Because T
1Can pass through T
AWith T
BAdjust the T among Fig. 5
1Time span is greater than the T among Fig. 2 A
1But less than the T among Fig. 2 B
1, on the other hand, T
2Then almost remain unchanged, therefore, can be controlled to change-over time find balance in electromagnetic interference problem and output signal distortion this two.
Please refer to Fig. 6, Fig. 6 is another embodiment of gate driver circuit of the present invention, identical among P type power transistor 15 and Fig. 1, gate driver circuit 30 includes a transistor to (that is among the figure P transistor npn npn 205 and N transistor npn npn 210), one P transistor npn npn 215 and a resistance 220, the gate coupled of the grid of P transistor npn npn 205 and N transistor npn npn 210 and control by a control signal, similar to inverter, P transistor npn npn 205 and N transistor npn npn 210 conducting simultaneously or not conducting, that is another not conducting during one of them conducting, the grid of P transistor npn npn 215 and the grid that drains and be connected and be coupled to N transistor npn npn 210 and P type power transistor 15, the source electrode of P transistor npn npn 215 then is coupled to the drain electrode of P transistor npn npn 205.This configuration is biased in linear zone with P transistor npn npn 215, therefore P transistor npn npn 215 can be considered as a variable resistor, its resistance value is by the grid voltage decision of P type power transistor 15, in simple terms, less P type power transistor 15 grid voltages can produce small resistance value in the drain electrode and the source terminal of P transistor npn npn 215, and vice versa.In addition, a fixed resistance 220 1 ends are coupled to the grid of P type power transistor 15, and the other end then is coupled with the source electrode of P transistor npn npn 215 and the drain electrode of P transistor npn npn 205, and in fact, resistance 220 is generally polysilicon resistance in the IC processing procedure.
P transistor npn npn 215 electrical characteristics can be considered a variable resistor resistance 220 and then have a fixed resistance value, this the two provide two different conductive paths that the grid of P type power transistor 15 and the drain electrode of P transistor npn npn 205 are done charge or discharge, please refer to Fig. 7, Fig. 7 is that a resistance and one operates in the transistorized resistance value curve chart of linear zone P-type mos, resistance 220 in the first path presentation graphs 6 and P transistor npn npn 215 among second path representation Fig. 6, as shown in Figure 7, as the grid voltage V of P type power transistor 15
GThe second path resistor value can descend during decline, if grid voltage V
GReduce to critical voltage value V near P transistor npn npn 215
TH, the resistance value meeting convergence infinity of P transistor npn npn 215, the resistance value in first path then keeps constant always, as grid voltage V
GEqual a reference voltage V
REFThe time this two curve can intersect, that is to say, as grid voltage V
GLess than reference voltage V
REFThe time, the first path resistance value can be greater than the second path resistor value, and as grid voltage V
GGreater than reference voltage V
REFThe time, the first path resistance value can be less than the second path resistor value, and resistance 220 provides two conductive paths to make electric current can flow to the drain electrode of P transistor npn npn 205 from the grid of P type power transistor 15 with P transistor npn npn 215.
Electric current has the physical characteristic that flows to low resistance path, therefore as grid voltage V
GLess than reference voltage V
REFThe time, the electric current that the has major part P transistor npn npn 215 of flowing through is as grid voltage V
GGreater than reference voltage V
REFThe time, the electric current that the has major part resistance 220 of flowing through please refer to Fig. 8, and Fig. 8 is the gate voltage curve figure corresponding to P type power transistor among Fig. 6 of the present invention, and is similar to Fig. 5 situation, the grid voltage V of P type power transistor 15
GAt time interval T
1In be not straight line because Fig. 6 circuit provides two different conductive paths, grid voltage V among Fig. 8
GThe T of curve chart
1Partly be divided into two partly.Grid voltage V at the beginning
GBe positioned at low voltage level, when control signal when high level fades to low level, V
GBeginning increases still still less than reference voltage V
REF, the electric charge major part that is stored in P type power transistor 15 grids flows to P transistor npn npn 205 via the conductive path with low-resistance value (that is P transistor npn npn 215) and to power supply, next grid voltage V
GContinue to be increased to greater than reference voltage V
REFBut near critical voltage V
THThe place stop, the electric charge that major part remains in P type power transistor 15 grids can flow to P transistor npn npn 205 via resistance 220 rather than P transistor npn npn 215.Because T
1Can pass through T
AWith T
BAdjust, and T
2Then almost remain unchanged, therefore, can be controlled to change-over time find balance in electromagnetic interference problem and output signal distortion this two.
Though the present invention discloses as above with preferred embodiment; right its is not in order to qualification the present invention, those skilled in the art, without departing from the spirit and scope of the present invention; when can doing a little change and retouching, so protection scope of the present invention is as the criterion when looking the appending claims person of defining.
Claims (10)
1. one kind is used for the transistorized gate driver circuit of power switched, and it includes:
One transistor is right, is used for controlling this power transistor conducting or not conducting;
One first conductive path, it is right to be electrically connected on this power transistor grid and this transistor, has a fixed resistance value; And
One second conductive path, it is right to be electrically connected on this power transistor grid and this transistor, has a variable resistance that changes corresponding to the power transistor grid voltage.
2. gate driver circuit as claimed in claim 1, wherein this first conductive path is a resistance element.
3. gate driver circuit as claimed in claim 2, wherein this resistance element is a polysilicon resistance.
4. gate driver circuit as claimed in claim 1, wherein this transistor is to including a P transistor npn npn and a N transistor npn npn.
5. gate driver circuit as claimed in claim 1, wherein this second conductive path is the transistor that a grid is connected with drain electrode.
6. gate driver circuit as claimed in claim 5, wherein this power transistor is a N type power transistor; This transistor is to including a P transistor npn npn and a N transistor npn npn; This first conductive path is a resistance; And this second conductive path is a N transistor npn npn.
7. gate driver circuit as claimed in claim 6, wherein this resistance one end is coupled to the grid of this N transistor npn npn in the grid, this second conductive path of this power transistor and the drain electrode of drain electrode and this P transistor npn npn of this pair of transistors; This resistance other end is coupled to the drain electrode of source electrode and this N transistor npn npn of this pair of transistors of this N transistor npn npn in this second conductive path; The grid of the grid of this P transistor npn npn of this pair of transistors and this N transistor npn npn of this pair of transistors is coupled to receive a control signal.
8. gate driver circuit as claimed in claim 5, wherein this power transistor is a P type power transistor; This transistor is to including a P transistor npn npn and a N transistor npn npn; This first conductive path is a resistance; And this second conductive path is a P transistor npn npn.
9. gate driver circuit as claimed in claim 8, wherein this resistance one end is coupled to the grid of this P transistor npn npn in the grid, this second conductive path of this power transistor and the drain electrode of drain electrode and this N transistor npn npn of this pair of transistors; This resistance other end is coupled to the drain electrode of source electrode and this P transistor npn npn of this pair of transistors of this P transistor npn npn in this second conductive path; The grid of this P transistor npn npn of this pair of transistors and this N transistor npn npn is coupled to receive a control signal.
10. gate driver circuit as claimed in claim 1, wherein the comparative result according to this a power transistor grid voltage and a reference voltage determines whether the resistance value of this second conductive path is lower than the resistance value of this first conductive path.
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| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN2008100905696A CN101552598B (en) | 2008-04-03 | 2008-04-03 | Grid driving circuit for switching power transistor |
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| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN2008100905696A CN101552598B (en) | 2008-04-03 | 2008-04-03 | Grid driving circuit for switching power transistor |
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| Publication Number | Publication Date |
|---|---|
| CN101552598A CN101552598A (en) | 2009-10-07 |
| CN101552598B true CN101552598B (en) | 2011-08-03 |
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| CN2008100905696A Active CN101552598B (en) | 2008-04-03 | 2008-04-03 | Grid driving circuit for switching power transistor |
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| Publication number | Priority date | Publication date | Assignee | Title |
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| CN105024531B (en) * | 2015-07-28 | 2017-12-01 | 英特格灵芯片(天津)有限公司 | A kind of DV/DT detections and protection device and method |
| CN105356727B (en) * | 2015-11-27 | 2018-11-27 | 矽力杰半导体技术(杭州)有限公司 | Switching tube drive control method and control circuit for Switching Power Supply |
| JP7106931B2 (en) * | 2018-03-28 | 2022-07-27 | セイコーエプソン株式会社 | Constant current circuit, semiconductor device, electronic device, and method for manufacturing semiconductor device |
| CN109546845A (en) * | 2018-12-29 | 2019-03-29 | 华羿微电子股份有限公司 | Based on the series-parallel electronic load circuit of MOSFET and fixed resistance |
| TWI785469B (en) * | 2020-01-20 | 2022-12-01 | 即思創意股份有限公司 | Power transistor module and controlling method thereof |
Citations (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN1950994A (en) * | 2004-05-11 | 2007-04-18 | 罗姆股份有限公司 | PWM driver circuit |
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Patent Citations (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN1950994A (en) * | 2004-05-11 | 2007-04-18 | 罗姆股份有限公司 | PWM driver circuit |
Non-Patent Citations (1)
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|---|
| JP特开2003-199326A 2003.07.11 |
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| CN101552598A (en) | 2009-10-07 |
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