CN103258859B - A kind of indium oxide thin film transistor and preparation method thereof - Google Patents

A kind of indium oxide thin film transistor and preparation method thereof Download PDF

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CN103258859B
CN103258859B CN201310195082.5A CN201310195082A CN103258859B CN 103258859 B CN103258859 B CN 103258859B CN 201310195082 A CN201310195082 A CN 201310195082A CN 103258859 B CN103258859 B CN 103258859B
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film transistor
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magnetron sputtering
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CN103258859A (en
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张希清
李彬
王海龙
周东站
彭云飞
高耸
衣立新
王永生
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Beijing Jiaotong University
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Abstract

A kind of indium oxide thin film transistor and preparation method thereof, relates to a kind of transparent film transistor.Solve the problem that thin film transistor (TFT) mobility is low.The channel layer of this thin film transistor (TFT) is InZnxLiyNzO;InZnxLiyNzThe target of O includes In2O3、ZnO、Li2O and Zn3N2, 0 < x≤2,0 < y≤0.1,0 < Z≤0.1, thickness is 20~60nm.Preparing channel layer with magnetron sputtering method, sputtering power is 70~200W, and oxygen/argon pressure ratio is 0~40%, and growth temperature is room temperature~500 DEG C, and annealing temperature is 350~500 DEG C or 760~960 DEG C.This thin film transistor (TFT) is mainly used in flat pannel display and transparent circuitry.

Description

A kind of indium oxide thin film transistor and preparation method thereof
Technical field
The invention belongs to electronic information field, relate to a kind of indium oxide thin film transistor, mainly for generation of the thin film transistor (TFT) of low cost, high mobility.
Background technology
The fields such as thin film transistor (TFT) (TFT) shows in information, transparent circuitry have a wide range of applications.High performance thin film transistor (TFT) backplane technology is basic technology and the core technology of the novel flat-plate display industries such as TFT-LCD, AMOLED, is also the Key Common Technologies of this industry, is improve product quality, reduces the important step of production cost.Along with modern displays to high-resolution, ultra high-definition, at a high speed, the fast development that shows of high frequency drive circuit, large scale, 3D and Large Copacity, the requirement of TFT is more and more higher, it is desirable to TFT has that mobility is big, current on/off ratio is big, aperture opening ratio is big, threshold voltage shift is little, preparation technology cheap and simple, easy large-area manufacturing and the feature such as integrated.Existing amorphous silicon film transistor (a-SiTFT) is due to the relatively low (0.5cm of its mobility2/ Vs), it is impossible to realize high-resolution and display at a high speed, increasingly can not meet the demand in market.
Metal-oxide TFT is that extremely industry is paid close attention to and obtains the new technique greatly developed in recent years.Be recently reported successfully develop a-IGZOTFT, a-IZOTFT, a-ZTOTFT, a-HIZOTFT and ZLOTFT, transparent TFT and the a-SiTFT of these non-crystal oxides compares has the big (> 10cm of mobility2/ Vs), visible transparent, aperture opening ratio is high, growth temperature is relatively low, preparation technology cheap and simple, easy large-area manufacturing, advantages of environment protection, thus becomes the study hotspot in electronics.
Although both at home and abroad the research of metal-oxide TFT being achieved significant progress, its mobility > 10cm2/ Vs, at least big 20 times than a-SiTFT, but still can not meet the requirement of the display such as 3D, mobility needs to be improved further.The research of the oxidic transparent TFT of high mobility, will have very important significance to the economic construction of China, social development and national security.
Summary of the invention
The technical problem to be solved is, solves the problem that thin film transistor (TFT) mobility is low.The manufacture method of a kind of indium oxide thin film transistor is provided.
This invention address that the technical scheme of its technical problem:
A kind of indium oxide thin film transistor, this thin film transistor (TFT) includes the end or the top-gated electrode structure that substrate, insulating barrier, channel layer, protection passivation layer, grid, source electrode and drain electrode etc. are constituted.
Described channel layer is InZnxLiyNzO;
InZnxLiyNzThe target of O includes In2O3、ZnO、Li2O and Zn3N2, 0 < x≤2,0 < y≤0.1,0 < Z≤0.1, thickness is 20~60nm.
Described insulating barrier is SiO2、HfO2、ZrO2Or Al2O3, thickness is 60~300nm.
A kind of indium oxide thin film transistor manufacture method, the step of the method includes:
Step one prepares hearth electrode on substrate, is then placed in magnetron sputtering, carries out pretreatment;
Step 2 prepares insulating barrier on hearth electrode prepared by step one, and its thickness is 60~300nm;
SiO is prepared with sputtering method2、HfO2、ZrO2Or Al2O3Insulating barrier, its power is 70~200W, and oxygen/argon pressure ratio is 0~40%, and growth temperature is room temperature~500 DEG C;
Or prepare SiO with PECVD2、HfO2、ZrO2Or Al2O3Insulating barrier;
Or prepare SiO with thermal oxidation method2Insulating barrier;
Step 3 prepares channel layer
Step 4 magnetron sputtering method prepares SiO2Or Al2O3, thickness is the protection passivation layer of 0~300nm;
Or prepare SiO with PECVD2Or Al2O3Protection passivation layer;
Step 5 magnetron sputtering method or thermal evaporation prepare electrode, produce thin film transistor (TFT);
Described step 3 prepares channel layer;
Channel layer materials adopts InZnxLiyNzDuring O, prepare InZn with magnetron sputtering methodxLiyNzThe channel layer of O, thickness is 20~60nm, 0 < x≤2,0 < y≤0.1,0 < Z≤0.1, sputtering power is 70~200W, and oxygen/argon pressure ratio is 0~40%, and growth temperature is room temperature~500 DEG C, and annealing temperature is 350~500 DEG C, and annealing temperature is 760~960 DEG C;
Beneficial effects of the present invention:
The channel layer InZn of the thin film transistor (TFT) of the present inventionxLiyNzO material, uses SiO2Make insulating barrier with high-g value, solve the problem that thin film transistor (TFT) mobility is low, produce InZnxLiyNzO thin film transistor (TFT), its processing technology is simple, cost is low.
Accompanying drawing explanation
Fig. 1 is InZnxLiyNzThe output characteristic curve of O thin film transistor (TFT).
Fig. 2 is InZnxLiyNzThe transfer characteristic curve of O thin film transistor (TFT).
Detailed description of the invention
A kind of indium oxide thin film transistor, this thin film transistor (TFT) includes the end or the top-gated electrode structure that substrate, insulating barrier, channel layer, protection passivation layer and electrode are constituted.
Described channel layer is InZnxLiyNzO。
InZnxLiyNzThe target of O includes In2O3、ZnO、Li2O and Zn3N2, 0 < x≤2,0 < y≤0.1,0 < Z≤0.1, thickness is 20~60nm;
Described insulating barrier is SiO2、HfO2、ZrO2Or Al2O3, thickness is 60~300nm.
Described protection passivation layer is SiO2Or Al2O3, thickness is 0~300nm.
Described substrate is ito glass or Si.
A kind of indium oxide thin film transistor manufacture method one, the step of this manufacture method includes:
Step one prepares ITO bottom-gate on a glass substrate, is then placed in magnetron sputtering, carries out pretreatment;
Step 2 prepares insulating barrier in bottom-gate prepared by step one, uses sputtering power 70W, and oxygen argon pressure ratio is 40%, and growth temperature is at 500 DEG C, and growth insulating barrier is HfO2, thickness is 60nm;
Step 3 magnetron sputtering method prepares InZnxLiyNzO channel layer, thickness is 20nm, x=2, y=0.1, Z=0.1, and sputtering power is 70W, and oxygen/argon pressure ratio is 40%, and growth temperature is 500 DEG C, and annealing temperature is 960 DEG C;
Step 4 magnetron sputtering method prepares Al2O3, thickness is the protection passivation layer of 100nm.
Step 5 magnetron sputtering method prepares Ti/Au source electrode and drain electrode, and thickness is 100nm;
Produce ITO/HfO2/InZnxLiyNzO/Al2O3The indium oxide thin film transistor of/Ti/Au bottom gate configuration.
A kind of indium oxide thin film transistor manufacture method two, the step of this manufacture method includes:
Step one on a si substrate, prepares SiO with thermal oxidation method2Insulating barrier, its thickness is 300nm;
The insulating barrier that step 2 is prepared on step one Si substrate, puts in magnetron sputtering, carries out pretreatment;
Step 3 prepares InZn with magnetron sputtering method on the insulating layerxLiyNzO channel layer, thickness is 30nm, x=1, y=0.01, Z=0, and sputtering power is 100W, and oxygen/argon pressure ratio is 0%, and growth temperature is room temperature, and annealing temperature is 900 DEG C;
Al source electrode, drain electrode and bottom-gate are prepared in step 4 thermal evaporation, and thickness is about 150nm;
Produce Al/Si/SiO2/InZnxLiyNzThe indium oxide thin film transistor of O/Al bottom gate configuration.
By the InZn that above-mentioned manufacture method two makesxLiyNzO thin film transistor (TFT), its transfer characteristic curve is as shown in Figure 1.As seen from Figure 1, on-off ratio reaches 4.1*107.Its output characteristic curve is as in figure 2 it is shown, being obtained mobility by Fig. 2 is 51.8cm2/Vs。
A kind of indium oxide thin film transistor manufacture method three, the step of this manufacture method includes:
Step one prepares ITO source electrode and drain electrode on a glass substrate, is then placed in magnetron sputtering, carries out pretreatment;
Step 2 magnetron sputtering method prepares InZnxLiyNzO channel layer, thickness is 60nm, x=1, y=0, Z=0.01 sputtering power 200W, and oxygen argon pressure ratio is 20%, and growth temperature is 450 DEG C, and annealing temperature is 830 DEG C;
Step 3 sputtering power 200W, oxygen argon pressure ratio is 0%, and growth temperature is at 200 DEG C, and growth insulating barrier is Al2O3, thickness is 80nm;
Step 4 magnetron sputtering GZO grid, thickness is 300nm;
Produce ITO/InZnxLiyNzO/Al2O3The thin film transistor (TFT) of/GZO top-gated electrode structure.
A kind of indium oxide thin film transistor manufacture method four, the step of this manufacture method includes:
Step one prepares ITO bottom-gate on a glass substrate, is then placed in magnetron sputtering, carries out pretreatment;
Step 2 sputtering power 150W, oxygen argon pressure ratio is 10%, and growth temperature is 350 DEG C, and growth insulating barrier is ZrO2, thickness is 150nm;
Step 3 magnetron sputtering method prepares InZnxLiyNzO channel layer, thickness is 35nm, x=0, y=0.01, Z=0.01, sputtering power 150W, and oxygen argon pressure ratio is 0%, and growth temperature is 400 DEG C, and annealing temperature is 760 DEG C;
Step 4 magnetron sputtering method prepares SiO2, thickness is the protection passivation layer of 300nm.
Step 5 magnetron sputtering GZO grid, thickness is 200nm;
Produce ITO/ZrO2/InZnxLiyNzO/SiO2The thin film transistor (TFT) of/GZO top-gated electrode structure.
A kind of indium oxide thin film transistor manufacture method five, the step of this manufacture method includes:
Step one prepares ITO bottom-gate on a glass substrate, is then placed in magnetron sputtering, carries out pretreatment;
Step 2 prepares insulating barrier in bottom-gate prepared by step one, uses sputtering power 200W, and oxygen argon pressure ratio is 0%, and growth temperature is under room temperature, and growth insulating barrier is ZrO2, thickness is 70nm;
Step 3 magnetron sputtering method prepares InZnxLiyNzO channel layer, thickness is 20nm, x=0.5, y=0, Z=0.01, and sputtering power is 70W, and oxygen/argon pressure ratio is 40%, and growth temperature is 200 DEG C, and annealing temperature is 500 DEG C.
Step 4 PECVD prepares SiO2, thickness is the protection passivation layer of 300nm.
Step 5 magnetron sputtering method prepares Ti/Au source electrode and drain electrode, and thickness is 100nm;
Produce ITO/ZrO2/InZnxLiyNzO/SiO2The indium oxide thin film transistor of/Ti/Au bottom gate configuration.
A kind of indium oxide thin film transistor manufacture method six, the step of this manufacture method includes:
Step one prepares ITO bottom-gate on a glass substrate, is then placed in magnetron sputtering, carries out pretreatment;
Step 2 prepares SiO with PECVD in bottom-gate prepared by step one2Insulating barrier, thickness is 150nm;
Step 3 magnetron sputtering method prepares InZnxLiyNzO channel layer, thickness is 30nm, x=0.5, y=0.01, Z=0, and sputtering power is 100W, and oxygen/argon pressure ratio is 0%, and growth temperature is 100 DEG C, and annealing temperature is 450 DEG C.
Step 4 magnetron sputtering method prepares Al2O3, thickness is the protection passivation layer of 200nm.
Step 5 magnetron sputtering method prepares Ti/Au source electrode and drain electrode, and thickness is 150nm;
Produce ITO/SiO2/InZnxLiyNzO/Al2O3The indium oxide thin film transistor of/Ti/Au bottom gate configuration.
A kind of indium oxide thin film transistor manufacture method seven, the step of this manufacture method includes:
Step one prepares ITO source electrode and drain electrode on a glass substrate, is then placed in magnetron sputtering, carries out pretreatment;
Step 2 magnetron sputtering method prepares InZnxLiyNzO channel layer, thickness is 60nm, x=0.5, y=0.01, Z=0.01, and sputtering power is 100W, and oxygen/argon pressure ratio is 0%, and growth temperature is 350 DEG C, and annealing temperature is 350 DEG C.
Source electrode that step 3 is prepared in step one and drain electrode prepare SiO with PECVD2Insulating barrier, thickness is 150nm;
Step 4 magnetron sputtering method prepares Ti/Au grid, and thickness is 100nm;
Produce ITO/InZnxLiyNzO/SiO2The indium oxide thin film transistor of/Ti/Au top-gated electrode structure.
A kind of indium oxide thin film transistor manufacture method eight, the step of this manufacture method includes:
Step one prepares ITO bottom-gate on a glass substrate, is then placed in magnetron sputtering, carries out pretreatment;
Source electrode that step 2 is prepared in step one and drain electrode prepare SiO with PECVD2Insulating barrier, thickness is 150nm;
Step 3 magnetron sputtering method prepares InZnxLiyNzO channel layer, thickness is 60nm, x=0, y=0.01, Z=0.01, and sputtering power is 100W, and oxygen/argon pressure ratio is 0%, and growth temperature is 300 DEG C, and annealing temperature is 450 DEG C.
Step 4 magnetron sputtering method prepares ITO source electrode and drain electrode, and thickness is 150nm;
Produce ITO/SiO2/InZnxLiyNzThe indium oxide thin film transistor of O/ITO bottom gate configuration.
When channel layer is InZnxLiyNzDuring O, its target is In2O3、ZnO、Li2O and Zn3N2, 0 < x≤2,0 < y≤0.1,0 < Z≤0.1, prepare in target company.

Claims (1)

1. an indium oxide thin film transistor manufacture method, the step of the method includes:
Step one prepares hearth electrode on substrate, is then placed in magnetron sputtering, carries out pretreatment;
Step 2 prepares insulating barrier on hearth electrode prepared by step one, and its thickness is 60~300nm, wherein
SiO is prepared with sputtering method2、HfO2、ZrO2Or Al2O3Insulating barrier, its power is 70~200W, and oxygen/argon pressure ratio is 0~40%, and growth temperature is room temperature~500 DEG C;
Or prepare SiO with PECVD2Or HfO2Or ZrO2Or Al2O3Insulating barrier;
Or prepare SiO with thermal oxidation method2Insulating barrier;
Step 3 prepares channel layer;
Step 4 magnetron sputtering method prepares SiO2Or Al2O3, thickness is the protection passivation layer of 0~300nm;
Or prepare SiO with PECVD2Or Al2O3Protection passivation layer;
Step 5 magnetron sputtering method or thermal evaporation prepare electrode, produce thin film transistor (TFT);
It is characterized in that:
Described step 3 prepares channel layer:
InZn is prepared with magnetron sputtering methodxLiyNzThe channel layer of O, thickness is 20~60nm, 0 < x≤2,0 < y≤0.1,0 < Z≤0.1, sputtering power is 70~200W, and oxygen/argon pressure ratio is 0~40%, and growth temperature is room temperature~500 DEG C, and annealing temperature is 350~500 DEG C or 760~960 DEG C.
CN201310195082.5A 2013-05-23 2013-05-23 A kind of indium oxide thin film transistor and preparation method thereof Active CN103258859B (en)

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