CN103248221B - Step-down controller - Google Patents
Step-down controller Download PDFInfo
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- CN103248221B CN103248221B CN201210027568.3A CN201210027568A CN103248221B CN 103248221 B CN103248221 B CN 103248221B CN 201210027568 A CN201210027568 A CN 201210027568A CN 103248221 B CN103248221 B CN 103248221B
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Abstract
A kind of step-down controller, comprise translation circuit, zero-crossing comparator, current comparator, voltage comparator and PFM control circuit, described translation circuit comprises switching tube Q1 that input is connected with power supply, output is connected with described switching tube Q1 output and the inductance L that the switching tube Q2 of input end grounding, one end are connected with described switching tube Q1 output, one end are connected the electric capacity C of other end ground connection and are connected in parallel on the resistance R1 at described electric capacity C two ends with described inductance L; Comparative result is inputted described PFM control circuit and controls by described voltage comparator, zero-crossing comparator, current comparator; The comparative result output control switch pipe Q1 of PFM control circuit according to described voltage comparator, current comparator and zero-crossing comparator and the control signal of switching tube Q2 break-make.Above-mentioned step-down controller, by adopting the inner digital signal produced as control signal, adopts dynamic part to turn off strategy, effectively reduces system loss in PFM control circuit.
Description
[technical field]
The present invention relates to electronic circuit field, particularly relate to a kind of step-down controller.
[background technology]
Growing along with integrated circuit technology, integrated circuit component is more and more miniaturized, make the integrated level of integrated circuit more and more higher, MOS type field effect transistor (metal-oxide-semiconductor) can puncture by voltage too high in integrated circuits, light then circuit does not work, heavy then damage whole circuit, therefore need the higher direct voltage provided in the external world to be reduced to lower direct voltage for integrated circuit operation.Suitable supply power voltage can not only Protective IC, can effectively reduce the power consumption of whole system simultaneously.
Being applied to the system of biomedical engineering, is all generally battery or lithium battery power supply, and requires features such as having portability, can work long hours.This just requires, the DC-DC electric pressure converter being applied to biomedical engineering system needs to have low-power consumption, high efficiency feature.
The power management DC-DC that can be used for portable medical device comprises: 1, low pressure difference linearity stabilized voltage power supply (Low Drop Output, LDO); 2, switching capacity translation circuit (Switched Capacitor Converter); 3, type switching power DC-DC.
LDO has ultralow output voltage noise, and this is its sharpest edges, but the shortcoming of LDO linear stabilized power supply is when to be voltage difference between input voltage and output voltage larger, and the loss on Correctional tube is large, cause efficiency very low.
The dc-dc load capacity of switched capacitor is poor, also inapplicable in the situation of relatively heavy load.In addition, due in modern microelectronics process, the resistance be integrated in chip is generally no more than 500K Ω, electric capacity is no more than 50pF, if this is because integrated resistor or integrated capacitance exceed these values, they non-linear by greatly damaging the performance of circuit, loses more than gain.In view of feature specific to switching capacity: electric capacity is large, this feature application of switching capacity is had certain limitation.
Traditional type switching power dc-dc comprises pulse width modulation (Pulse-Width Modulation, PWM) control mode, or pulse width modulation and pulse frequency modulated (Pulse-Frequency Modulation, PFM) hybrid modulation (PWM/PFM) mode.
In PWM control mode, because switching power tube and rectifying tube are in switch transition state always, and frequency is general all higher, reach a few MHz, thus produce very large switching loss, cause great system power dissipation to lose, in underloading situation, efficiency declines rapidly.Be unfavorable for the power management request of biomedical engineering field.And the complicated structure required for PFM control method, need extra negative delay, module etc. occurs monostable trigger signal (one-shot), more module easily causes system unstable, easily shakes, and produces extra power consumption loss.
[summary of the invention]
Based on this, low for traditional step-down conversion regime efficiency, and produce the problem of extra power consumption loss, be necessary the step-down controller that a kind of low power consumption high efficiency is provided.
A kind of step-down controller, comprises translation circuit, zero-crossing comparator, current comparator, voltage comparator and PFM control circuit
The inductance L that the switching tube Q2 that described translation circuit comprises switching tube Q1 that input is connected with power supply, output is connected input end grounding with described switching tube Q1 output, one end are connected with described switching tube Q1 output, one end are connected the electric capacity C of other end ground connection and are connected in parallel on the resistance R1 at described electric capacity C two ends with described inductance L;
The inverting input of described voltage comparator is connected to node, normal phase input end input reference voltage between described inductance L and described electric capacity C, and comparative result is inputted described PFM control circuit;
The current peak that normal phase input end is connected with the input of described switching tube Q1, inverting input inputs described inductance L of described current comparator, and comparative result is inputted described PFM control circuit;
The normal phase input end of described zero-crossing comparator is connected with described switching tube Q1 output, reverse inter-input-ing ending grounding, and comparative result is inputted described PFM control circuit;
The comparative result output control switch pipe Q1 of described PFM control circuit according to described voltage comparator, current comparator and zero-crossing comparator and the control signal of switching tube Q2 break-make.
Preferably, described current comparator comprises positive current mirror module, negative-phase sequence curent mirror module, wherein,
The electric current I of described current comparator normal phase input end input
in+ the electric current I that inputs through described positive current mirror module mirror image and described current comparator inverting input
in-be mirrored to same node a through described negative-phase sequence curent mirror module;
If I
in+ be greater than I
in-, then the voltage of described node a is driven high and exports high level at described current comparator output;
If I
in+ be less than I
in-, then the voltage of described node a is dragged down in described current comparator output output low level.
Preferably, described positive current mirror module comprises the first current mirror, the second current mirror, wherein,
First current mirror comprises N-channel MOS pipe NMOS1, metal-oxide-semiconductor NMOS2, metal-oxide-semiconductor NMOS3, metal-oxide-semiconductor NMOS4 and resistance R2, wherein,
Described metal-oxide-semiconductor NMOS1 drains through described resistance R2 access electric current I
in+, grid accesses electric current I after being connected with described metal-oxide-semiconductor NMOS2 grid
in+, source electrode drains with described metal-oxide-semiconductor NMOS3 and is connected, drain with described metal-oxide-semiconductor NMOS1 after the grid of described metal-oxide-semiconductor NMOS3 is connected with described metal-oxide-semiconductor NMOS4 grid be connected, source electrode and described metal-oxide-semiconductor NMOS4 source ground, described metal-oxide-semiconductor NMOS4 drain electrode is connected with described metal-oxide-semiconductor NMOS2 source electrode, and described metal-oxide-semiconductor NMOS2 drain electrode is connected with described second current mirror;
Second current mirror comprises P channel MOS tube PMOS1, metal-oxide-semiconductor PMOS2, metal-oxide-semiconductor PMOS3, metal-oxide-semiconductor PMOS4 and resistance R3, wherein,
Through described resistance R3, described metal-oxide-semiconductor PMOS1 source electrode connects that described metal-oxide-semiconductor NMOS2 drains, grid accesses after being connected with described metal-oxide-semiconductor PMOS2 grid that described metal-oxide-semiconductor NMOS2 drains, draining is connected with described metal-oxide-semiconductor PMOS3 source electrode, be connected with described metal-oxide-semiconductor PMOS1 source electrode after the grid of described metal-oxide-semiconductor PMOS3 is connected with described metal-oxide-semiconductor PMOS4 grid, draining to drain with described metal-oxide-semiconductor PMOS4 is connected, described metal-oxide-semiconductor PMOS4 source electrode drains with described metal-oxide-semiconductor PMOS2 and is connected, and described metal-oxide-semiconductor PMOS2 source electrode exports positive image current.
Preferably, described negative-phase sequence curent mirror module comprises N-channel MOS pipe NMOS5, metal-oxide-semiconductor NMOS6, metal-oxide-semiconductor NMOS7, metal-oxide-semiconductor NMOS8 and resistance R4, wherein,
Described metal-oxide-semiconductor NMOS5 drains through described resistance R4 access electric current I
in-, grid accesses electric current I after being connected with described metal-oxide-semiconductor NMOS6 grid
in-, source electrode drains with described metal-oxide-semiconductor NMOS7 and is connected, to drain with described metal-oxide-semiconductor NMOS5 after described metal-oxide-semiconductor NMOS7 grid is connected with described metal-oxide-semiconductor NMOS8 grid be connected, source electrode and described metal-oxide-semiconductor NMOS8 source ground, described metal-oxide-semiconductor NMOS8 drain electrode is connected with described metal-oxide-semiconductor NMOS6 source electrode, and the anti-phase image current of described metal-oxide-semiconductor NMOS6 drain electrode output is connected with described metal-oxide-semiconductor PMOS2 source electrode and exports positive image current and meet.
Preferably, described current comparator also comprises the first inverter, the second inverter, wherein,
Described first inverter comprises P channel MOS tube PMOS5, N-channel MOS pipe NMOS9, described metal-oxide-semiconductor PMOS5 drain to drain with described metal-oxide-semiconductor PMOS4 be connected, source electrode drain with described metal-oxide-semiconductor NMOS9 be connected, grid is connected with described metal-oxide-semiconductor NMOS9 grid and accesses described node a afterwards;
Described second inverter comprises P channel MOS tube PMOS6, N-channel MOS pipe NMOS10, described metal-oxide-semiconductor PMOS6 drain to drain with described metal-oxide-semiconductor PMOS5 be connected, grid be connected with described metal-oxide-semiconductor NMOS10 grid be connected with described metal-oxide-semiconductor PMOS5 source electrode afterwards, source electrode and the described metal-oxide-semiconductor NMOS10 node b be connected that drains is described current comparator output.
Preferably, described PFM control module comprises and door, the first not gate, the second not gate or door, NOR gate and rest-set flip-flop, wherein,
Described with door two input respectively with the output of described voltage comparator and the output of zero-crossing comparator is connected, output is held with the R of described rest-set flip-flop and is connected, described or door one input is connected with the output of described voltage comparator through described first not gate, another input is connected with described current comparator output, output is held with the S of described rest-set flip-flop and is connected, the described input of the first not gate is connected with the output of voltage comparator, output with or door one input be connected;
The Q end of described rest-set flip-flop exports break-make control signal through drive unit drives to control described switching tube Q1 break-make;
The Q end of described rest-set flip-flop is connected with described NOR gate one input through described second not gate, and another input of described NOR gate is connected with the output of described zero-crossing comparator, output exports break-make control signal through drive unit drives to control described switching tube Q2 break-make.
Preferably, also comprise current detection circuit, described current comparator normal phase input end is connected through the input of described current detection circuit with described switching tube Q1.
Preferably, described current detection circuit comprises P channel MOS tube PMOS7, metal-oxide-semiconductor PMOS8 and amplifier, wherein,
Described switching tube Q1 is P channel power MOS pipe, described switching tube Q2 is N raceway groove rectification metal-oxide-semiconductor, described metal-oxide-semiconductor PMOS7 and described power MOS pipe leak common grid altogether and are connected, described metal-oxide-semiconductor PMOS7 source electrode is connected with described amplifier one input, another input of described amplifier drains with described metal-oxide-semiconductor PMOS8 and described power MOS pipe source electrode is connected, output is connected with described metal-oxide-semiconductor PMOS8 grid, described metal-oxide-semiconductor PMOS8 source electrode output detections electric current.
Preferably, also comprise band-gap reference, described voltage comparator is hysteresis comparator, and described band-gap reference is connected with described hysteresis comparator normal phase input end.
Preferably, also comprise divider resistance R5 and divider resistance R6, described hysteresis comparator normal phase input end is connected to node between described inductance L and described electric capacity C, through described divider resistance R6 ground connection through described divider resistance R5.
Above-mentioned step-down controller detects inductance L electric current by current comparator and whether arrives peaking, thus send a signal to the closedown of PFM control circuit control switch pipe Q1, whether the drain voltage of zero-crossing comparator sense switch pipe Q1 is negative, thus detect that whether inductance L electric current is reverse, send a signal to the closedown of PFM control circuit control switch pipe Q2, thus prevent energy to flow to ground from electric capacity C, cause meaningless power consumption penalty.Adopt the inner digital signal produced as control signal, thus eliminate the control module such as extra negative delay, monostable trigger signal, improve the stability of circuit, reduce circuit structure complexity and power consumption.Meanwhile, adopt dynamic part to turn off strategy in PFM control circuit, effectively reduce system loss, improve efficiency.
[accompanying drawing explanation]
Fig. 1 is the structured flowchart of step-down controller;
Fig. 2 is the schematic diagram of the step-down controller in preferred embodiment;
Fig. 3 is the schematic diagram of the current comparator in preferred embodiment;
Fig. 4 is the schematic diagram of the current detection circuit in preferred embodiment;
Fig. 5 is the schematic diagram of the voltage comparator in preferred embodiment;
Fig. 6 is the inductive current I under step-down controller continuous mode
lwith the control signal of switching tube Q1 and switching tube Q2;
Fig. 7 is input as V for working as
induring=5V, output voltage V
outwith inductive current I
lsimulation waveform;
Fig. 8 is input as V for working as
induring=3.5V, output voltage V
outwith inductive current I
lsimulation waveform;
Fig. 9 is input as step voltage V
in=6V to V
insimulation waveform during=3.5V;
Figure 10 is load current is step current I
load=0mA to I
loadoutput waveform during=24mA;
The efficiency curve of Figure 11 when to be load current change to 10mA from 0.
[embodiment]
In order to make object of the present invention, technical scheme and advantage clearer, below in conjunction with drawings and Examples, the present invention is described in more detail.Should be appreciated that specific embodiment described herein only in order to explain the present invention, be not intended to limit the present invention.
As shown in Figure 1, a kind of step-down controller, comprises translation circuit 100, current comparator 200, zero-crossing comparator 300, voltage comparator 400 and PFM control circuit 500.
Translation circuit 100 comprises switching tube Q1 that input is connected with power supply, output is connected with switching tube Q1 output and the inductance L that the switching tube Q2 of input end grounding, one end are connected with switching tube Q1 output, one end are connected the electric capacity C of other end ground connection and are connected in parallel on the resistance R1 at electric capacity C two ends with inductance L.In the present embodiment, switching tube Q1 is P channel MOS tube, and switching tube Q2 is N-channel MOS pipe.In other embodiments, switching tube Q1, switching tube Q2 can be replaced by controllable type switching devices such as IGBT (Insulated Gate Bipolar Translator, insulated gate gate transistors).Translation circuit 100 is buck circuit (BuckChopper), it is a kind of DC chopper of input and output voltage being carried out to decompression transformation, namely output voltage is lower than input voltage, because it has superior transformation function, therefore can be directly used in the place needing direct step-down.
As shown in Figure 2, the current peak I that the normal phase input end of current comparator 200 is connected with the input of switching tube Q1, inverting input inputs inductance L
peak, and by comparative result V
ieinput PFM control circuit 500.Current comparator 200 detects inductive current I
lwhether arrive peak I
peak, thus utilize the closedown of PFM control circuit 500 control switch pipe Q1.
The normal phase input end of zero-crossing comparator 300 is connected with switching tube Q1 output, reverse inter-input-ing ending grounding, and by comparative result V
invinput PFM control circuit 500.The output voltage V of zero-crossing comparator 300 sense switch pipe Q1
swwhether be negative, thus inspection judge that whether the electric current of inductance L is reverse, and closing switch pipe Q2, thus prevent energy to flow to ground from electric capacity C, cause meaningless power consumption penalty.
The inverting input of voltage comparator 400 is connected to node, normal phase input end input reference voltage V between inductance L and electric capacity C
ref, and comparative result is inputted PFM control circuit 500.In the present embodiment, voltage comparator 400 is preferably hysteresis comparator, and band-gap reference 700 is connected for voltage comparator 400 provides reference voltage V with hysteresis comparator normal phase input end
ref.
The comparative result output control switch pipe Q1 of PFM control circuit 500 according to current comparator 200, zero-crossing comparator 300 and voltage comparator 400 and the control signal of switching tube Q2 break-make.
PFM control module 500 comprises and door, the first not gate, the second not gate or door, NOR gate and rest-set flip-flop M.
With door two input respectively with the output of voltage comparator 400 and the output of zero-crossing comparator 300 is connected, output to be held with the R of rest-set flip-flop M and is connected, or through the first not gate, door one input to be connected with the output of voltage comparator 400 that another input is connected with current comparator 200 output, output is held with the S of rest-set flip-flop M and is connected, the input of the first not gate is connected with the output of voltage comparator 400, output with or door one input be connected.
The Q end of rest-set flip-flop M exports break-make control signal PFM_P and drives with control switch pipe Q1 break-make through driver element 502.The Q end of rest-set flip-flop M connects through the second not gate AND OR NOT gate one input, and another input of NOR gate is connected with the output of zero-crossing comparator 300, output exports break-make control signal PFM_N and drives with control switch pipe Q2 break-make through driver element 502.
As shown in Figure 3, in the present embodiment, current comparator 200 comprises positive current mirror module 210, negative-phase sequence curent mirror module 220, first inverter 230 and the second inverter 240.
The electric current I of current comparator 200 normal phase input end input
in+ the electric current I that inputs through positive current mirror module 210 mirror image and current comparator 200 inverting input
in-(inductance peak current I
peak) be mirrored to same node a through negative-phase sequence curent mirror module 220;
Positive current mirror module 210 comprises the first current mirror 202 and the second current mirror 204.
First current mirror 202 comprises N-channel MOS pipe NMOS1, metal-oxide-semiconductor NMOS2, metal-oxide-semiconductor NMOS3, metal-oxide-semiconductor NMOS4 and resistance R2.
Metal-oxide-semiconductor NMOS1 drains through resistance R2 access electric current I
in+, grid accesses electric current I after being connected with metal-oxide-semiconductor NMOS2 grid
in+, source electrode drains with metal-oxide-semiconductor NMOS3 and is connected, drain with metal-oxide-semiconductor NMOS1 after the grid of metal-oxide-semiconductor NMOS3 is connected with metal-oxide-semiconductor NMOS4 grid be connected, source electrode and metal-oxide-semiconductor NMOS4 source ground, metal-oxide-semiconductor NMOS4 drain electrode is connected with metal-oxide-semiconductor NMOS2 source electrode, and metal-oxide-semiconductor NMOS2 drain electrode is connected with the second current mirror;
Second current mirror comprises P channel MOS tube PMOS1, metal-oxide-semiconductor PMOS2, metal-oxide-semiconductor PMOS3, metal-oxide-semiconductor PMOS4 and resistance R3.
Metal-oxide-semiconductor PMOS1 source electrode connects through resistance R3 that metal-oxide-semiconductor NMOS2 drains, metal-oxide-semiconductor PMOS1 grid accesses after being connected with metal-oxide-semiconductor PMOS2 grid that metal-oxide-semiconductor NMOS2 drains, metal-oxide-semiconductor PMOS1 drains is connected with metal-oxide-semiconductor PMOS3 source electrode, be connected with metal-oxide-semiconductor PMOS1 source electrode after the grid of metal-oxide-semiconductor PMOS3 is connected with metal-oxide-semiconductor PMOS4 grid, metal-oxide-semiconductor PMOS3 drains to drain with metal-oxide-semiconductor PMOS4 and be connected, metal-oxide-semiconductor PMOS4 source electrode drains with metal-oxide-semiconductor PMOS2 and is connected, and metal-oxide-semiconductor PMOS2 source electrode exports positive image current.
Negative-phase sequence curent mirror module 220 comprises N-channel MOS pipe NMOS5, metal-oxide-semiconductor NMOS6, metal-oxide-semiconductor NMOS7, metal-oxide-semiconductor NMOS8 and resistance R4.
Metal-oxide-semiconductor NMOS5 drains through resistance R4 access electric current I
in-, metal-oxide-semiconductor NMOS5 grid accesses electric current I after being connected with metal-oxide-semiconductor NMOS6 grid
in-, metal-oxide-semiconductor NMOS5 source electrode drains with metal-oxide-semiconductor NMOS7 and is connected, to drain with metal-oxide-semiconductor NMOS5 after metal-oxide-semiconductor NMOS7 grid is connected with metal-oxide-semiconductor NMOS8 grid be connected, metal-oxide-semiconductor NMOS7 source electrode and metal-oxide-semiconductor NMOS8 source ground, metal-oxide-semiconductor NMOS8 drain electrode is connected with metal-oxide-semiconductor NMOS6 source electrode, and the anti-phase image current of metal-oxide-semiconductor NMOS6 drain electrode output is connected with metal-oxide-semiconductor PMOS2 source electrode and exports positive image current and meet at node a.
If I
in+ be greater than I
in-, then the voltage of node a is driven high and exports high level at current comparator 200 output, i.e. now V
0for high level; If I
in+ be less than I
in-, then the voltage of node a is dragged down in current comparator 200 output output low level, i.e. now V
0for low level.
Current comparator 200 also comprises the first inverter 230 and the second inverter 240.
First inverter 230 comprises P channel MOS tube PMOS5, N-channel MOS pipe NMOS9, metal-oxide-semiconductor PMOS5 drain electrode drains with metal-oxide-semiconductor PMOS4 is connected, metal-oxide-semiconductor PMOS5 source electrode drains with metal-oxide-semiconductor NMOS9 is connected, metal-oxide-semiconductor PMOS5 grid is connected rear access node a with metal-oxide-semiconductor NMOS9 grid;
Second inverter 240 comprises P channel MOS tube PMOS6, N-channel MOS pipe NMOS10, metal-oxide-semiconductor PMOS6 drain electrode drains with metal-oxide-semiconductor PMOS5 is connected, metal-oxide-semiconductor PMOS6 grid be connected with metal-oxide-semiconductor NMOS10 grid be connected with metal-oxide-semiconductor PMOS5 source electrode afterwards, the drain node b that is connected of metal-oxide-semiconductor PMOS6 source electrode and metal-oxide-semiconductor NMOS10 is the output of current comparator 200.
First inverter 230 and the second inverter 240.For the node voltage V of driving node a
0it is made to meet the input request of PFM control module 500.Current comparator 200 in the present embodiment, has only used two circuit mirror current, is compared by laggard for input current mirror image row.Structure is very simple, and due to drive current very low, power consumption is also very low, only has tens nanowatts.
As shown in Figure 5, be the schematic diagram of voltage comparator 400, this voltage comparator 400 adopts the most classical voltage comparator, and structure is simple, low in energy consumption, is applicable to very much the low-power consumption requirement of portable medical device.
With reference to figure 2, the input of current comparator 200 normal phase input end through current detecting road 600 with switching tube Q1 is connected.
As shown in Figure 4, current detection circuit 600 comprises P channel MOS tube PMOS7, metal-oxide-semiconductor PMOS8 and amplifier, wherein,
As mentioned above, switching tube Q1 is P channel power MOS pipe, switching tube Q2 is N raceway groove rectification metal-oxide-semiconductor, metal-oxide-semiconductor PMOS7 and switching tube Q1, namely power MOS pipe leaks the connection of common grid altogether, metal-oxide-semiconductor PMOS7 source electrode access amplifier one input connects, another input of amplifier drain with metal-oxide-semiconductor PMOS8 and power MOS pipe (switching tube Q1) source electrode is connected, output is connected with metal-oxide-semiconductor PMOS8 grid, metal-oxide-semiconductor PMOS8 source electrode output detections electric current I
in+.
Current detection circuit 600, by metal-oxide-semiconductor PMOS7 by switching tube Q1 after current mirror, detected by current-carrying circuit and exported.
According to:
Wherein, I
dthe drain current that metal-oxide-semiconductor PMOS7 flows through, namely On current.
μ is the surface mobility (cm of N raceway groove or P-channel device
2/ V*s).
Cox is unit area gate oxide capacitance (F/cm
2).
W and L is respectively effective channel width and the length of metal-oxide-semiconductor PMOS7.
V
gSthe voltage between the grid of metal-oxide-semiconductor PMOS7 and source electrode.
V
thit is the threshold voltage of metal-oxide-semiconductor PMOS7.
Work as V
gS(PMOS7)=V
gS(Q1), time, we are known
Wherein, I
dand I (PMOS7)
d(Q1) be the On current of metal-oxide-semiconductor PMOS7 and switching tube Q1 respectively, W and L is respectively width and the length of metal-oxide-semiconductor PMOS7.
I can be found out from formula (3)
in+ and inductive current I
lbetween relational expression to be determined by the breadth length ratio of metal-oxide-semiconductor PMOS7 and switching tube Q1, therefore, can by controlling their breadth length ratio thus accurate inductive current I being detected
l.
As shown in Figure 2, comprise divider resistance R5 and divider resistance R6, the normal phase input end of hysteresis comparator and voltage comparator 400 is connected to node between inductance L and electric capacity C, through divider resistance R6 ground connection through divider resistance R5.
The Basic Topological of translation circuit 100 as shown in Figure 2.V
inbe input voltage, be generally external power source.Switching tube Q1 and switching tube Q2 is power MOS pipe and rectification metal-oxide-semiconductor.Practical application breaker in middle pipe Q1 and switching tube Q2 adopts the metal-oxide-semiconductor with very large breadth length ratio to realize usually.In course of normal operation, switching tube Q1 and switching tube Q2 is once open-minded with certain sequential, wherein the ON time of switching tube Q1 is ton, shared by it, the ratio of whole switch periods is referred to as conducting duty ratio, represent with D, the ratio that the ON time toff of switching tube Q2 accounts for whole switch periods is called shutoff duty ratio, represents with Doff.
First suppose that switching tube Q1 and switching tube Q2 is perfect switch, their conducting resistance is 0, supposes that the time of conducting adds that the time of not conducting is switch periods.Because ON time adds that the turn-off time equals switch periods, obtain electric current in inductance and there will not be the situation dropping to zero, so be referred to as again current continuity mode of operation (Continuous Conduction Mode, CCM).
In a switch periods T, 0-t
onswitching tube Q1 conducting in time, electric current is just by inductance L, and switching tube Q1 and electric capacity C is to load supplying, and at this moment inductance L is as energy storage original paper.At this moment node SW voltage V
swequal input voltage V
in, inductive current rises according to fixing slope, and its slope can be expressed as:
S
on＝(V
in-V
out)/L (4)
Wherein, S
onfor inductive current I
lthe slope risen, V
inand V
outbe respectively input voltage and output voltage, L is the value of inductance.
So at t
onin-T time, switching tube Q1 turns off, and switching tube Q2 opens, the fault offset stored in inductance L to load and electric capacity C, node SW voltage V at this moment
swequal 0.Electric current I is obtained in inductance L
lwill decline according to fixing slope, its slope is:
S
off＝V
out/L (5)
In one-period, SW average voltage is:
A
sw＝D*V
in
Wherein, S
offfor inductive current I
lthe slope declined, A
swfor the voltage V of node SW
swaverage.
Due to the voltage V of node SW
swcomprise the effect of all chopper circuits.The changes values of inductive current and output voltage can be expressed as:
V
out＝D*V
in(7)
Wherein, △ I
lfor the changes values of inductive current, T is switch periods, t
onfor the time of switching tube Q1 conducting, D is the duty ratio of switching tube Q1 conducting.
Analysis be above based on: the time of conducting adds that the time of shutoff is whole switch periods, supposes that the inductance L in circuit is smaller, outputting inductance electric current I
lduring the long situation of smaller or switch periods T, when inductive current drops to zero, the new cycle does not still start, and this situation is called as inductive current discontinuous mode (Discontinuous Conduction Mod, DCM).Now, the control signal CLK_PMOS of switching tube Q1 and switching tube Q2 and CLK_NMOS, the inductive current I in inductance L
las shown in Figure 6.Inductive current I
lchanges values and output voltage can be expressed as follows:
Wherein, T
offfor the turn-off time of switch.
The dc-dc output voltage V of this structure
outall lower than or equal input voltage V
in, so we are referred to as buck transducer.
As shown in Figure 7 and Figure 8, be respectively: work as V
in=5V and V
inoutput voltage V during=3.5V
outwith inductive current I
lsimulation result.As can be seen here, in very large input range, output voltage can keep an invariable output voltage V
outconstant.
As shown in Figure 9, further with the input voltage of a step, V
in=3.5V to V
in=6V, the output voltage obtained still is V
out=2.5V, and ripple is very little, only has tens millivolts.
As shown in Figure 10, with the load current of a step, I
load=0mA to I
load=24mA, the output voltage obtained is still VOUT=2.5V, and the application of the enough medical chip of the load capacity of this chip is described.
As shown in figure 11, be the conversion efficiency curve under the different loads electric current that obtains after step-down controller emulation.
Please refer to Fig. 1, the syndeton of step-down controller is: the output dc voltage V of series connection divider resistance R5 and divider resistance R6 and translation circuit 100
outconnect, and by a part of output voltage V
fbfeed back to the inverting input of voltage comparator 100, the reference voltage V produced with band-gap reference BGR
refcompare, output level V
oe1with the output V of zero-crossing comparator 300
invsignal holds (clear terminal) to be set to " 0 " by control signal PFM_P by one and the R of the rest-set flip-flop M in door (AND gate) control circuit, produces signal CLK_PMOS control switch pipe Q1 and make its conducting after overdrive circuit 502.Current detection circuit 600 input connects with the source electrode of switching tube Q1, output current I
inthe positive input of+access current comparator 200, with the reference current I of reverse input end
peakafter comparing, produce signal V
ie.The output level V of hysteresis comparator (voltage comparator 400)
oe1with signal V after the first not gate is reverse
iepass through or door (OR gate), control signal PFM_P is set to " 1 " by S end (set end) of the rest-set flip-flop M in control circuit.The voltage V of the positive input access inductance L anode of zero-crossing comparator 300
sw, reverse input end ground connection GND, exports V
inv, the control signal PFM_P of switching tube Q1 through the second not gate oppositely after with this signal V
invaccess NOR gate (NOR gate) produces signal PFM_N, produces the control signal CLK_NMOS of switching tube Q2 through overdrive circuit 502.Control signal CLK_PMOS and CLK_NMOS accesses the grid of switching tube Q1 and switching tube Q2 respectively.Meanwhile, when switching tube Q1 turns off, just do not need current comparator 200 to carry out current ratio comparatively, also do not need current detection circuit 600 to detect electric current I simultaneously
in+, therefore, the present invention adopts and dynamically turns off strategy, current comparator 200 and current detection circuit 600 is turned off, thus reduces meaningless power loss, improve conversion efficiency.To solve, the main switching device switching loss that existing DC-DC converter exists is large, additional clocked circuit volume is large, cost is high, inefficient problem.It is made well to be applicable in the application of medical chip.
In addition, in the course of the work, quiescent current only has tens nanowatts to step-down controller.In addition, adopt the inner digital signal produced as control signal, thus eliminate the control modules such as extra negative delay, one-shot, improve the stability of circuit, reduce circuit structure complexity and power consumption.Meanwhile, adopt dynamic part to turn off strategy in PFM control circuit 500, effectively reduce system loss, improve efficiency.Thus be applicable to the biomedical devices of low-power consumption requirement.
The above embodiment only have expressed several execution mode of the present invention, and it describes comparatively concrete and detailed, but therefore can not be interpreted as the restriction to the scope of the claims of the present invention.It should be pointed out that for the person of ordinary skill of the art, without departing from the inventive concept of the premise, can also make some distortion and improvement, these all belong to protection scope of the present invention.Therefore, the protection range of patent of the present invention should be as the criterion with claims.
Claims (8)
1. a step-down controller, is characterized in that, comprises translation circuit, zero-crossing comparator, current comparator, voltage comparator and PFM control circuit;
Described translation circuit comprises switching tube Q1 that input is connected with power supply, output is connected with described switching tube Q1 output and the inductance L that the switching tube Q2 of input end grounding, one end are connected with described switching tube Q1 output, one end are connected the electric capacity C of other end ground connection and are connected in parallel on the resistance R1 at described electric capacity C two ends with described inductance L;
The inverting input of described voltage comparator is connected to node, normal phase input end input reference voltage between described inductance L and described electric capacity C, and comparative result is inputted described PFM control circuit;
The current peak that normal phase input end is connected with the input of described switching tube Q1, inverting input inputs described inductance L of described current comparator, and comparative result is inputted described PFM control circuit;
The normal phase input end of described zero-crossing comparator is connected with described switching tube Q1 output, reverse inter-input-ing ending grounding, and comparative result is inputted described PFM control circuit;
The comparative result output control switch pipe Q1 of described PFM control circuit according to described voltage comparator, current comparator and zero-crossing comparator and the control signal of switching tube Q2 break-make;
Described current comparator comprises positive current mirror module, negative-phase sequence curent mirror module, wherein,
The electric current I of described current comparator normal phase input end input
in+ the electric current I that inputs through described positive current mirror module mirror image and described current comparator inverting input
in-be mirrored to same node a through described negative-phase sequence curent mirror module;
If I
in+ be greater than I
in-, then the voltage of described node a is driven high and exports high level at described current comparator output;
If I
in+ be less than I
in-, then the voltage of described node a is dragged down in described current comparator output output low level;
Described positive current mirror module comprises the first current mirror, the second current mirror, wherein,
First current mirror comprises N-channel MOS pipe NMOS1, metal-oxide-semiconductor NMOS2, metal-oxide-semiconductor NMOS3, metal-oxide-semiconductor NMOS4 and resistance R2, wherein,
Described metal-oxide-semiconductor NMOS1 drains through described resistance R2 access electric current I
in+, grid accesses electric current I after being connected with described metal-oxide-semiconductor NMOS2 grid
in+, source electrode drains with described metal-oxide-semiconductor NMOS3 and is connected, drain with described metal-oxide-semiconductor NMOS1 after the grid of described metal-oxide-semiconductor NMOS3 is connected with described metal-oxide-semiconductor NMOS4 grid be connected, source electrode and described metal-oxide-semiconductor NMOS4 source ground, described metal-oxide-semiconductor NMOS4 drain electrode is connected with described metal-oxide-semiconductor NMOS2 source electrode, and described metal-oxide-semiconductor NMOS2 drain electrode is connected with described second current mirror;
Second current mirror comprises P channel MOS tube PMOS1, metal-oxide-semiconductor PMOS2, metal-oxide-semiconductor PMOS3, metal-oxide-semiconductor PMOS4 and resistance R3, wherein,
Through described resistance R3, described metal-oxide-semiconductor PMOS1 source electrode connects that described metal-oxide-semiconductor NMOS2 drains, grid accesses after being connected with described metal-oxide-semiconductor PMOS2 grid that described metal-oxide-semiconductor NMOS2 drains, draining is connected with described metal-oxide-semiconductor PMOS3 source electrode, be connected with described metal-oxide-semiconductor PMOS1 source electrode after the grid of described metal-oxide-semiconductor PMOS3 is connected with described metal-oxide-semiconductor PMOS4 grid, draining to drain with described metal-oxide-semiconductor PMOS4 is connected, described metal-oxide-semiconductor PMOS4 source electrode drains with described metal-oxide-semiconductor PMOS2 and is connected, and described metal-oxide-semiconductor PMOS2 source electrode exports positive image current.
2. step-down controller according to claim 1, is characterized in that, described negative-phase sequence curent mirror module comprises N-channel MOS pipe NMOS5, metal-oxide-semiconductor NMOS6, metal-oxide-semiconductor NMOS7, metal-oxide-semiconductor NMOS8 and resistance R4, wherein,
Described metal-oxide-semiconductor NMOS5 drains through described resistance R4 access electric current I
in-, grid accesses electric current I after being connected with described metal-oxide-semiconductor NMOS6 grid
in-, source electrode drains with described metal-oxide-semiconductor NMOS7 and is connected, to drain with described metal-oxide-semiconductor NMOS5 after described metal-oxide-semiconductor NMOS7 grid is connected with described metal-oxide-semiconductor NMOS8 grid be connected, source electrode and described metal-oxide-semiconductor NMOS8 source ground, described metal-oxide-semiconductor NMOS8 drain electrode is connected with described metal-oxide-semiconductor NMOS6 source electrode, and the anti-phase image current of described metal-oxide-semiconductor NMOS6 drain electrode output is connected with described metal-oxide-semiconductor PMOS2 source electrode and exports positive image current and meet.
3. step-down controller according to claim 2, is characterized in that, described current comparator also comprises the first inverter, the second inverter, wherein,
Described first inverter comprises P channel MOS tube PMOS5, N-channel MOS pipe NMOS9, described metal-oxide-semiconductor PMOS5 drain to drain with described metal-oxide-semiconductor PMOS4 be connected, source electrode drain with described metal-oxide-semiconductor NMOS9 be connected, grid is connected with described metal-oxide-semiconductor NMOS9 grid and accesses described node a afterwards;
Described second inverter comprises P channel MOS tube PMOS6, N-channel MOS pipe NMOS10, described metal-oxide-semiconductor PMOS6 drain to drain with described metal-oxide-semiconductor PMOS5 be connected, grid be connected with described metal-oxide-semiconductor NMOS10 grid be connected with described metal-oxide-semiconductor PMOS5 source electrode afterwards, source electrode and the described metal-oxide-semiconductor NMOS10 node b be connected that drains is described current comparator output.
4. step-down controller according to claim 1, is characterized in that, described PFM control module comprises and door, the first not gate, the second not gate or door, NOR gate and rest-set flip-flop, wherein,
Described with door two input respectively with the output of described voltage comparator and the output of zero-crossing comparator is connected, output is held with the R of described rest-set flip-flop and is connected, described or door one input is connected with the output of described voltage comparator through described first not gate, another input is connected with described current comparator output, output is held with the S of described rest-set flip-flop and is connected, the described input of the first not gate is connected with the output of voltage comparator, output with or door one input be connected;
The Q end of described rest-set flip-flop exports break-make control signal through drive unit drives to control described switching tube Q1 break-make;
The Q end of described rest-set flip-flop is connected with described NOR gate one input through described second not gate, and another input of described NOR gate is connected with the output of described zero-crossing comparator, output exports break-make control signal through drive unit drives to control described switching tube Q2 break-make.
5. step-down controller according to claim 1, is characterized in that, also comprises current detection circuit, and described current comparator normal phase input end is connected through the input of described current detection circuit with described switching tube Q1.
6. step-down controller according to claim 5, is characterized in that, described current detection circuit comprises P channel MOS tube PMOS7, metal-oxide-semiconductor PMOS8 and amplifier, wherein,
Described switching tube Q1 is P channel power MOS pipe, described switching tube Q2 is N raceway groove rectification metal-oxide-semiconductor, described metal-oxide-semiconductor PMOS7 and described power MOS pipe leak common grid altogether and are connected, described metal-oxide-semiconductor PMOS7 source electrode is connected with described amplifier one input, another input of described amplifier drains with described metal-oxide-semiconductor PMOS8 and described power MOS pipe source electrode is connected, output is connected with described metal-oxide-semiconductor PMOS8 grid, described metal-oxide-semiconductor PMOS8 source electrode output detections electric current.
7. step-down controller according to claim 1, is characterized in that, also comprises band-gap reference, and described voltage comparator is hysteresis comparator, and described band-gap reference is connected with described hysteresis comparator normal phase input end.
8. step-down controller according to claim 7, it is characterized in that, also comprise divider resistance R5 and divider resistance R6, described hysteresis comparator normal phase input end is connected to node between described inductance L and described electric capacity C, through described divider resistance R6 ground connection through described divider resistance R5.
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| CN103929048B (en) * | 2014-04-29 | 2016-04-20 | 中国科学院上海微系统与信息技术研究所 | A kind of zero cross detection circuit of Switching Power Supply |
| CN104201887B (en) * | 2014-09-01 | 2017-03-01 | 矽力杰半导体技术(杭州)有限公司 | Zero adjustment circuit and the method excessively of buck convertor |
| CN107147285B (en) * | 2017-05-31 | 2019-09-20 | 深圳芯智汇科技有限公司 | Control method, device and its storage equipment of DC-DC conversion circuit |
| CN111435819B (en) * | 2019-12-05 | 2021-11-23 | 珠海市杰理科技股份有限公司 | Step-down hysteresis type switch converter and control method thereof |
| CN111130314B (en) * | 2020-01-17 | 2024-07-12 | 深圳市纳芯威科技有限公司 | Power supply integrated circuit and power supply generating circuit |
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