CN101510721B - Single inductance switch DC voltage converter and three mode control method - Google Patents

Abstract

The object of the present invention is to provide a three-mode control method for a single-inductance switch DC voltage converter and a single-inductance switch DC voltage converter for realizing three-mode control. The single-inductance switch DC voltage converter includes a PWM control module, a PFM Control module, logic conversion control module, zero-crossing current detection module, PWM/PFM trip point current and PFM peak current detection module. The present invention integrates PWM, PFM mode and dormancy mode control modules together by means of system integration and logic control mode, realizes automatic mode switching under wide load current conditions, expands the load application range of switching DC voltage converters, and improves power conversion efficiency.

Description

A single-inductance switch DC voltage converter and three-mode control method

technical field

The invention relates to a switching DC voltage converter, in particular to a single-inductance switching DC voltage converter.

Background technique

DC voltage converters are common power management chips for portable devices. The requirements in the application are that the output voltage needs to be stable under various load current conditions, the ripple voltage is low, the noise is low, and the conversion efficiency between the input power supply and the output power supply is high.

Currently, the DC voltage converters on the market mainly include pulse width modulation (PWM) mode and pulse frequency modulation (PFM). The control methods and specific circuits of PWM and PFM are different, and they can both guarantee high power conversion efficiency within the corresponding load range.

Contents of the invention

The object of the present invention is to provide a three-mode control method of a single-inductance switch DC voltage converter and a single-inductance switch DC voltage converter for realizing mode control, realizing PWM mode control and PFM mode control of the single-inductance switch DC voltage converter. Automatic switching between mode control and sleep mode control.

The three-mode control method of the present invention includes performing PWM mode control, PFM mode control or sleep mode control on the single-inductance switch DC voltage converter; setting a zero-crossing detection module in the single-inductance switch DC voltage converter The inductance current is detected, and the feedback circuit is set to obtain the output feedback voltage of the single-inductance switching DC voltage converter;

Various mode switches are as follows:

After the switching DC voltage converter is started, PWM mode control is performed on the single-inductance switching DC voltage converter;

Under PWM mode control, if the detected inductor current is discontinuous, PFM mode control is performed on the single-inductance switching DC voltage converter;

Under PFM mode control, if the detected output feedback voltage is less than the first reference voltage or the detected inductor current is continuous, then PWM mode control is performed on the single inductor switching DC voltage converter;

Under the PFM mode control, if the detected output feedback voltage is greater than the second reference voltage, the PFM mode control is stopped, and the single-inductance switching DC voltage converter is controlled in a sleep mode;

Under the dormant mode control, if the detected output feedback voltage is less than the third reference voltage, the PFM mode control is performed on the single-inductance switching DC voltage converter;

The first reference voltage is smaller than the third reference voltage, and the third reference voltage is smaller than the second reference voltage.

A trip point current detection module is set in the single-inductance switch DC voltage converter. Under PWM mode control, when the peak current of the switching transistor in the single-inductance switch DC voltage converter is less than the trip point current, the single-inductance switch DC The voltage converter is controlled in PFM mode.

The switching transistor of the single-inductor switching DC voltage converter is turned off in sleep mode.

The single-inductance switching DC voltage converter of the present invention includes a control module, the single-inductance switching DC voltage converter includes a PMOS transistor and an NMOS transistor, the source of the PMOS transistor is connected to the input power supply, and the drain is connected to the drain of the NMOS transistor pole, the source of the NMOS transistor is grounded, and an output branch is provided between the drain of the PMOS transistor and the source of the NMOS transistor, and the inductance of the single-inductance switch DC voltage converter is connected in series in the output branch;

The control module includes a PWM mode control module, a PFM mode control module, a logic conversion control module for switching PWM mode control and PFM control and performing sleep mode control, a zero-crossing current detection module for detecting the inductor current, A voltage-dividing feedback circuit for obtaining an output feedback voltage;

The zero-crossing current detection module and the voltage division feedback circuit send the obtained feedback signal to the logic conversion control module;

The logic conversion control module sends a mode selection signal to the PWM mode control module and the PFM mode control module according to the feedback signal;

The PWM mode control module and the PFM mode control module send corresponding control signals to the logic control module according to the mode selection signal;

The logic conversion control module is connected to the gates of the PMOS transistor and the NMOS transistor, and performs mode control on the single-inductance switching DC voltage converter.

A trip point current detection module for detecting the current of the switching transistor is arranged in the control module.

The logic conversion control module includes a zero-crossing load comparator receiving the inductor output voltage and the fourth reference voltage, a trip point current comparator receiving the inductor input voltage and the trip point reference voltage, and receiving the output feedback voltage and the fourth reference voltage. A first low-voltage comparator for a reference voltage, a first high-voltage comparator for receiving an output feedback voltage and a second reference voltage, a second low-voltage comparator for receiving an output feedback voltage and a third reference voltage, and a zero-crossing load comparator , the trip point current comparator, the first low voltage comparator, the first high voltage comparator, and the output terminals of the second low voltage comparator output a mode switching signal and a dormancy signal through a logic gate circuit.

The PWM mode control module receives the output feedback voltage, the reference voltage and the mode switching signal, and sends control signals to the gates of the PMOS transistor and the NMOS transistor through the logic conversion module.

The PFM mode control module reference current and the peak current comparator of the inductor output terminal current, the second high voltage comparator receiving the second reference voltage and the output feedback voltage, the third low voltage comparator receiving the output feedback voltage and the third reference voltage The voltage comparator, the zero-crossing load current comparator that receives the corresponding reference voltage when the output terminal of the inductor is approximately 0 and the current at the output terminal of the inductor, the PFM mode control module sends the gate of the PMOS transistor and the NMOS transistor through the logic conversion module according to the mode switching signal Pole sends a control signal.

The advantages of the present invention are: the present invention integrates the PWM, PFM mode and dormancy mode control modules together by means of system integration and logic control, so as to realize automatic switching of modes under wide load current conditions and expand the range of switching DC voltage converters. The range of load usage improves the power conversion efficiency.

Description of drawings

Fig. 1 is the structural representation of the single inductance switch DC voltage converter of the present invention;

Fig. 2 is a logic control unit circuit diagram of PWM, PFM and sleep mode;

Fig. 3 is a circuit diagram of a PWM mode control module;

FIG. 4 is a circuit diagram of a PFM mode control module.

Detailed ways

As shown in FIG. 1 , the three-mode control DC voltage converter chip circuit of this embodiment is composed of a control module and an on-chip output stage circuit. The control module includes a logic control module, a PWM control module, a PFM control module, a PWM/PFM trip point current detection module, a PFM peak current detection module, and a zero-crossing current detection module. The power supply voltage of each module is the voltage V _in input from the off-chip to the on-chip. The EN signal is an enable signal input outside the chip. When EN is "1", the chip works normally; when it is "0", the chip does not work. An off-chip filter circuit consisting of an inductor L and a capacitor C _out is connected between the SW node of the on-chip output stage circuit and the ground (GND), where R _ESR is the parasitic resistance of the capacitor. R _f1 and R _f2 form the feedback circuit of the output voltage V _out , and the V _FB feedback signal is input to the PWM control module, the PFM control module, and the logic control module. Resistor _RL is the load resistance.

When power-on starts, because the output voltage V _out is low, the system works in PWM mode, the logic control module outputs the Mode_select signal as "1", and the PFM control module does not work. At this time, the PWM/PFM trip point current detection and PFM peak current detection modules detect the PWM/PFM trip point current.

When the power-on start-up is completed, the control circuit begins to determine the magnitude of the output current. There are the following two states that can switch the circuit from PWM mode to PFM mode: (1) When the zero-crossing current detection module detects that there is an inductance in the PWM mode control The current discontinuity exists, that is, there is zero current in the inductor current, and the V _{sw_load} signal is output to the logic control module; (2) When the PWM/FPM trip point current module detects that the PMOS transistor SP in the on-chip output stage circuit When the peak value of the switching current is less than a set value I _skip , a V _skip signal is output to the logic control module.

If the above conditions are not met, the system maintains the original PWM mode working state. If any one of the above two conditions occurs, the system will switch to the working state of PFM mode. At this time, the Vmode_select signal is "0", and the PFM control module works. The PFM peak current detection module of the PWM/PFM trip point current detection/PFM peak current detection module works.

In PFM mode, if the PFM peak current detection module detects that the average value of the inductor current is greater than the set limit current point I _peak , the PMOS transistor SP in the on-chip output stage circuit is turned off, and the NMOS transistor SN is turned on to reduce the output voltage. value to ensure that the output current is not greater than the set current limit point.

The output signals of the PWM control module and the PFM control module are pwm_ctr and pfm_ctr respectively. When working in PWM or PFM mode, the above signals are input to the logic control module, and the sp_g and sn_g signals are output through the drive circuit. The sp_g and sn_g signals are respectively connected to the gates of the PMOS transistor SP and the NMOS transistor SN of the on-chip output stage circuit. When V _in (V _DD ) charges the SW node through the SP tube, sp_g is "0", the P tube is turned on, and at the same time sn_g is "0", the SN tube is turned off; when the off-chip inductor is discharged through the SW node; sp_g is "1", the SP tube is disconnected, and at the same time sn_g is "1", the SN tube is turned on.

The logic control module circuit shown in Figure 2 consists of a zero-crossing load current comparator 3, a trip point current comparator 4, a high voltage comparator 5, a low voltage comparator 1, a low voltage comparator 2, an OR gate, and Gates and inverters. The positive terminal of the zero-crossing load current comparator 3 is connected to the reference voltage V _{load_comp_vip} corresponding to when the inductor current is approximately zero, and the negative terminal is connected to the voltage V _{sw_load} corresponding to the inductor current _IL of the output stage. The positive terminal of the trip point current comparator 4 is connected to the reference voltage V _{skip_comp_vip} , the output current corresponding to this voltage is 80mA, and the positive terminal is connected to reflect the SW node current, that is, the voltage signal V _{sw_skip} corresponding to the output current. The positive terminal of the low voltage comparator 2 is connected to the divided feedback voltage V _fb of the output voltage, and the negative terminal is connected to the reference voltage V _{low_ref2} . The positive terminal of the high voltage comparator 5 is connected to the divided feedback voltage V _fb of the output voltage, and the negative terminal is connected to the reference voltage V _{high_ref} . The positive terminal of the low voltage comparator 1 is connected to the divided feedback voltage V _fb of the output voltage, and the negative terminal is connected to the reference voltage V _{low_ref} . The output signals of the logic conversion control module include Mode_select and Sleep_mode_en.

When the off-chip inductor current is zero, V _{sw_load} is smaller than V _{load_comp_vip} , so the output of the zero-crossing load current comparator is "0". After passing through the gate circuit, the Mode_select signal is "0" and output, making the system circuit transitions to PFM mode. Similarly, when the value of the V _{sw_skip} signal is greater than the value of the V _{skip_comp_vip} signal, the output of the trip point current comparator is "0", so that the Mode_select signal is "0" and output, so that the system circuit switches to the PFM mode. If V _fb is higher than the voltage value of V _{low_ref2} , then the low voltage comparator 2 outputs "0", and makes the V _{mode_select} signal "1" through the gate circuit, and outputs it, so that the system circuit switches to PWM mode.

In addition, when the V _fb voltage value is greater than V _{high_ref} , the V _{sleep_mode_on} signal is "1", and is output to the PFM control module, and through the output signal of the PFM control module and the logic control circuit module, both the SP tube and the SN tube are turned off, This will put the system into hibernation mode. Similarly, if the V _FB voltage value is lower than V _{low_ref} , the Sleep_mode_on signal is "0", and the circuit system exits the sleep mode. The reference voltage value V _{high_ref} is the largest, followed by V _{low_ref} , and V _{low_ref2} is the smallest.

The PWM control module shown in Figure 3 is composed of transconductance amplifier Gm, PWM comparator 6, D flip-flop, NOR gate and inverter. The input negative terminal of the transconductance amplifier Gm receives the V _fb signal, which is the divided feedback voltage of the output voltage; the positive terminal receives the reference voltage V _ref . The positive terminal of the PWM comparator 6 receives the V _comp signal, which is a voltage signal proportional to the conduction time of the power tube; the negative terminal of the PWM comparator 6 is connected to the output terminal of the transconductance amplifier Gm and the capacitor C and the NMOS tube M1 Drain connected. The CLK port of the D flip-flop is connected to the external clock signal CLK.

The working process of the PWM control loop is as follows: at the beginning of each clock cycle, CLK generates a clock rising edge, the D flip-flop triggers, and the output of the _QB terminal is low, so the SP tube is turned on, the SN tube is turned off, and the flow The current I _L on the inductance increases, and when I _L is greater than I _out , V _out starts to rise. In this process, the gate signal of the M1 tube is "0", the M1 tube is disconnected, and the output current of the transconductance amplifier (GM) charges the C1 capacitor, and the charging current is proportional to the difference between the voltages of V _fb and V _ref Proportional, so that the negative terminal voltage of the PWM comparator 6 rises, when the voltage is greater than Vcom, the output of the PWM comparator is "0", the D flip-flop is reset, and the output of the _QB terminal is a high level "1", so that the SN tube When it is turned on, the SP tube is disconnected, and the current on the inductor drops. When _IL is less than I _out , V _out starts to drop. At this time, the gate voltage of the M1 tube is "1", the M1 tube is turned on, and the capacitor C1 is discharged to the ground. When the voltage on the C1 is lower than V _comp , the output of the PWM comparator 6 is reversed to a high level. At this point, the PWM control of one clock cycle is completed and the CLK rising edge of the next cycle is waiting for the arrival.

The PFM control module shown in Figure 4 consists of a peak current comparator 7, a high voltage comparator 8, a low voltage comparator 9, a zero-crossing load current comparator 10, a D flip-flop, an AND gate and an OR gate. The positive terminal of the peak current comparator 7 is connected to the reference current I _peak , and the negative terminal is connected to the inductor current I _L of the output stage; the positive terminal of the high voltage comparator 8 receives the reference voltage V _{high_ref} , and the negative terminal receives the divided feedback voltage V of the output voltage _fb . The positive terminal of the low voltage comparator 9 receives the divided feedback voltage V _fb of the output voltage, and the negative terminal receives the reference voltage V _{low_ref} . The positive terminal of the zero-crossing load current comparator 10 is connected to the reference current signal I _0A which is approximately zero, and the negative terminal is connected to the inductor current I _L of the output stage. By setting the input reference voltages V _{high_ref} and V _{low_ref} of the high voltage comparator 8 and the low voltage comparator 9, the output voltage V _out of the off-chip output circuit is controlled between V _{high_ref} and V between _{low_ref} .

Claims (2)

1. a kind of single inductance switch dc voltage converter, comprises on-chip circuit unit and off-chip circuit unit, is characterized in that: The off-chip circuit unit includes a filter circuit composed of an inductor and a capacitor and a voltage divider feedback circuit composed of two series resistors, the feedback voltage is taken from an intermediate node connected to the two resistors, and the two resistors are connected in parallel with the capacitor and then connected in series with the inductor; The on-chip circuit unit includes a PWM mode control module, a PFM mode control module, a logic conversion control module for switching PWM mode, PFM mode and sleep mode, and a zero-crossing current detection for detecting the inductor current in the off-chip circuit unit module, PMOS switching transistor, NMOS switching transistor and trip point current detection module; The source of the PMOS switching transistor is connected to the input power supply, the drain is connected to the drain of the NMOS switching transistor, the source of the NMOS switching transistor is grounded, and the node connected to the drain of the PMOS switching transistor and the drain of the NMOS switching transistor is a trip point. The inductance of the off-chip circuit unit is connected in series with the trip point; The zero-crossing current detection module converts the detected inductor current into a voltage signal, and outputs it to the logic conversion control module; The trip point current detection module detects the trip point current, converts it into a voltage signal, and outputs it to the logic conversion control module; The logic conversion control module includes a first low voltage comparator receiving the feedback voltage and a preset first reference voltage, a second low voltage comparator receiving the feedback voltage and a preset third reference voltage, receiving the feedback voltage and The first high-voltage comparator of the preset second reference voltage, the zero-crossing load voltage comparator receiving the voltage signal output by the zero-crossing current detection module and the fourth reference voltage corresponding to when the current of the inductor is approximately zero, and receiving The trip point voltage output by the trip point current detection module and the trip point voltage comparator of the trip point reference voltage, the first low voltage comparator, the second low voltage comparator, the first high voltage comparator, the zero-crossing load The output terminals of the voltage comparator and the trip point voltage comparator send a mode selection signal to the PWM mode control module and the PFM mode control module through a logic gate circuit; The PWM mode control module and the PFM mode control module send corresponding control signals to the logic conversion control module according to the mode selection signal, and the control signal is delivered to the gates of the PMOS switch transistor and the NMOS switch transistor after the logic conversion control module, and control On and off of two switching transistors; The PFM mode control module includes a peak current comparator that receives the preset first reference current representing the maximum value of the inductor current and the current at the output terminal of the inductor, a second high voltage comparator that receives the second reference voltage and the feedback voltage, and receives A third low-voltage comparator for the feedback voltage and the third reference voltage and a zero-crossing load current comparator for receiving the corresponding second reference current and the current at the output terminal of the inductor when the current at the output terminal of the inductor is approximately zero; The first reference voltage is smaller than the third reference voltage, and the third reference voltage is smaller than the second reference voltage. 2. The single-inductance switch DC voltage converter according to claim 1, characterized in that: After the single-inductance switch DC voltage converter is started, the logic conversion control module sends a mode selection signal to the PWM mode control module, and the PWM mode control module works to make the single-inductance switch DC voltage converter work in PWM mode; In the PWM mode, if the zero-crossing current detection module detects that the inductor current has zero current, the logic conversion control module sends a mode selection signal to the PFM mode control module, and the PFM mode control module works to make The single-inductance switching DC voltage converter works in PFM mode; In PFM mode, if the first low voltage comparator in the logic conversion control module detects that the feedback voltage is less than the first reference voltage, the zero-crossing current detection module detects that the inductor current is continuous or the PFM mode The peak current comparator in the control module detects that the current at the output terminal of the inductor exceeds the preset first reference current, then the logic conversion control module sends a mode selection signal to the PWM mode control module, and the PWM mode control module works, Make the single-inductance switch DC voltage converter work in PWM mode; In the PFM mode, if the first high voltage comparator in the logic conversion control module detects that the feedback voltage is greater than the second reference voltage, the logic conversion control module sends the PMOS switch transistor and the NMOS switch transistor The gate of the gate sends a control signal to turn off the two switching transistors, so that the single-inductance switching DC voltage converter enters the sleep mode; In sleep mode, if the second low voltage comparator in the logic conversion control module detects that the feedback voltage is less than the third reference voltage, the logic conversion control module sends a mode selection to the PFM mode control module signal, the PFM mode control module works, so that the single-inductor switching DC voltage converter works in the PFM mode.

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