CN103229155B - 高速内存系统 - Google Patents

高速内存系统 Download PDF

Info

Publication number
CN103229155B
CN103229155B CN201180056676.7A CN201180056676A CN103229155B CN 103229155 B CN103229155 B CN 103229155B CN 201180056676 A CN201180056676 A CN 201180056676A CN 103229155 B CN103229155 B CN 103229155B
Authority
CN
China
Prior art keywords
memory
data
module
speed
flash
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
CN201180056676.7A
Other languages
English (en)
Chinese (zh)
Other versions
CN103229155A (zh
Inventor
H.H.弗罗斯特
R.哈特赛尔
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
International Business Machines Corp
Original Assignee
Texas Storage System Co ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Texas Storage System Co ltd filed Critical Texas Storage System Co ltd
Publication of CN103229155A publication Critical patent/CN103229155A/zh
Application granted granted Critical
Publication of CN103229155B publication Critical patent/CN103229155B/zh
Expired - Fee Related legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/38—Information transfer, e.g. on bus
    • G06F13/40—Bus structure
    • G06F13/4004—Coupling between buses
    • G06F13/4022—Coupling between buses using switching circuits, e.g. switching matrix, connection or expansion network
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
    • G06F11/08—Error detection or correction by redundancy in data representation, e.g. by using checking codes
    • G06F11/10—Adding special bits or symbols to the coded information, e.g. parity check, casting out 9's or 11's
    • G06F11/1008—Adding special bits or symbols to the coded information, e.g. parity check, casting out 9's or 11's in individual solid state devices
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
    • G06F11/08—Error detection or correction by redundancy in data representation, e.g. by using checking codes
    • G06F11/10—Adding special bits or symbols to the coded information, e.g. parity check, casting out 9's or 11's
    • G06F11/1008—Adding special bits or symbols to the coded information, e.g. parity check, casting out 9's or 11's in individual solid state devices
    • G06F11/1012—Adding special bits or symbols to the coded information, e.g. parity check, casting out 9's or 11's in individual solid state devices using codes or arrangements adapted for a specific type of error
    • G06F11/1016—Error in accessing a memory location, i.e. addressing error
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
    • G06F11/08—Error detection or correction by redundancy in data representation, e.g. by using checking codes
    • G06F11/10—Adding special bits or symbols to the coded information, e.g. parity check, casting out 9's or 11's
    • G06F11/1008—Adding special bits or symbols to the coded information, e.g. parity check, casting out 9's or 11's in individual solid state devices
    • G06F11/1068—Adding special bits or symbols to the coded information, e.g. parity check, casting out 9's or 11's in individual solid state devices in sector programmable memories, e.g. flash disk
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
    • G06F11/08—Error detection or correction by redundancy in data representation, e.g. by using checking codes
    • G06F11/10—Adding special bits or symbols to the coded information, e.g. parity check, casting out 9's or 11's
    • G06F11/1008—Adding special bits or symbols to the coded information, e.g. parity check, casting out 9's or 11's in individual solid state devices
    • G06F11/1072—Adding special bits or symbols to the coded information, e.g. parity check, casting out 9's or 11's in individual solid state devices in multilevel memories
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00—Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02—Addressing or allocation; Relocation
    • G06F12/0223—User address space allocation, e.g. contiguous or non contiguous base addressing
    • G06F12/023—Free address space management
    • G06F12/0238—Memory management in non-volatile memory, e.g. resistive RAM or ferroelectric memory
    • G06F12/0246—Memory management in non-volatile memory, e.g. resistive RAM or ferroelectric memory in block erasable memory, e.g. flash memory
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/14—Handling requests for interconnection or transfer
    • G06F13/16—Handling requests for interconnection or transfer for access to memory bus
    • G06F13/1605—Handling requests for interconnection or transfer for access to memory bus based on arbitration
    • G06F13/1652—Handling requests for interconnection or transfer for access to memory bus based on arbitration in a multiprocessor architecture
    • G06F13/1663—Access to shared memory
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/14—Handling requests for interconnection or transfer
    • G06F13/16—Handling requests for interconnection or transfer for access to memory bus
    • G06F13/1668—Details of memory controller
    • G06F13/1673—Details of memory controller using buffers
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/14—Handling requests for interconnection or transfer
    • G06F13/20—Handling requests for interconnection or transfer for access to input/output bus
    • G06F13/28—Handling requests for interconnection or transfer for access to input/output bus using burst mode transfer, e.g. direct memory access DMA, cycle steal
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/38—Information transfer, e.g. on bus
    • G06F13/42—Bus transfer protocol, e.g. handshake; Synchronisation
    • G06F13/4204—Bus transfer protocol, e.g. handshake; Synchronisation on a parallel bus
    • G06F13/4221—Bus transfer protocol, e.g. handshake; Synchronisation on a parallel bus being an input/output bus, e.g. ISA bus, EISA bus, PCI bus, SCSI bus
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
    • G06F3/06—Digital input from, or digital output to, record carriers, e.g. RAID, emulated record carriers or networked record carriers
    • G06F3/0601—Interfaces specially adapted for storage systems
    • G06F3/0668—Interfaces specially adapted for storage systems adopting a particular infrastructure
    • G06F3/0671—In-line storage system
    • G06F3/0673—Single storage device
    • G06F3/0679—Non-volatile semiconductor memory device, e.g. flash memory, one time programmable memory [OTP]
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C7/00—Arrangements for writing information into, or reading information out from, a digital store
    • G11C7/10—Input/output [I/O] data interface arrangements, e.g. I/O data control circuits, I/O data buffers
    • G11C7/1072—Input/output [I/O] data interface arrangements, e.g. I/O data control circuits, I/O data buffers for memories with random access ports synchronised on clock signal pulse trains, e.g. synchronous memories, self timed memories
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F2212/00—Indexing scheme relating to accessing, addressing or allocation within memory systems or architectures
    • G06F2212/72—Details relating to flash memory management
    • G06F2212/7208—Multiple device management, e.g. distributing data over multiple flash devices
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F2213/00—Indexing scheme relating to interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F2213/0038—System on Chip

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Quality & Reliability (AREA)
  • Mathematical Physics (AREA)
  • Computer Hardware Design (AREA)
  • Human Computer Interaction (AREA)
  • Bus Control (AREA)
  • Techniques For Improving Reliability Of Storages (AREA)
  • Read Only Memory (AREA)
  • Information Transfer Systems (AREA)
CN201180056676.7A 2010-09-24 2011-09-23 高速内存系统 Expired - Fee Related CN103229155B (zh)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
US38623710P 2010-09-24 2010-09-24
US61/386,237 2010-09-24
PCT/US2011/053129 WO2012040649A2 (en) 2010-09-24 2011-09-23 High-speed memory system

Publications (2)

Publication Number Publication Date
CN103229155A CN103229155A (zh) 2013-07-31
CN103229155B true CN103229155B (zh) 2016-11-09

Family

ID=45871943

Family Applications (1)

Application Number Title Priority Date Filing Date
CN201180056676.7A Expired - Fee Related CN103229155B (zh) 2010-09-24 2011-09-23 高速内存系统

Country Status (6)

Country Link
US (4) US8386887B2 (enExample)
JP (1) JP5872560B2 (enExample)
CN (1) CN103229155B (enExample)
DE (1) DE112011103208T5 (enExample)
GB (1) GB2513551B (enExample)
WO (1) WO2012040649A2 (enExample)

Families Citing this family (71)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US8959307B1 (en) 2007-11-16 2015-02-17 Bitmicro Networks, Inc. Reduced latency memory read transactions in storage devices
US8665601B1 (en) 2009-09-04 2014-03-04 Bitmicro Networks, Inc. Solid state drive with improved enclosure assembly
US8447908B2 (en) 2009-09-07 2013-05-21 Bitmicro Networks, Inc. Multilevel memory bus system for solid-state mass storage
US8560804B2 (en) 2009-09-14 2013-10-15 Bitmicro Networks, Inc. Reducing erase cycles in an electronic storage device that uses at least one erase-limited memory device
JP5872560B2 (ja) * 2010-09-24 2016-03-01 テキサス・メモリー・システムズ・インコーポレイテツド 高速メモリ・システム
US8949509B2 (en) * 2010-12-06 2015-02-03 OCZ Storage Solutions Inc. Mass storage systems and methods using solid-state storage media and ancillary interfaces for direct communication between memory cards
US8446170B2 (en) * 2011-05-05 2013-05-21 Actel Corporation FPGA RAM blocks optimized for use as register files
US9065644B2 (en) * 2011-06-23 2015-06-23 Futurewei Technologies, Inc. Full duplex transmission method for high speed backplane system
US9372755B1 (en) 2011-10-05 2016-06-21 Bitmicro Networks, Inc. Adaptive power cycle sequences for data recovery
US9740439B2 (en) * 2011-12-23 2017-08-22 International Business Machines Corporation Solid-state storage management
US9043669B1 (en) 2012-05-18 2015-05-26 Bitmicro Networks, Inc. Distributed ECC engine for storage media
US9258276B2 (en) 2012-05-22 2016-02-09 Xockets, Inc. Efficient packet handling, redirection, and inspection using offload processors
US20130318280A1 (en) 2012-05-22 2013-11-28 Xockets IP, LLC Offloading of computation for rack level servers and corresponding methods and systems
US20140089561A1 (en) 2012-09-26 2014-03-27 Kiran Pangal Techniques Associated with Protecting System Critical Data Written to Non-Volatile Memory
WO2014103144A1 (ja) * 2012-12-28 2014-07-03 パナソニック株式会社 インタフェース装置、およびメモリバスシステム
US9378161B1 (en) 2013-01-17 2016-06-28 Xockets, Inc. Full bandwidth packet handling with server systems including offload processors
US20140201409A1 (en) 2013-01-17 2014-07-17 Xockets IP, LLC Offload processor modules for connection to system memory, and corresponding methods and systems
US10025735B2 (en) * 2013-01-31 2018-07-17 Seagate Technology Llc Decoupled locking DMA architecture
US9423457B2 (en) 2013-03-14 2016-08-23 Bitmicro Networks, Inc. Self-test solution for delay locked loops
US9875205B1 (en) * 2013-03-15 2018-01-23 Bitmicro Networks, Inc. Network of memory systems
US9501436B1 (en) 2013-03-15 2016-11-22 Bitmicro Networks, Inc. Multi-level message passing descriptor
US9798688B1 (en) 2013-03-15 2017-10-24 Bitmicro Networks, Inc. Bus arbitration with routing and failover mechanism
US9430386B2 (en) 2013-03-15 2016-08-30 Bitmicro Networks, Inc. Multi-leveled cache management in a hybrid storage system
US10120694B2 (en) 2013-03-15 2018-11-06 Bitmicro Networks, Inc. Embedded system boot from a storage device
US9971524B1 (en) 2013-03-15 2018-05-15 Bitmicro Networks, Inc. Scatter-gather approach for parallel data transfer in a mass storage system
US9400617B2 (en) 2013-03-15 2016-07-26 Bitmicro Networks, Inc. Hardware-assisted DMA transfer with dependency table configured to permit-in parallel-data drain from cache without processor intervention when filled or drained
US10489318B1 (en) 2013-03-15 2019-11-26 Bitmicro Networks, Inc. Scatter-gather approach for parallel data transfer in a mass storage system
US9734067B1 (en) 2013-03-15 2017-08-15 Bitmicro Networks, Inc. Write buffering
US9672178B1 (en) 2013-03-15 2017-06-06 Bitmicro Networks, Inc. Bit-mapped DMA transfer with dependency table configured to monitor status so that a processor is not rendered as a bottleneck in a system
US9934045B1 (en) 2013-03-15 2018-04-03 Bitmicro Networks, Inc. Embedded system boot from a storage device
US9720603B1 (en) 2013-03-15 2017-08-01 Bitmicro Networks, Inc. IOC to IOC distributed caching architecture
US9639356B2 (en) 2013-03-15 2017-05-02 Qualcomm Incorporated Arbitrary size table lookup and permutes with crossbar
EP2984570A4 (en) * 2013-04-09 2017-11-08 Emc Corporation Multiprocessor system with independent direct access to bulk solid state memory resources
CN104424124B (zh) * 2013-09-10 2018-07-06 联想(北京)有限公司 内存装置、电子设备和用于控制内存装置的方法
CN103645999A (zh) * 2013-12-07 2014-03-19 天津光电通信技术有限公司 基于fpga实现8通道收发串口的高速板卡
US9639285B2 (en) 2014-03-13 2017-05-02 Aupera Technologies, Inc. Distributed raid in a flash based memory system
US10042792B1 (en) 2014-04-17 2018-08-07 Bitmicro Networks, Inc. Method for transferring and receiving frames across PCI express bus for SSD device
US10025736B1 (en) 2014-04-17 2018-07-17 Bitmicro Networks, Inc. Exchange message protocol message transmission between two devices
US9952991B1 (en) 2014-04-17 2018-04-24 Bitmicro Networks, Inc. Systematic method on queuing of descriptors for multiple flash intelligent DMA engine operation
US10055150B1 (en) 2014-04-17 2018-08-21 Bitmicro Networks, Inc. Writing volatile scattered memory metadata to flash device
US10078604B1 (en) 2014-04-17 2018-09-18 Bitmicro Networks, Inc. Interrupt coalescing
US9823864B2 (en) 2014-06-02 2017-11-21 Micron Technology, Inc. Systems and methods for throttling packet transmission in a scalable memory system protocol
US10031860B2 (en) 2014-09-24 2018-07-24 Western Digital Technologies, Inc. Memory transfer of objects in a data storage device
US9851901B2 (en) 2014-09-26 2017-12-26 Western Digital Technologies, Inc. Transfer of object memory references in a data storage device
TWI553483B (zh) * 2014-10-13 2016-10-11 瑞昱半導體股份有限公司 處理器及存取記憶體的方法
US10452557B2 (en) 2015-01-28 2019-10-22 Hitachi, Ltd. Storage apparatus, computer system, and method for improved read operation handling
JP5939323B1 (ja) 2015-02-10 2016-06-22 日本電気株式会社 情報処理装置、情報処理方法、及び、プログラム
KR102417182B1 (ko) 2015-06-22 2022-07-05 삼성전자주식회사 데이터 저장 장치와 이를 포함하는 데이터 처리 시스템
JP6403162B2 (ja) * 2015-07-23 2018-10-10 東芝メモリ株式会社 メモリシステム
US9577854B1 (en) 2015-08-20 2017-02-21 Micron Technology, Inc. Apparatuses and methods for asymmetric bi-directional signaling incorporating multi-level encoding
US10423354B2 (en) * 2015-09-23 2019-09-24 Advanced Micro Devices, Inc. Selective data copying between memory modules
WO2017072868A1 (ja) * 2015-10-28 2017-05-04 株式会社日立製作所 ストレージ装置
US10120749B2 (en) * 2016-09-30 2018-11-06 Intel Corporation Extended application of error checking and correction code in memory
KR102799068B1 (ko) * 2017-02-09 2025-04-23 에스케이하이닉스 주식회사 저장 장치 및 그 동작 방법
US10164817B2 (en) 2017-03-21 2018-12-25 Micron Technology, Inc. Methods and apparatuses for signal translation in a buffered memory
US10552050B1 (en) 2017-04-07 2020-02-04 Bitmicro Llc Multi-dimensional computer storage system
US10705912B2 (en) 2017-06-07 2020-07-07 Rambus Inc. Energy efficient storage of error-correction-detection information
US10216685B1 (en) * 2017-07-19 2019-02-26 Agiga Tech Inc. Memory modules with nonvolatile storage and rapid, sustained transfer rates
KR102504293B1 (ko) 2017-11-29 2023-02-27 삼성전자 주식회사 패키지 온 패키지 형태의 반도체 패키지
US10515173B2 (en) * 2017-12-29 2019-12-24 Advanced Micro Devices, Inc. Input-output processing on a remote integrated circuit chip
CN109144943A (zh) * 2018-06-26 2019-01-04 深圳市安信智控科技有限公司 基于高速串行通道互连的计算芯片与存储器芯片组合系统
US10635610B1 (en) * 2019-03-14 2020-04-28 Toshiba Memory Corporation System and method for serial interface memory using switched architecture
CN109933292B (zh) * 2019-03-21 2023-06-09 深圳文脉国际传媒有限公司 存储器命令处理方法、终端及存储介质
CN110188066B (zh) * 2019-05-07 2021-02-02 方一信息科技（上海）有限公司 一种针对大容量数据的FPGA和基于opencl的FPGA算法
US11385837B2 (en) 2020-01-07 2022-07-12 SK Hynix Inc. Memory system
TWI868210B (zh) 2020-01-07 2025-01-01 韓商愛思開海力士有限公司 記憶體中處理（ｐｉｍ）系統
US11315611B2 (en) * 2020-01-07 2022-04-26 SK Hynix Inc. Processing-in-memory (PIM) system and operating methods of the PIM system
US12067237B2 (en) 2021-12-29 2024-08-20 Advanced Micro Devices, Inc. Flexible memory system
US20240220430A1 (en) * 2023-01-04 2024-07-04 Mercedes-Benz Group AG System, device and/or method for processing direct memory access gather and scatter requests
CN118535514A (zh) * 2024-06-03 2024-08-23 南京全信传输科技股份有限公司 高速口安全收发fc数据的系统与方法
CN120567371B (zh) * 2025-07-31 2025-10-21 浙江大学 大位宽无限带宽网络编解码层处理系统

Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6654831B1 (en) * 2000-03-07 2003-11-25 International Business Machine Corporation Using multiple controllers together to create data spans
US20040255054A1 (en) * 2003-06-10 2004-12-16 Khein-Seng Pua High-speed data transmission device
US20080126851A1 (en) * 2006-08-31 2008-05-29 Dell Products L.P. Redundant storage enclosure processor (sep) implementation for use in serial attached scsi (sas) environment
CN101965559A (zh) * 2007-12-27 2011-02-02 普莱恩特技术股份有限公司 包括将处理器与内部存储器连接的交叉切换器的用于闪存的存储控制器

Family Cites Families (21)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6438146B1 (en) 1998-04-13 2002-08-20 International Business Machines Corporation Multiplexed asynchronous serial communication systems methods and computer program products
US6609167B1 (en) 1999-03-17 2003-08-19 Adaptec, Inc. Host and device serial communication protocols and communication packet formats
US6148354A (en) 1999-04-05 2000-11-14 M-Systems Flash Disk Pioneers Ltd. Architecture for a universal serial bus-based PC flash disk
KR100462069B1 (ko) * 2000-12-21 2004-12-17 엘지전자 주식회사 인터넷 텔레포니 게이트웨이 시스템에서 상태 관리 방법
ITVA20010035A1 (it) * 2001-10-16 2003-04-16 St Microelectronics Srl Dispositivo di memoria non volatile con doppia interfaccia di comunicazione seriale/parallela
JP2003124997A (ja) * 2001-10-17 2003-04-25 Fujitsu Ltd パケット処理を行う伝送路終端装置
CA2366397A1 (en) * 2001-12-31 2003-06-30 Tropic Networks Inc. An interface for data transfer between integrated circuits
JP3815400B2 (ja) * 2002-08-08 2006-08-30 ソニー株式会社 アダプタ装置
DE60229649D1 (de) * 2002-11-28 2008-12-11 St Microelectronics Srl Nichtflüchtige Speicheranordnungsarchitektur, zum Beispiel vom Flash-Typ mit einer seriellen Übertragungsschnittstelle
US7109728B2 (en) * 2003-02-25 2006-09-19 Agilent Technologies, Inc. Probe based information storage for probes used for opens detection in in-circuit testing
US7000056B2 (en) * 2003-03-28 2006-02-14 Intel Corporation Method and apparatus for detecting low pin count and serial peripheral interfaces
US20050050237A1 (en) * 2003-08-28 2005-03-03 Jeddeloh Joseph M. Memory module and method having on-board data search capabilities and processor-based system using such memory modules
JP4080980B2 (ja) * 2003-09-26 2008-04-23 三菱電機株式会社 電子制御装置
US7652922B2 (en) * 2005-09-30 2010-01-26 Mosaid Technologies Incorporated Multiple independent serial link memory
KR101293365B1 (ko) * 2005-09-30 2013-08-05 모사이드 테크놀로지스 인코퍼레이티드 출력 제어 메모리
US7360137B2 (en) * 2006-05-04 2008-04-15 Westell Technologies, Inc. Flash programmer for programming NAND flash and NOR/NAND combined flash
US7676729B2 (en) * 2006-08-23 2010-03-09 Sun Microsystems, Inc. Data corruption avoidance in DRAM chip sparing
US7918398B2 (en) * 2007-06-04 2011-04-05 Hand Held Products, Inc. Indicia reading terminal having multiple setting imaging lens
JP4760778B2 (ja) * 2007-06-11 2011-08-31 Ｔｄｋ株式会社 フラッシュメモリシステム及び同システムに組み込まれるフラッシュメモリモジュール
KR100934227B1 (ko) * 2007-09-21 2009-12-29 한국전자통신연구원 개방형 시리얼 정합 방식을 이용한 메모리 스위칭 컨트롤장치, 그의 동작 방법 및 이에 적용되는 데이터 저장 장치
JP5872560B2 (ja) * 2010-09-24 2016-03-01 テキサス・メモリー・システムズ・インコーポレイテツド 高速メモリ・システム

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6654831B1 (en) * 2000-03-07 2003-11-25 International Business Machine Corporation Using multiple controllers together to create data spans
US20040255054A1 (en) * 2003-06-10 2004-12-16 Khein-Seng Pua High-speed data transmission device
US20080126851A1 (en) * 2006-08-31 2008-05-29 Dell Products L.P. Redundant storage enclosure processor (sep) implementation for use in serial attached scsi (sas) environment
CN101965559A (zh) * 2007-12-27 2011-02-02 普莱恩特技术股份有限公司 包括将处理器与内部存储器连接的交叉切换器的用于闪存的存储控制器

Also Published As

Publication number Publication date
GB2513551A (en) 2014-11-05
US8386887B2 (en) 2013-02-26
US20130145088A1 (en) 2013-06-06
JP2014501950A (ja) 2014-01-23
GB201304421D0 (en) 2013-04-24
US8694863B2 (en) 2014-04-08
WO2012040649A2 (en) 2012-03-29
GB2513551B (en) 2018-01-10
US9619419B2 (en) 2017-04-11
US20140215290A1 (en) 2014-07-31
US9110831B2 (en) 2015-08-18
US20150356044A1 (en) 2015-12-10
CN103229155A (zh) 2013-07-31
WO2012040649A3 (en) 2012-06-28
US20120079352A1 (en) 2012-03-29
DE112011103208T5 (de) 2013-10-02
JP5872560B2 (ja) 2016-03-01

Similar Documents

Publication Publication Date Title
CN103229155B (zh) 高速内存系统
US7865652B2 (en) Power control by a multi-port bridge device
US7970953B2 (en) Serial ATA port addressing
KR101744465B1 (ko) 데이터를 저장하기 위한 방법 및 장치
US8156270B2 (en) Dual port serial advanced technology attachment (SATA) disk drive
EP1775896B1 (en) Network on chip system employing an Advanced Extensible Interface (AXI) protocol
JP5108261B2 (ja) 情報処理装置およびデータ通信装置
CN112543925A (zh) 用于使用专用低延迟链路的多个硬件加速器的统一地址空间
CN101882126B (zh) 多个HT总线到单个PCIe总线的桥接装置及其方法
US7308523B1 (en) Flow-splitting and buffering PCI express switch to reduce head-of-line blocking
JP4928732B2 (ja) データ転送システム及び電子機器
US7962676B2 (en) Debugging multi-port bridge system conforming to serial advanced technology attachment (SATA) or serial attached small computer system interface (SCSI) (SAS) standards using idle/scrambled dwords
JP2006201909A (ja) データ転送システム及び電子機器
US20050060477A1 (en) High-speed I/O controller having separate control and data paths
US20040151175A1 (en) Transparent data format within host device supporting differing transaction types
US9201599B2 (en) System and method for transmitting data in storage controllers
JP2006092286A (ja) データ転送装置及び画像形成システム
JP2005346629A (ja) 画像処理装置
US8135923B2 (en) Method for protocol enhancement of PCI express using a continue bit
JP2006113798A (ja) データ転送システム、受信バッファ装置、データ転送システムの仕様設定方法及び画像形成システム
US12159035B2 (en) Peripheral component interconnect express interface device and operating method thereof

Legal Events

Date Code Title Description
C06 Publication
PB01 Publication
C10 Entry into substantive examination
SE01 Entry into force of request for substantive examination
C14 Grant of patent or utility model
GR01 Patent grant
C41 Transfer of patent application or patent right or utility model
TR01 Transfer of patent right

Effective date of registration: 20161202

Address after: New York grams of Armand

Patentee after: International Business Machines Corp.

Address before: Texas, USA

Patentee before: Texas Storage System Co.,Ltd.

CF01 Termination of patent right due to non-payment of annual fee
CF01 Termination of patent right due to non-payment of annual fee

Granted publication date: 20161109