CN103219371A - Trench gate type insulated gate bipolar translator (IGBT) with double-face diffusion residual layer and manufacturing method thereof - Google Patents

Abstract

The invention discloses a trench gate type IGBT with a double-sided diffused residual layer and a manufacturing method thereof. The IGBT includes an N-type base region, a P-type base region, a back P+ collector region, an N+ emitter region, and a P+ emitter region, gate oxide layer, emitter, gate electrode and collector; the N-type base region is composed of N+ diffusion residual layer, N-drift region and N+ buffer layer stacked in sequence, and the P-type base region is located in the N+ diffusion residual layer Above, the doping concentration of the N+ diffusion residual layer and the N+ buffer layer gradually increases outward from the boundary with the N-drift region. The IGBT manufacturing method of the present invention is characterized in that a double-sided high-temperature deep junction diffusion is used to simultaneously form a non-uniformly doped N+ layer on the front and back sides, and the N+ diffusion residual layer formed on the front side of the N-drift region improves the ion density of the N-type front side. The doping concentration increases the conductance modulation effect. The N+ buffer layer on the back reduces the turn-on voltage drop of the device and improves the turn-off time of the device. The manufacturing method reduces the steps of manufacturing the IGBT and reduces the cost.

Description

A trench gate type IGBT with double-sided diffusion residue layer and its manufacturing method

technical field

The invention relates to the field of semiconductor power devices and manufacturing, in particular to a trench gate type IGBT structure with double-sided diffusion residual layers and a manufacturing method thereof.

Background technique

IGBT is an insulated gate bipolar transistor (Insulated Gate Bipolar Transistor, referred to as IGBT) is a combination of metal oxide semiconductor field effect transistor (MOSFET) gate voltage control characteristics and bipolar junction transistor (BJT) low conduction A semiconductor power device with resistive characteristics. With the characteristics of voltage control, large input impedance, low driving power, small on-resistance, low switching loss and high operating frequency, it is an ideal semiconductor power switching device with broad development and application prospects.

According to whether there is a high-concentration buffer layer of the same concentration type as the drift region between the drift region and the collector (the term collector and anode is often used interchangeably) in the back structure of the IGBT, the IGBT can be divided into punch-through type (PT-IGBT) and Non-punch-through (NPT-IGBT) two structures. The PT-IGBT type has a buffer layer structure, while the NPT-IGBT has no buffer layer structure. The general PT-IGBT refers to the formation of low-concentration uniformly doped epitaxy as a drift region on the top of the high-concentration buffer layer of the same concentration type by epitaxial deposition, while the epitaxy is deposited on the silicon substrate of the opposite concentration type. The forward blocking voltage (also referred to as withstand voltage) of IGBT is determined by the doping concentration and thickness of the drift region. IGBTs with high forward blocking voltage require a thick drift region. For example, the forward blocking voltage is 1000V The thickness of the drift region required above is generally above 100um, and the deposition technology using thick-layer epitaxy is very difficult, and the manufacturing cost is high, making it difficult to realize. In NPT-IGBT, the front structure is first fabricated on a uniformly doped low-concentration doped single crystal substrate with a thickness of hundreds of microns, and then the back of the substrate is thinned by grinding and etching to make the drift region meet the requirements. The thickness required for the forward blocking voltage, and then ion implantation and activation methods are used to form collectors of the opposite concentration type on the back. It does not need to deposit a thick epitaxial layer, so it is suitable for manufacturing IGBTs with high forward blocking voltage, but since there is no buffer layer, the depletion layer formed by the reverse bias voltage needs to stop in the drift region when it withstands the forward blocking voltage , otherwise it will form a punch-through breakdown and reduce the forward blocking voltage, and the use of the buffer layer can make the depletion layer stop in the buffer layer, so the drift region required to achieve the same forward blocking voltage, NPT-IGBT needs more than The thicker drift region of PT-IGBT has a larger forward voltage drop than that of PT-IGBT with the same forward blocking voltage, so the current capability is relatively poor. Moreover, for the manufacture of IGBTs with a forward blocking voltage of about 1000-2000V, the thickness of the drift region is mostly about one or two hundred microns. It is quite difficult to manufacture devices on such a thin silicon wafer. Equipment intended for high-volume production can have high fragmentation rates without costly equipment modifications.

The Chinese patent with the notification number CN1138307C discloses a new structure of IGBT. The manufacturing method is to use high temperature diffusion to carry out deep junction diffusion of N+ on both sides of the N-substrate, then grind off the diffusion layer on one side, make a front structure on it, and then grind the back side, and keep the diffusion layer on the back side to the required level. The thickness is used as an N+ buffer layer, and then ion implantation is performed on this N+ buffer layer to form a back P+ anode region. The IGBT with this structure has the characteristics of small on-state voltage drop of PT-IGBT and short switching time of NPT-IGBT. This invention innovates the back structure of the IGBT and its manufacturing method, which is similar to the soft punch-through IGBT (SPT-IGBT) structure proposed by ABB and the light punch-through IGBT (LPT-IGBT) structure proposed by Mitsubishi Electric Corporation. Effectively reduce the power consumption of the device, but the front structure is still completed by traditional methods without innovation.

From the perspective of the front structure of the IGBT, whether it is a planar gate type or a trench gate type structure, due to the forward operation, the minority carriers injected from the back collector to the drift region are directed to the front emitter (the term emitter and The cathode is often used interchangeably) the concentration gradually decreases during the movement, so that the closer to the front emitter, the weaker the conductance modulation and the greater the resistance. In order to minimize the near-surface resistance and reduce the forward conduction voltage drop, it is necessary to take Measures to increase the carrier concentration near the surface, such as "Carrier Stored Trench-Gate Bipolar Transistor (CSTBT)-A Novel Power Device for High Voltage Application" (carrier storage trench A layer of dopant concentration formed between the P-type base region and the N-type drift region is described in IEEE Publication 0-7803-3106-0/96 of Trench-Gate Bipolar Transistor—A New Type of High-Voltage Power Device The carrier storage layer, which is slightly denser than the N-type drift region, forms a potential barrier with the N-type drift region, allowing minority carriers to gather here again by this potential barrier in the process of moving to the P-type base region, so Increase the carrier concentration in this area, improve the conductance modulation, reduce the on-voltage drop, and increase the current capability; another example is the title "NovelEnhanced-Planar IGBT Technology Rated up to6. 5kV for Lower Losses and Higher SOA Capapbility" (Novel Planar Enhanced IGBT Manufacturing Technology with Rated Voltage Up to 6.5kV for Lower Power Consumption and Higher Safe Operating Area) in IEEE Publication 1-4244-9715-0/06 The described planar enhancement layer plays the same role as the carrier storage layer. However, both the carrier storage layer and the planar enhancement layer are formed by adding additional process steps when forming the front MOSFET structure during the IGBT manufacturing process, and the increase in the process steps will inevitably increase the manufacturing cost.

Contents of the invention

The present invention provides a trench gate type IGBT with a double-sided diffusion residue layer and its manufacturing method, which forms a diffusion residue layer on both sides of the front and back through one-step high-temperature deep junction diffusion, and then through thinning and other processes, the front The residual diffusion layer can play a role in increasing the carrier concentration on the front side, while the residual diffusion layer on the back forms a buffer layer, so that the IGBT has the characteristics of a punch-through device.

A trench gate type IGBT with a double-sided diffused residual layer, including an N-type base region, a P-type base region, a back P+ collector region, an N+ emitter region, a P+ emitter region, a gate oxide layer, an emitter, Gate electrode and collector; the N-type base region is composed of N+ diffused residual layer, N-drift region and N+ buffer layer stacked in sequence, the P-type base region is located on the N+ diffused residual layer, N+ emitter region, P+ The emitter region is located above the P-type base region, and the trench is located on both sides of the N+ diffusion residual layer and the P-type base region. The inner gate electrode; the back P+ collector region is located under the N+ buffer layer, and the collector is located under the back P+ collector region; the N+ diffusion residual layer and the N+ buffer layer are doped outward from the boundary with the N-drift region concentration gradually increased.

The N-drift region is a constant doping concentration region formed by a silicon single crystal, and its thickness and doping concentration are determined by the forward blocking voltage of the IGBT. The forward blocking voltage is positively related to the thickness and negatively related to the doping concentration. .

The thickness of the N+ buffer layer is preferably 10-50um, if it is too thick, the conduction voltage drop will increase, and if it is too thin, the electric field interruption effect will be insufficient, resulting in a decrease in the forward blocking voltage. The doping concentration of the interface between the N+ buffer layer and the back P+ collector region is positively related to the thickness of the N+ buffer layer. Since the existence of the N+ buffer layer can make the N- drift region thinner when reaching the same forward blocking voltage, the turn-on voltage drop will also be lower.

If the thickness of the N+ diffused residual layer is small, the impurity doping concentration on the surface will be relatively low, the potential barrier formed between it and the N- drift region will be low, the conductance modulation effect will be weak, and the conduction voltage drop will be low. ; If the N+ diffusion residual layer is thicker and the doping concentration on the surface is higher, the potential barrier formed between it and the N- drift region is higher, and the conductance modulation effect is stronger, which can reduce the conduction voltage drop more, but this is also It will cause a reduction in the forward blocking voltage, so the thickness of the N+ diffusion residual layer is preferably 3-15um.

The PN junction formed by the N+ diffusion residue layer and the P-type base region is a linear graded junction, which is beneficial to improving the withstand voltage of the device. The PN junction formed by the N+ diffused residual layer and the P-type base region has a deep junction structure, because the N+ diffused residual layer is retained due to deep diffusion and then thinned, so it and the P-type base region The formed PN junction has a deep junction characteristic that is beneficial to improving the withstand voltage of the device. In the case where the N+ diffused residual layer has a linear gradient and deep junction structure, the N+ diffused residual layer has little effect on the forward blocking voltage, that is, under the condition of increasing the same collector current, the forward blocking voltage The reduction will be much smaller. At the same time, the controllability and stability of the deep junction are also good, and the collector current and forward blocking voltage of the device have little discrete fluctuation with the process.

The present invention also provides a method for manufacturing the trench gate type IGBT with double-side diffusion residual layers. The manufacturing method is simple and convenient, which is beneficial to reduce the increase of production cost, and meanwhile can increase the current capability of the device on the basis of not significantly reducing the forward blocking voltage.

A method for manufacturing a trench gate IGBT with a double-sided diffusion residual layer, comprising:

(1) The first diffusion region and the second diffusion region are simultaneously formed on both sides of the N-type single crystal silicon through a double-sided high-temperature deep junction diffusion;

(2) performing a thinning process on the first diffusion region and the second diffusion region respectively to form an N+ diffusion residual layer and an N+ buffer layer;

(3) Form a P-type base region, an N+ emitter region, a P+ emitter region, and an emitter on the N+ diffused residual layer. The trenches are located on both sides of the N+ diffused residual layer and the P-type base region. In the trenches on both sides of the type base region, a gate oxide layer along the sidewall, end and bottom of the trench and a gate electrode contained in the gate oxide layer are sequentially formed;

(4) On the N+ buffer layer, the back P+ collector region is formed by implanting ions and activated, and the back P+ collector region is metallized to form a collector.

The first N+ diffusion region and the second N+ diffusion region are N+ non-uniformly doped regions. For the first diffusion region, since it will form an N+ diffusion residual layer after thinning, its non-uniform doping has a residual error distribution, which has the advantage of increasing the surface impurity concentration while having little effect on the forward blocking voltage . For the second N+ diffusion region, the N+ buffer layer is formed by thinning, so that the electric field can be stopped here in the forward blocking state. Therefore, under the same forward blocking voltage, the N-drift region can be reduced, so that The conduction voltage drop is reduced and the current capability is improved.

The trench gate type IGBT of the present invention, due to its special manufacturing method: the N+ diffusion residue layer and the N+ buffer layer are double-sided high-temperature deep junction diffusion at the same step, and are respectively thinned to form a diffusion residue layer structure; The N+ diffusion residual layer above the drift region, and the potential barrier formed by the N- drift region increase the doping concentration of impurity ions on the front of the N-type base region, forming a strong conductance modulation effect, thereby effectively reducing the conduction voltage drop of the IGBT. Improve the current capability of the IGBT. At the same time, since the N+ diffusion residual layer formed by this manufacturing method has a linear gradient and a deep junction structure, the impact on the forward blocking voltage is small, that is, in the case of increasing the same collector current, the forward blocking voltage The reduction will be much smaller. At the same time, the controllability and stability of the deep junction are also good, and the collector current and forward blocking voltage of the device have little discrete fluctuation with the process.

The N+ diffused residual layer on the front of the N-drift region of the trench gate IGBT of the present invention is formed by first high-temperature diffusion, and then through grinding, polishing and other thinning processes. These are all original normal processes, and no additional process steps are required. , can reduce the manufacturing cost. The diffusion residual layer on the back forms an N+ buffer layer after the thinning process, and the N+ buffer layer can make the thickness of the N-drift region required by the IGBT smaller when reaching the same forward blocking voltage, so the conduction of the device The voltage drop can be reduced, the current capability can be increased, and the off-time can be improved.

The trench gate type IGBT of the present invention forms non-uniformly doped N+ layers on the front and back sides simultaneously through high-temperature deep junction diffusion, and thins them separately to form a double-sided diffusion residual layer structure, that is, the front N+ diffusion residual layer and N+ buffer layer on the back side. The structure of using N+ diffused residual layer on the front side can effectively reduce the conduction voltage drop and increase the collector current, and at the same time, the impact on the forward blocking voltage of the IGBT device can be reduced to a very low level, and the consistency of product performance is also improved. . The N+ buffer layer on the back reduces the turn-on voltage drop of the device and improves the turn-off time of the device. The manufacturing method of the IGBT described in the present invention can simultaneously generate the N+ diffusion residual layer structure on the front and the back side, and only needs a thinning process to generate the front diffusion residual layer and the back buffer layer, reducing the steps of the entire process flow , so that the overall manufacturing cost can be reduced. Therefore, it has high industrial applicability.

Description of drawings

Fig. 1 is the sectional structure schematic diagram of IGBT of the present invention;

Fig. 2a～Fig. 2g are schematic cross-sectional views of each structure of the IGBT manufacturing process of the present invention;

Wherein, Fig. 2 a is the sectional view of original N-type silicon chip;

Fig. 2b is a cross-sectional view of the silicon wafer shown in Fig. 2a after a high-temperature deep junction diffusion and two diffusion regions are simultaneously formed;

Fig. 2c is a cross-sectional view of the front diffusion region of the silicon wafer shown in Fig. 2b after thinning;

Figure 2d is a cross-sectional view of the silicon wafer shown in Figure 2c after forming the front structure of the IGBT;

Fig. 2e is a schematic diagram of the structure after the thinning process of the diffusion region on the back of the silicon wafer shown in Fig. 2d;

Figure 2f is a cross-sectional view of the rear P+ anode region formed after ion implantation and activation on the back of the silicon wafer shown in Figure 2e;

Figure 2g is a cross-sectional view of the back side of the P+ anode region of the silicon wafer shown in Figure 2f after metallization to form an anode;

Figure 3 is a comparison diagram of the influence of the thickness of the residual layer on the front side on the forward blocking voltage and collector current.

Detailed ways

As shown in Figure 1, a trench gate IGBT with a double-sided diffused residual layer includes an N-type base region, a P-type base region 29, a back P+ collector region 21, an N+ emitter region 26, and a P+ emitter Region 27, gate oxide layer 24, emitter 28, gate electrode 25 and collector 20, wherein the N-type base region is composed of N+ diffusion residue layer 30, N-drift region 23 and N+ buffer layer 22 in sequence. The IGBT manufacturing process As shown in Figure 2, the details are as follows:

As shown in Figure 2a, the N-type single crystal substrate 31 with a crystal orientation of <100> has a doping concentration of 4.3×10 ¹³ cm ^-3 and a thickness of 500um. According to the requirement of the forward blocking voltage ( For example, 1700V, the same below), the doping concentration can be adjusted to 1×10 ¹³ ~ 2×10 ¹⁴ cm ^-3 .

As shown in Figure 2b, after the N-type single crystal substrate undergoes a double-sided high-temperature deep junction diffusion, a first N+ diffusion region 32, an N-drift region 23 and a second N+ diffusion region 33 are formed in sequence, wherein the N-drift region The thickness of 23 can be adjusted to 100-300um according to the requirement of forward blocking voltage, and both the first N+ diffusion region 32 and the second N+ diffusion region 33 are non-uniformly doped.

As shown in Figure 2c, the first N+ diffusion region 32 is thinned by grinding and polishing to form a positive diffusion residue layer, that is, the N+ diffusion residue layer 30, and the thickness of this layer is controlled within a few microns (preferably between 3 and 15um ). After thinning, the thickness of the substrate is not less than 300um, which can ensure that the post-processing is not easy to break.

As shown in Figure 2d, on the N+ diffusion residual layer 30, the P-type base region 29 is first formed through oxidation, boron ion implantation, diffusion and other process steps, and then the surface is oxidized, boron ion implanted and oxidized, arsenic implanted, and then low temperature Anneal to form P+ emitter region 27 and N+ emitter region 26 respectively, then carry out trench photolithography, etching, etc. to form trenches, form gate oxide layer 24 by oxidation, and then deposit polysilicon on gate oxide layer 24 to form gate Electrode 25, etch the polysilicon outside the trench, isolate it by oxide, and finally deposit metal on the N+ emitter region 26 and P+ emitter region 27 after photolithography and etching to form the emitter 28, so that the IGBT The positive structure is formed.

As shown in Figures 2e, 2f, and 2g, the second N+ diffusion region 33 is thinned by back grinding and polishing to form a diffusion residual layer on the back, that is, the N+ buffer layer 22, and boron is implanted on the N+ buffer layer 22 and activated to form Behind the P+ anode region 21 , the anode 20 is formed after depositing metal on the P+ anode region 21 .

For the trench gate type IGBT device made by the manufacturing method of the above embodiment, under a certain area, the forward resistance of the device with different front diffusion residue layer 30 thickness and no front diffusion residue layer (that is, the thickness of the residue layer is 0um) See Figure 3 for a comparison of standoff voltage and collector current. The leftmost point of the two curves in the figure is the forward blocking voltage and collector current when there is no diffusion residual layer. It can be seen that the forward blocking voltage at this time is 2068V, and the collector current is 344A; while on the front When the thickness of the residual layer is 8um, the forward blocking voltage is 2044V, and the collector current is 366A. It can be seen from the comparison results that compared with the IGBT without the front residual layer of diffusion, the forward blocking voltage is only reduced by about 1% when the front residual layer is 8um, while the collector current increases by 22A, which is more than 6%, effectively improving the performance of the device. This is because the N+ diffusion residual layer formed on the front side of the N- drift region of the IGBT is a linear slowly changing deep junction structure, so the impact on the forward blocking voltage of the device is much smaller. It can be seen from Figure 3 that when the diffusion residual layer is less than 8um, the forward blocking voltage drops very little. Therefore, the controllability and stability of the residual layer technology are also very good, and the process fluctuation of the implantation depth or the thickness of the residual layer has relatively little influence on the current and withstand voltage performance of the device.

Claims (8)

1. the type of the trench gate with a Double side diffusion residual layer IGBT, comprise N-type base, P type base, back of the body P+ collector area, N+ emitter region, P+ emitter region, gate oxide, emitter, gate electrode and collector electrode; It is characterized in that: described N-type base is comprised of the N+ diffusion residual layer, N-drift region and the N+ resilient coating that stack gradually, P type base is positioned on N+ diffusion residual layer, N+ emitter region, P+ emitter region are positioned on P type base, groove is positioned at N+ diffusion residual layer and both sides, P type base, described groove has along its sidewall, the gate oxide of end and bottom and be included in the gate electrode in gate oxide; Back of the body P+ collector area is positioned under the N+ resilient coating, and collector electrode is positioned under back of the body P+ collector area; Initial outside doping content increases gradually from the border with the N-drift region for N+ diffusion residual layer and N+ resilient coating.

2. the type of the trench gate with Double side diffusion residual layer IGBT according to claim 1 is characterized in that: the thickness of described N+ diffusion residual layer is 3～15um.

3. the type of the trench gate with Double side diffusion residual layer IGBT according to claim 1, it is characterized in that: described N+ buffer layer thickness is 10～50um.

4. the type of the trench gate with Double side diffusion residual layer IGBT according to claim 1, it is characterized in that: described N-drift region is the doping content constant region.

5. the type of the trench gate with Double side diffusion residual layer IGBT according to claim 1 is characterized in that: described N+ diffusion residual layer is linear graded junction with the PN junction of described P type base formation.

6. the type of the trench gate with Double side diffusion residual layer IGBT according to claim 1 is characterized in that: described N+ diffusion residual layer has deep structure with the PN junction of described P type base formation.

7. the manufacture method of the type of the trench gate with Double side diffusion residual layer IGBT according to claim 1, is characterized in that, comprising:

(1) form a N+ diffusion region and the 2nd N+ diffusion region in the n type single crystal silicon both sides by two-sided High temperature diffusion once simultaneously;

(2) respectively attenuate is carried out in a N+ diffusion region and the 2nd N+ diffusion region and be processed to form N+ diffusion residual layer and N+ resilient coating;

(3) form P type base, N+ emitter region, P+ emitter region on N+ diffusion residual layer, emitter, groove is positioned at N+ diffusion residual layer and both sides, P type base, form successively along trenched side-wall the gate oxide of end and bottom and be included in the gate electrode in gate oxide in the groove of N+ diffusion residual layer and both sides, P type base;

(4) form back of the body P+ collector area by injecting ion and activating on the N+ resilient coating, after the metallization of back of the body P+ collector area, form collector electrode.

8. the manufacture method of the type of the trench gate with Double side diffusion residual layer IGBT according to claim 7, it is characterized in that: a described N+ diffusion region and the 2nd N+ diffusion region are N+ non-uniform doping districts.

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