CN103199187B - A kind of LED encapsulation substrate and encapsulating structure and preparation method thereof - Google Patents

A kind of LED encapsulation substrate and encapsulating structure and preparation method thereof Download PDF

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Publication number
CN103199187B
CN103199187B CN201310137420.XA CN201310137420A CN103199187B CN 103199187 B CN103199187 B CN 103199187B CN 201310137420 A CN201310137420 A CN 201310137420A CN 103199187 B CN103199187 B CN 103199187B
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electrode
groove structure
led
area
conductive layer
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CN103199187A (en
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夏德玲
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Anhui Sanan Optoelectronics Co Ltd
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Anhui Sanan Optoelectronics Co Ltd
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Priority to CN201310137420.XA priority Critical patent/CN103199187B/en
Publication of CN103199187A publication Critical patent/CN103199187A/en
Priority to PCT/CN2014/071051 priority patent/WO2014169721A1/en
Priority to US14/748,393 priority patent/US20150295148A1/en
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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/48—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor body packages
    • H01L33/52—Encapsulations
    • H01L33/54—Encapsulations having a particular shape
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/02—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies
    • H01L33/20—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies with a particular shape, e.g. curved or truncated substrate
    • H01L33/22—Roughened surfaces, e.g. at the interface between epitaxial layers
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/005—Processes
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/36—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the electrodes
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/48—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor body packages
    • H01L33/483—Containers
    • H01L33/486—Containers adapted for surface mounting
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/48—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor body packages
    • H01L33/52—Encapsulations
    • H01L33/56—Materials, e.g. epoxy or silicone resin
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/48—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor body packages
    • H01L33/62—Arrangements for conducting electric current to or from the semiconductor body, e.g. lead-frames, wire-bonds or solder balls
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10—Bump connectors; Manufacturing methods related thereto
    • H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
    • H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
    • H01L2224/161—Disposition
    • H01L2224/16151—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/16221—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/16225—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L2224/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
    • H01L2224/321—Disposition
    • H01L2224/32151—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/32221—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/32225—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
    • H01L2224/732—Location after the connecting process
    • H01L2224/73201—Location after the connecting process on the same surface
    • H01L2224/73203—Bump and layer connectors
    • H01L2224/73204—Bump and layer connectors the bump connector being embedded into the layer connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10—Details of semiconductor or other solid state devices to be connected
    • H01L2924/1015—Shape
    • H01L2924/10155—Shape being other than a cuboid
    • H01L2924/10158—Shape being other than a cuboid at the passive surface
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2933/00—Details relating to devices covered by the group H01L33/00 but not provided for in its subgroups
    • H01L2933/0008—Processes
    • H01L2933/0016—Processes relating to electrodes
    • H—ELECTRICITY
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    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2933/00—Details relating to devices covered by the group H01L33/00 but not provided for in its subgroups
    • H01L2933/0008—Processes
    • H01L2933/0033—Processes relating to semiconductor body packages
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2933/00—Details relating to devices covered by the group H01L33/00 but not provided for in its subgroups
    • H01L2933/0008—Processes
    • H01L2933/0033—Processes relating to semiconductor body packages
    • H01L2933/005—Processes relating to semiconductor body packages relating to encapsulations
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2933/00—Details relating to devices covered by the group H01L33/00 but not provided for in its subgroups
    • H01L2933/0008—Processes
    • H01L2933/0033—Processes relating to semiconductor body packages
    • H01L2933/0066—Processes relating to semiconductor body packages relating to arrangements for conducting electric current to or from the semiconductor body

Abstract

The invention discloses the base plate for packaging that one is applicable to the crystal-coated light-emitting diodes of eutectic connection process, it at least comprises: substrate body, there is first surface, it is distributed with at least one unit, the corresponding LED core grains of described each unit, it has first area and the second area of electric isolution each other; Groove structure, between two regions, its open top width is less than the width of described core grain to be packaged.It can solve originally eutectic processing procedure flip chip type light-emitting diode because chip and substrate pitch are from too small and bottom cannot be carried out to fill glue material (under-fill) processing procedure and cause subsequent substrate to remove and problem that surface coarsening processing procedure cannot carry out.

Description

A kind of LED encapsulation substrate and encapsulating structure and preparation method thereof
Technical field
The invention belongs to the encapsulation field of light-emitting diode, be specifically related to a kind of base plate for packaging and encapsulating structure and preparation method thereof.
Background technology
(English is Flip-chip to crystal covering type, be called for short FC) application that is packaged in light-emitting diode along with its superior heat dissipation characteristics and preferably assembly mechanical strength be proved gradually and volume production, flip-chip type package technology is one of important topic in the application of light-emitting diode.The application that flip-chip type package is applied to light-emitting diode is mainly divided into two kinds of packaged types: the first is golden bump bond processing procedure (English is Au-stubbumpingprocess), system first by golden projection kind on base plate for packaging, the relative position of its golden projection on sheet material is identical with the electrode on chip, then by ultrasonic waves pressing, the golden bump bond on the electrode on chip and base plate for packaging is made to complete electric connection, this method is low to base plate for packaging requirement degree, processing procedure elasticity is large, but its golden projection cost is high, and chip contraposition needs higher precision, therefore board is expensive, speed of production is slow, cause whole production cost too high, the second is eutectic connection process (English is Eutecticbondingprocess), with evaporation or sputter, selected eutectic metal is made on chip, by low temperature scaling powder, chip is conformed on base plate for packaging in advance, reflow under the fusing point higher than eutectic metal, chip is formed with base plate for packaging engage, metal cost is low, and speed of production is fast, low to board required precision, but this processing procedure to base plate for packaging evenness and its processing procedure required precision high.In addition, in order to increase the luminous efficiency of light-emitting diode, further the growth substrate of light-emitting diode is removed, this is a method effectively increasing crystal-coated light-emitting diodes luminous efficiency, but the space that flip-chip type package stays between chip and base plate for packaging, has a strong impact on the yield that growth substrate removes.
Summary of the invention
The invention provides the base plate for packaging of the crystal-coated light-emitting diodes being applicable to eutectic connection process and encapsulating structure and making side thereof, solve eutectic processing procedure flip chip type light-emitting diode originally because chip and substrate pitch are from too small and bottom cannot be carried out to fill glue material (under-fill) processing procedure and cause subsequent substrate to remove and problem that surface coarsening processing procedure cannot carry out.
The invention provides the base plate for packaging that one is applicable to the crystal-coated light-emitting diodes of eutectic connection process, comprise: substrate body, there is first surface, it is distributed with at least one unit, the corresponding LED core grains to be packaged of a described unit, it has first area and the second area of electric isolution each other; Groove structure, between two regions, its open top opening is towards LED core grains to be packaged, and width is less than the width of described LED core grains to be packaged.
In some embodiments of the invention, described groove structure at least has the sidewall that a side opening is positioned at substrate body.
In some embodiments of the invention, the cross sectional shape of described groove structure is rectangle or inverted trapezoidal or del or arc.
In some embodiments of the invention, the difference in height of described groove structure is between 50 microns to 300 microns.
In some embodiments of the invention, the open top width of described groove structure is between 100 microns to 1000 microns.
In some embodiments of the invention, described groove structure be rectangle or inverted trapezoidal time, definition base plate for packaging has first surface, second surface and the 3rd surface, wherein second surface to be positioned under first surface and second surface is positioned between two first surfaces in relative altitude, 3rd surface is connected with first surface and second surface, then easy understand, and two second surfaces and the 3rd surface form groove structure.
In some embodiments of the invention, described groove structure be rectangle or inverted trapezoidal time, second surface and the 3rd surface crossing angle between 45 degree to 90 degree.
In some embodiments of the invention, described substrate body can be Si, AlN, Al 2o 3, the materials such as epoxy molding material (English is EpoxyMoldingCompound, is abbreviated as EMC).
The present invention also provides one to be applicable to the encapsulating structure of the crystal-coated light-emitting diodes of eutectic connection process, comprise: substrate body, there is first surface, it is distributed with at least one unit, the corresponding LED core grains to be packaged of a described unit, it has first area and the second area of electric isolution each other; Groove structure, between two regions, its open top width is less than the width of described LED core grains to be packaged, and groove structure at least has the sidewall that a side opening is positioned at substrate body; First conductive layer, is positioned on first area; Second conductive layer, is positioned on second area; Light-emitting diode chip for backlight unit, has the first electrode and the second electrode, has gap between two electrodes; First conductive layer and the first electrode, the second conductive layer with the contraposition between two of the second electrode and die bond be connected; Glue material, inserts to the gap between the first electrode and the second electrode and groove structure.
The present invention reoffers a kind of encapsulating structure manufacture method of crystal-coated light-emitting diodes, comprise: substrate body is provided, there is first surface, it is distributed with at least one unit, the corresponding LED core grains to be packaged of a described unit, it has first area and the second area of electric isolution each other; Substrate body first surface forms opening, form groove structure between the two regions, and open top width is less than the width of described LED core grains to be packaged, groove structure at least has the sidewall that a side opening is positioned at substrate body, obtained base plate for packaging; The first conductive layer is made on first area; The second conductive layer is made on second area; Light-emitting diode is provided, there is the first electrode and the second electrode, between two electrodes, have gap; By the first conductive layer and the first electrode, the second conductive layer and the contraposition between two of the second electrode, adopt flip chip assembly process to make light-emitting diode die bond be connected on described base plate for packaging; Glue material is inserted to the gap between the first electrode and the second electrode and groove structure, so forms package structure for LED.
In some embodiments of the invention, on base plate for packaging body first surface, form open-topped mode, can be made by diamond cutter or through gold-tinted light shield, dry/wet etching.
In some embodiments of the invention, through chip package to the light-emitting diode on base plate for packaging, laser lift-off can be utilized further to remove its growth substrate.
In some embodiments of the invention, surface exposed after removing growth substrate, can do surface coarsening process further.
Base plate for packaging of the present invention can be applicable to crystal-coated light-emitting diodes, by the difference in height of first surface and second surface, effectively can avoid producing loose contact during chip die bond and cause component failures.Meanwhile, glue material can be utilized to insert to the gap between the first electrode and the second electrode and groove structure, the damage caused chip when post laser can be avoided to peel off growth substrate, finally by coarsening surface of epitaxial layer process, increase the light extraction efficiency of light-emitting diode.
Other features and advantages of the present invention will be set forth in the following description, and, partly become apparent from specification, or understand by implementing the present invention.Object of the present invention and other advantages realize by structure specifically noted in specification, claims and accompanying drawing and obtain.
Accompanying drawing explanation
Accompanying drawing is used to provide a further understanding of the present invention, and forms a part for specification, together with embodiments of the present invention for explaining the present invention, is not construed as limiting the invention.In addition, accompanying drawing data describe summary, is not draw in proportion.
The profile of the base plate for packaging of Figure 1A system first embodiment of the invention.
The vertical view of the base plate for packaging of Figure 1B system Figure 1A.
The profile of the base plate for packaging of Fig. 2 A system second embodiment of the invention.
The vertical view of the base plate for packaging of Fig. 2 B system Fig. 2 A.
Fig. 3 ~ Fig. 6 system is according to the part steps profile of a kind of crystal-coated light-emitting diodes manufacture method of the invention process.
In figure, each label represents:
100: base plate for packaging
100 ': base plate for packaging
101: substrate body
102: first surface
103: second surface
104: the three surfaces
105A: the first conductive layer
105B: the second conductive layer
106: groove
107: glue material
201: light-emitting diode
202: growth substrate
203: epitaxial layer
204: roughened surface
205A: the first electrode
205B: the second electrode
W1: the width of two first surfaces adjacent with second surface
W2: the width of second surface
D: the difference in height of first surface and second surface
θ: second surface and the 3rd crossing angle in surface
Embodiment
In order to understand the present invention up hill and dale, propose detailed step and composition thereof by following description, in addition, well-known composition or step are not described in details, to avoid the restriction causing the present invention unnecessary.Preferred embodiment of the present invention can be described in detail as follows, but except these are described in detail, the present invention can also implement in other embodiments widely, and scope of the present invention not circumscribed, be as the criterion with Patent right requirement scope.
For solve known base plate for packaging in crystal-coated light-emitting diodes eutectic processing procedure the shortcoming that faces, the present invention proposes base plate for packaging and the relative manufacturing process that is applicable to the crystal-coated light-emitting diodes of eutectic connection process, solve subsequent growth substrate simultaneously and remove the damage that may cause chip in processing procedure, below embodiment cooperation is illustrated base plate for packaging and the application process thereof of the present invention.
Please refer to Figure 1A ~ Figure 1B.The profile of the base plate for packaging of Figure 1A system first embodiment of the invention, the vertical view of the base plate for packaging of Figure 1B system Figure 1A.Base plate for packaging 100, comprising: substrate body 101, has first surface 102, it is distributed with at least one unit, and the corresponding LED core grains of described each unit, it has first area and the second area of electric isolution each other.As shown in Figure 1A, the cross sectional shape of groove structure is rectangle, and between two regions, its open top width W 1 is less than the width of described core grain to be packaged.As shown in Figure 1B, the both sides of groove structure are positioned at the sidewall of substrate body.
In the present embodiment, the cross sectional shape of groove structure is rectangle.First conductive layer 105A is positioned on first area, and the second conductive layer 105B, is positioned on second area.Substrate body comprises second surface 103, its relative altitude to be positioned under first surface and second surface is positioned between two first surfaces; 3rd surface 104 is connected respectively with between first surface and second surface, wherein, first surface 102, second surface 103, and the 3rd surface 104 forms groove 106.
In the present embodiment, first surface 102 and second surface 103 non-co-planar, its difference in height d is between 50 microns to 300 microns, but not as limit, this difference in height effectively can solve the problem that known eutectic processing procedure lost efficacy because of good the do not caused eutectic of substrate flatness.Wherein, the open top width W 1 of groove 106 is between 100 microns to 1000 microns.The bottom opening width W 2 of groove 106 equals the open top width W 1 of groove 106.Second surface is 90 degree with the 3rd crossing angle θ in surface, but not as limit.In addition, material main body 101 can be AlN base material, but also not as limit.
Please refer to Fig. 2 A ~ Fig. 2 B.The profile of the base plate for packaging of Fig. 2 A system second embodiment of the invention, the vertical view of the base plate for packaging of Fig. 2 B system Fig. 2 A.Base plate for packaging 100 ', comprising: substrate body 101, has first surface 102, it is distributed with at least one unit, and the corresponding LED core grains of described each unit, it has first area and the second area of electric isolution each other.As shown in Figure 2 A, the cross sectional shape of groove structure is rectangle, and between two regions, its open top width W 1 is less than the width of described core grain to be packaged.As shown in Figure 2 B, a side opening of groove structure is positioned at the sidewall of substrate body.
In the present embodiment, the cross sectional shape of groove structure is inverted trapezoidal.First conductive layer 105A, is positioned on first area, and the second conductive layer 105B, is positioned on second area.Substrate body comprises second surface 103, its relative altitude to be positioned under first surface and second surface is positioned between two first surfaces; 3rd surface 104 is connected respectively with between first surface and second surface, wherein, first surface 102, second surface 103, and the 3rd surface 104 forms groove 106.
In the present embodiment, in the present embodiment, first surface 102 and second surface 103 non-co-planar, its difference in height d between 50 microns to 300 microns, but not as limit.Wherein, the open top width W 1 of groove 106 is between 100 microns to 1000 microns.The bottom opening width W 2 of groove 106 is less than the open top width W 1 of groove 106.Second surface and the 3rd crossing angle θ in surface between 45 degree to 90 degree, but not as limit.
Please refer to Fig. 3 ~ Fig. 6, is the part steps profile according to a kind of crystal coated sealing structure of light-emitting diodes manufacture method of the invention process.In figure 3, sapphire (Al is provided 2o 3) substrate body 100 ', have first surface 102, second surface 103 and the 3rd surface 104, described 3rd surface is connected with first surface and second surface; On substrate body first surface, form an opening by diamond cutter, make second surface and the 3rd surface form groove structure; Make the first conductive layer, be positioned on described first surface; The first conductive layer 105A, the second conductive layer 105B is made respectively on first area, second area.Light-emitting diode chip for backlight unit 201 is provided, comprises: growth substrate 202, epitaxial layer 203 and the first electrode 205A and the second electrode 205B, have gap between two electrodes; By the first conductive layer 105A and the first electrode 205A, the second conductive layer 105B and the second electrode 205B contraposition between two, make light-emitting diode die bond on described base plate for packaging 100 ' with flip chip assembly process.
In the diagram, glue material 107 is filled to the gap between the first electrode and the second electrode and groove structure, glue material can select epoxy resin or silica gel or aforementioned epoxy resins, silica gel composition, the preferred silica gel of the present embodiment.In Figure 5, use laser lift-off processing procedure to remove the growth substrate 202 of light-emitting diode chip for backlight unit 201, make epitaxial layer 203 surface exposure of light-emitting diode chip for backlight unit 201.By the formation of groove 106 and the filling curable type of glue material 107, the damage that the change of light-emitting diode chip for backlight unit 201 stress when laser lift-off growth substrate 202 causes epitaxial layer 203 effectively can be avoided.In figure 6, after removing growth substrate 202, the exiting surface of the epitaxial layer 203 utilizing chemical etch process process exposed, makes it form roughened surface 204, so can increase the efficiency of light-emitting diode further.
From the invention described above execution mode, apply LED encapsulation substrate of the present invention and encapsulating structure, can solve known cover brilliant processing procedure because of substrate flatness not good the problem that lost efficacy of the eutectic that causes, further can by base plate for packaging groove structure, after light-emitting diode covers brilliant die bond to base plate for packaging, glue material is utilized to insert this groove, the damage that post laser stripping growth substrate processing procedure may cause chip can be solved, finally by the process of surface coarsening processing procedure and then the luminous efficiency of increase light-emitting diode.

Claims (11)

1. a LED encapsulation substrate, comprises:
Substrate body, has first surface, it is distributed with at least one unit, the corresponding LED core grains to be packaged of a described unit, and it has first area and the second area of electric isolution each other;
Groove structure, between two regions, its open top is towards LED core grains to be packaged, and A/F is less than the width of described LED core grains to be packaged.
2. a kind of LED encapsulation substrate according to claim 1, is characterized in that: described groove structure at least has the sidewall that a side opening is positioned at substrate body.
3. a kind of LED encapsulation substrate according to claim 1, is characterized in that: the cross sectional shape of described groove structure is rectangle or inverted trapezoidal or del or arc.
4. a kind of LED encapsulation substrate according to claim 1, is characterized in that: the difference in height of described groove structure is between 50 microns to 300 microns.
5. a kind of LED encapsulation substrate according to claim 1, is characterized in that: the open top width of described groove structure is between 100 microns to 1000 microns.
6. a package structure for LED, comprises:
Substrate body, has first surface, it is distributed with at least one unit, the corresponding LED core grains to be packaged of a described unit, and it has first area and the second area of electric isolution each other;
Groove structure, between two regions, its open top width is less than the width of described LED core grains to be packaged, and groove structure at least has the sidewall that side is positioned at substrate body;
First conductive layer, is positioned on first area;
Second conductive layer, is positioned on second area;
Light-emitting diode chip for backlight unit, has the first electrode and the second electrode, has gap between two electrodes;
By the first conductive layer and the first electrode, the second conductive layer with the contraposition between two of the second electrode and die bond be connected;
Glue material, inserts to the gap between the first electrode and the second electrode and groove structure.
7. a manufacture method for package structure for LED, comprises:
There is provided substrate body, have first surface, it is distributed with at least one unit, the corresponding LED core grains to be packaged of a described unit, it has first area and the second area of electric isolution each other;
Substrate body first surface forms opening, forms groove structure between the two regions, and open top width is less than the width of described LED core grains to be packaged, groove structure at least has the sidewall that side is positioned at substrate body, obtained base plate for packaging;
The first conductive layer is made on first area;
The second conductive layer is made on second area;
Light-emitting diode is provided, there is growth substrate, epitaxial layer, the first electrode and the second electrode, between two electrodes, have gap;
By the first conductive layer and the first electrode, the second conductive layer and the contraposition between two of the second electrode, make light-emitting diode die bond on described base plate for packaging with flip chip assembly process;
Glue material is inserted to the gap between the first electrode and the second electrode and groove structure, so forms package structure for LED.
8. the manufacture method of a kind of package structure for LED according to claim 7, is characterized in that: described glue material is epoxy resin or silica gel or aforementioned epoxy resins, silica gel composition.
9. the manufacture method of a kind of package structure for LED according to claim 7, it is characterized in that: after utilizing glue material to be filled to gap between the first electrode and the second electrode and groove structure, also comprise to adopt and peel off processing procedure, remove the growth substrate of light-emitting diode chip for backlight unit, make its epitaxial layer surface exposure.
10. the manufacture method of a kind of package structure for LED according to claim 7, is characterized in that: the difference in height of described groove structure is between 50 microns to 300 microns.
The manufacture method of 11. a kind of package structure for LED according to claim 7, is characterized in that: the open top width of described groove structure is between 100 microns to 1000 microns.
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