WO2021063035A1

WO2021063035A1 - Micro light-emitting diode chip and display panel

Info

Publication number: WO2021063035A1
Application number: PCT/CN2020/097496
Authority: WO
Inventors: 郭恩卿; 田文亚; 王程功
Original assignee: 成都辰显光电有限公司
Priority date: 2019-09-30
Filing date: 2020-06-22
Publication date: 2021-04-08
Also published as: CN112582512A; KR20220031729A; CN112582512B

Abstract

Provided are a micro light-emitting diode chip and a display panel. The micro light-emitting diode chip comprises a first-type semiconductor layer, a light-emitting layer, a second-type semiconductor layer, a first-type electrode layer, a second-type electrode layer, an insulating passivation layer, and a filler layer. The first-type semiconductor layer comprises a first protrusion and a second protrusion. A recessed region is formed between the first protrusion and the second protrusion. The light-emitting layer and the second-type semiconductor layer are stacked on the second protrusion. The first-type electrode layer covers the first protrusion and a portion of the recessed region. The insulating passivation layer covers a sidewall of the second protrusion, a portion of a surface of the second-type semiconductor layer away from the light-emitting layer and at least a portion of the first-type electrode layer positioned in the recessed region. The second-type electrode layer covers the insulating passivation layer and a portion of the surface of the second-type semiconductor layer away from the light-emitting layer. The filler layer is at least partially filled in the recessed region.

Description

Micro light emitting diode chip and display panel

Technical field

The present disclosure relates to the field of display technology, and in particular to a micro light emitting diode chip and a display panel.

Background technique

A micro light-emitting diode (μLED) display is a display that uses an LED (light-emitting diode) chip with a size below one hundred micrometers to be integrated on a substrate as display pixels to achieve image display. One pixel can be individually driven to light up, and the micro-light-emitting diode display is a self-luminous display.

In the manufacturing process of the micro-light-emitting diode display panel, the micro-light-emitting diode is transferred from the growth substrate to the temporary substrate, and then transferred to the driving backplane. Since the chip thickness of the flip-chip structure is usually only about 3 microns, it is necessary to transfer the micro-light-emitting diode from the growth substrate to the temporary substrate. When the micro light-emitting diodes are transferred in batches, the chips are prone to fracture and failure during the stress process.

Therefore, the existing micro-light-emitting diode chip has the problems of easy breakage during transfer and high transfer difficulty.

Summary of the invention

The embodiments of the present disclosure provide a micro-light-emitting diode chip and a display panel to solve the problem of difficulty in transferring the existing micro-light-emitting diode chip.

In order to achieve the foregoing objectives, the embodiments of the present disclosure provide the following technical solutions:

On the one hand, embodiments of the present disclosure provide a micro light emitting diode chip, including a first type semiconductor layer, a light emitting layer, a second type semiconductor layer, a first type electrode layer, a second type electrode layer, an insulating passivation layer, and a filling layer ,among them,

The first type semiconductor layer includes a first boss and a second boss, and a recessed area is formed between the first boss and the second boss;

A light emitting layer and a second type semiconductor layer are stacked on the second boss;

The first type electrode layer covers the first boss and part of the recessed area;

The insulating passivation layer covers the sidewalls of the second bosses, part of the side of the second type semiconductor layer away from the light emitting layer, and at least part of the first type electrode layer located in the recessed area;

The second type electrode layer covers the insulating passivation layer and a part of the second type semiconductor layer away from the light emitting layer;

The filling layer is at least partially filled in the recessed area. The micro light emitting diode chip solves the problems of difficult transfer and poor display effect.

On the other hand, an embodiment of the present disclosure also provides a display panel including the above-mentioned micro light emitting diode chip.

The display panel provided by the embodiments of the present disclosure includes the above-mentioned micro-light-emitting diode chip, and therefore also has the same advantages as those of the above-mentioned micro-light-emitting diode chip, which will not be repeated here.

Compared with the prior art, the micro light emitting diode chip provided by the embodiments of the present disclosure has the following advantages:

The micro-light-emitting diode chip provided by the embodiment of the present disclosure increases the thickness of the micro-light-emitting diode chip and reduces the thickness of the micro-light-emitting diode chip by arranging the first boss and the second boss, and by providing a filling layer between the first boss and the second boss. The possibility of the micro light-emitting diode chip breaking during the transfer process is improved, thereby improving the product yield. Further, the first type electrode layer is covered on the first boss, and the second type electrode layer is covered on the second boss, so that the first type electrode layer and the second type electrode layer jointly cover the micro light emitting diode chip Since the first type electrode layer and the second type electrode layer have a reflective function on all side walls of the, it is ensured that the light directed to the side walls can be reflected, and the problem of light crosstalk caused by light leakage on the side walls is avoided. At the same time, the first pad and the second pad are flush in the horizontal direction, which facilitates alignment during subsequent soldering.

Description of the drawings

In order to explain the embodiments of the present disclosure or the technical solutions in the prior art more clearly, the following will briefly introduce the drawings that need to be used in the description of the embodiments of the present disclosure or the prior art. Obviously, the drawings in the following description It is only a part of the embodiments of the present invention.

FIG. 1 is a first structural diagram of a micro light-emitting diode chip provided in the first embodiment of the present disclosure;

Figure 2 is a top view of Figure 1;

FIG. 3 is a second structural diagram of the micro light emitting diode chip provided in the first embodiment of the disclosure.

Detailed ways

In order to make the above objectives, features and advantages of the embodiments of the present disclosure more obvious and understandable, the technical solutions in the embodiments of the present disclosure will be described clearly and completely in conjunction with the accompanying drawings in the embodiments of the present disclosure. Obviously, the described embodiments are only a part of the embodiments of the present disclosure, rather than all the embodiments. Based on the embodiments in the present disclosure, all other embodiments obtained by those of ordinary skill in the art without creative work shall fall within the protection scope of the present disclosure.

Example one

1 to 3, the micro light emitting diode chip provided in the first embodiment of the present disclosure includes a first type semiconductor layer 10, a light emitting layer 30, a second type semiconductor layer 20, a first type electrode layer 40, and a second type electrode layer 50. An insulating passivation layer 60 and a filling layer 70, wherein the first type semiconductor layer 10 includes a first boss 11 and a second boss 12, and a recessed area is formed between the first boss 11 and the second boss 12; A light emitting layer 30 and a second type semiconductor layer 20 are stacked on the second boss 12; the first type electrode layer 40 covers the first boss 11 and a part of the recessed area, the first type electrode layer 40 and the first type semiconductor layer 10 Ohmic contact; the insulating passivation layer 60 covers the sidewalls of the second boss 12, part of the side of the second type semiconductor layer 20 away from the light emitting layer 30, and at least part of the first type electrode layer 40 in the recessed area; the second type electrode The layer 50 covers the insulating passivation layer 60 and the side of the second type semiconductor layer 20 away from the light emitting layer 30, and is in ohmic contact with the second type semiconductor layer 20; the filling layer 70 is at least partially filled in the recessed area to increase the thickness of the micro light emitting diode chip .

Specifically, in this embodiment, as shown in FIG. 1, the bottom surface of the first type semiconductor layer 10 protrudes downward to form a first boss 11 and a second boss 12, the light emitting layer 30 and the second type semiconductor layer 20 It is stacked on the second boss 12. It should be noted that the top surface of the first type semiconductor layer 10 in this embodiment is the light-emitting surface of the micro light emitting diode. Specifically, the light emitting layer 30 is formed on the bottom surface of the second boss 12, and the second type semiconductor layer 20 is formed on the bottom surface of the light emitting layer 30, that is, the light emitting layer 30 and the second type semiconductor layer 20 are formed on the opposite side of the second boss 12. One side of the light-emitting surface. It should be noted that when the bottom surfaces of the first boss 11 and the second boss 12 are flush, the first boss 11 may also be provided with a light-emitting layer 30 and a second type semiconductor layer 20 to heighten the first boss. The station 11 facilitates subsequent electrical connection and ensures the alignment accuracy during connection.

On the basis of the foregoing embodiment, the first type electrode layer 40 is formed on the first boss 11 and extends to the recessed area between the first boss 11 and the second boss 12, and the first type electrode layer 40 An ohmic contact is formed with the first type semiconductor layer 10. The insulating passivation layer 60 is formed on the second boss 12 and extends to the recessed area between the first boss 11 and the second boss 12, and the insulating passivation layer 60 covers at least a part of the first boss located in the recessed area. The type electrode layer 40 is used to isolate the first type electrode layer 40 and the second type electrode layer 50.

Further, the second type electrode layer 50 is formed on the second boss 12 in contact with the insulating passivation layer 60, and extends to the recessed area between the first boss 11 and the second boss 12, as shown in FIG. 1 In this embodiment, the second type electrode layer 50 covers a part of the insulating passivation layer 60 located in the recessed area, so as to avoid contact with the first type electrode layer 40 and cause a short circuit. The insulating passivation layer 60 covers part of the side of the second type semiconductor layer 20 away from the light emitting layer 30, and the part of the second type semiconductor layer 20 not covered by the insulating passivation layer 60 is in contact with the second type electrode layer 50, The type electrode layer 50 is connected to this part to form an ohmic contact.

On the basis of the above embodiment, there is a recessed area between the first boss 11 and the second boss 12. In this embodiment, a filling layer 70 is provided in the recessed area. In this embodiment, the filling layer 70 is set as an insulating hard material. The filling layer 70 is partially filled in the recessed area, or completely filled in the recessed area. This arrangement increases the thickness of the micro light emitting diode chip, thereby enhancing the structural strength of the micro light emitting diode chip, and reducing or avoiding the possibility of the micro light emitting diode chip breaking.

In summary, the micro light emitting diode chip provided in the first embodiment of the present disclosure is provided with a first boss 11 and a second boss 12, and a filling layer 70 is provided between the first boss 11 and the second boss 12, The thickness of the micro-light-emitting diode chip is increased, and the possibility of the micro-light-emitting diode chip being broken during the transfer process is reduced, thereby improving the product yield. Further, by covering the first type electrode layer 40 on the first boss 11, the second type electrode layer 50 covers the second boss 12, so that the first type electrode layer 40 and the second type electrode layer 50 are common Covers all the sidewalls of the micro light-emitting diode chip. Because the first type electrode layer 40 and the second type electrode layer 50 have a reflective effect, it is ensured that the light directed to the sidewall can be reflected, and the light caused by the light leakage of the sidewall is avoided. Crosstalk issues.

In a possible implementation manner, the filling layer 70 wraps the first type electrode layer 40, the insulating passivation layer 60 and the second type electrode layer 50. On the basis of the above embodiment, the filling layer 70 is at least partially filled in the recessed area between the first boss 11 and the second boss 12. In this embodiment, the filling layer 70 is also provided on the first boss 11 and The outer side of the second boss 12, that is, is disposed on the sidewalls of the first type electrode layer 40, the insulating passivation layer 60, and the second type electrode layer 50, and is used to support the first type electrode layer 40 and the insulating passivation layer 60 And the sidewalls of the second type electrode layer 50 further enhance the structural strength of the micro light emitting diode chip.

On the basis of the foregoing embodiment, further, the filling layer 70 is epoxy resin glue or spin-on glass. In this embodiment, epoxy resin glue or spin-on glass is used to form the filling layer 70, which facilitates the production of the sealing and filling layer 70. Both the epoxy resin glue and the spin-on glass are transparent, which can avoid affecting the light output rate of the micro light emitting diode chip.

In a possible implementation, the micro light emitting diode chip further includes a first pad 41 and a second pad 51, and the first pad 41 is disposed on the first type electrode layer 40 away from one of the first type semiconductor layer 10 On the other hand, the second pad 51 is disposed on the side of the second type electrode layer 50 away from the second type semiconductor layer 20. Specifically, the second pad 51 is connected to the second type electrode layer 50 formed on the second boss 12. In this embodiment, preferably, the bottom surface of the second pad 51 is connected to the bottom surface of the first pad 41. They are flush in the horizontal direction, and this arrangement facilitates alignment during subsequent welding.

There are many ways to arrange the first pad 41. For example, as shown in FIG. 1, a light-emitting layer 30 and a second type semiconductor layer 20 may be stacked on the first boss 11 for stacking the first boss 11. The first type electrode layer 40 is formed on the first boss 11 and is in contact with the first type semiconductor layer 10, the light emitting layer 30, and the second type semiconductor layer 20, respectively.

It should be noted that, in this embodiment, on the first boss 11, the first type electrode layer 40 is only in ohmic contact with the first type semiconductor layer 10, while the second type semiconductor layer 20 forms a short circuit and is located on the first boss 11. The light emitting layer 30 on the second type semiconductor layer 20 on the 11 does not emit light. It can be understood that the light emitting layer 30 and the second type semiconductor layer 20 on the first boss 11 only have the function of stacking the first pad 41 . Specifically, on the basis of the above-mentioned embodiment, the first pad 41 is formed on the first type electrode layer 40 on the first boss 11, and the first pad 41 is connected to the first type electrode layer 40. The stacked structure formed by the layer 30 and the second type semiconductor layer 20 can stack the first pad 41 so that the bottom surface of the first pad 41 is flush with the bottom surface of the second pad 51.

For another example, the first boss 11 can also be further raised by itself to achieve a height stacking effect on the first pad 41, so that the bottom surface of the first pad 41 is flush with the bottom surface of the second pad 51.

For another example, as shown in FIG. 3, the thickness of the first pad 41 itself can be increased while the thickness of the first boss 11 of the micro-light emitting diode in this embodiment is set to a smaller thickness, or the first The boss 11 is etched away.

In a possible implementation, the side of the first pad 41 away from the first type semiconductor layer 10 and the side of the second pad 51 away from the first type semiconductor layer 10 are flush in the horizontal direction, and at the same time The side of the first pad 41 away from the first type semiconductor layer 10 and the side of the filling layer 70 away from the first type semiconductor layer 10 are flush in the horizontal direction. This arrangement can simplify the manufacturing process. Alternatively, the side of the first pad 41 and the second pad 51 away from the first type semiconductor layer 10 are flush in the horizontal direction, and in the horizontal direction, the side of the first pad 41 away from the first type semiconductor layer 10 One side protrudes from the side of the filling layer 70 away from the first type semiconductor layer 10, and this arrangement facilitates alignment during subsequent soldering. On the basis of the foregoing embodiment, the filling layer 70 wraps the first type electrode layer 40, the insulating passivation layer 60, and the second type electrode layer 50, so as to protect the micro light emitting diode chip from cracking.

Based on the above-mentioned embodiments, preferably, a light-emitting layer 30 and a second-type semiconductor layer 20 are stacked on the first boss 11, and the light-emitting layer 30 and the second-type semiconductor layer 20 are used to support the first pad 41. It should be noted that the light-emitting layer 30 and the second-type semiconductor layer 20 are stacked on the side of the first boss 11 away from the light-emitting surface. Specifically, the first pad 41 is formed on the first type electrode layer 40 on the first boss 11, and the first pad 41 is connected to the first type electrode layer 40. The above-mentioned light emitting layer 30 and the second type semiconductor layer The stacked height structure formed by 20 can support and stack the first pad 41 so that the bottom surface of one pad is flush with the bottom surface of the second pad 51.

In a possible implementation manner, the cross-sectional shape of the second boss 12, the light-emitting layer 30, and the second-type semiconductor layer 20 is an inverted trapezoid with a plane perpendicular to the light-emitting surface as a cross-section. It should be noted that the cross section of the second boss 12, the light emitting layer 30, and the second type semiconductor layer 20 refers to the cross section of the laminated structure composed of the second boss 12, the light emitting layer 30, and the second type semiconductor layer 20. As shown in FIG. 1 in the embodiment, the top surface of the first type semiconductor layer 10 is the light-emitting surface, and a plane perpendicular to the top surface of the first type semiconductor layer 10 is taken as the cross section. The cross-sectional shape of the laminated structure formed by the second type semiconductor layer 20 is an inverted trapezoid. In this embodiment, the length of the bottom side of the inverted trapezoid on the side of the light-emitting surface is greater than the length of the bottom side away from the light-emitting surface. Fabrication of LED chips.

In addition, when the light emitting layer 30 and the second type semiconductor layer 20 are also formed on the first boss 11, the cross-sectional shape of the first boss 11, the light emitting layer 30, and the second type semiconductor layer 20 may also be set to an inverted trapezoid.

In a possible implementation manner, as shown in FIG. 1, the range of the base angle α of the inverted trapezoid is 10°-80°. Specifically, in this embodiment, the bottom angle of the inverted trapezoid can take any value in the range of 10° to 80°, for example, the cross-sectional shape of the laminated structure composed of the second boss 12, the light emitting layer 30, and the second type semiconductor layer 20 It is an isosceles trapezoid, and the bottom angle of the isosceles trapezoid can be set to 60°, which is convenient for the manufacture of micro-light emitting diodes.

In a possible implementation manner, the first type electrode layer 40 and the second type electrode layer 50 are metal electrode layers. On the basis of the foregoing embodiment, the first type electrode layer 40 and the second type electrode layer 50 cover the micro On the sidewall of the light emitting diode, in this embodiment, the first type electrode layer 40 and the second type electrode layer 50 are set as metal electrode layers, and the reflectivity of the metal is relatively high, which further increases the first type electrode layer 40 and the second type electrode layer 40 and the second type electrode layer. The reflectivity of the second type electrode layer 50 prevents light from the sidewalls. Preferably, the materials of the first type electrode layer 40 and the second type electrode layer 50 include silver, aluminum, etc., and silver and aluminum are common reflective metal materials, which are cheap and easy to obtain, and the manufacturing process is simple.

In a possible implementation manner, the shape of the second boss 12, the light emitting layer 30, and the second type semiconductor layer 20 is a truncated cone or a prism cone. It should be noted that the shape of the second boss 12, the light emitting layer 30, and the second type semiconductor layer 20 refers to the shape of the laminated structure composed of the second boss 12, the light emitting layer 30, and the second type semiconductor layer 20, such as As shown in FIG. 2, the laminated structure composed of the boss, the light-emitting layer 30 and the second type semiconductor layer 20 can be a truncated cone, or a truncated cone, specifically a quadrangular truncated cone. This shape can effectively simplify the manufacturing process.

Example two

The display panel provided in the second embodiment of the present disclosure includes the micro-light-emitting diode chip provided in the first embodiment. For the structure, function, and implementation of the micro-light-emitting diode chip, reference may be made to the specific description in the foregoing embodiment, and will not be repeated here. The display panel provided in this embodiment can be applied to any device with a display function including a micro light emitting diode chip, such as a mobile phone, a tablet computer, a smart watch, an e-book, a navigator, a TV, a digital camera, and the like. The display panel provided in this embodiment also has the same advantages as the micro light-emitting diode chip provided in the first embodiment, which will not be repeated here.

Finally, it should be noted that the above embodiments are only used to illustrate the technical solutions of the present disclosure, not to limit it; although the present disclosure has been described in detail with reference to the foregoing embodiments, those of ordinary skill in the art should understand that: The technical solutions recorded in the foregoing embodiments can still be modified, or some or all of the technical features can be equivalently replaced; these modifications or replacements do not make the essence of the corresponding technical solutions deviate from the technical solutions of the embodiments of the present disclosure. range.

Claims

A micro light emitting diode chip, including:

A first type semiconductor layer, the first type semiconductor layer includes a first boss and a second boss, and a recessed area is formed between the first boss and the second boss;

Stacking the light emitting layer and the second type semiconductor layer arranged on the second boss;

A first type electrode layer covering the first boss and part of the recessed area;

The second type of electrode layer;

An insulating passivation layer covering the sidewalls of the second boss, part of the side of the second type semiconductor layer away from the light emitting layer, and at least part of the first type electrode layer located in the recessed area; and

A filling layer, the filling layer is at least partially filled in the recessed area, wherein,

The second type electrode layer covers the insulating passivation layer and a part of the second type semiconductor layer away from the light emitting layer.
4. The micro light emitting diode chip of claim 1, wherein the filling layer wraps the first type electrode layer, the insulating passivation layer, and the second type electrode layer.
3. The micro light emitting diode chip of claim 2, wherein the filling layer is at least partially filled in the recessed area between the first boss and the second boss.
3. The micro light emitting diode chip according to claim 3, wherein the filling layer is further provided on the outer side of the first boss and the second boss.
The micro light emitting diode chip according to claim 1 or 2, wherein the filling layer is epoxy resin glue or spin-on glass.
The micro light emitting diode chip according to claim 1, further comprising a first bonding pad and a second bonding pad, the first bonding pad being disposed on the first type electrode layer away from the first type semiconductor layer The second pad is disposed on the side of the second type electrode layer away from the second type semiconductor layer.
The micro light emitting diode chip according to claim 4, wherein a side of the first pad away from the first type semiconductor layer and a side of the second pad away from the first type semiconductor layer The sides are flush in the horizontal direction, and the side of the first pad away from the first type semiconductor layer is flush with the side of the filling layer away from the first type semiconductor layer in the horizontal direction Or the first pad protrudes from the filling layer.
8. The micro light emitting diode chip according to claim 7, wherein a light emitting layer and a second type semiconductor layer are stacked on the first boss.
8. The micro light emitting diode chip according to claim 8, wherein the first type electrode layer is formed on the first boss and is respectively connected to the first type semiconductor layer, the light emitting layer, and the The two types of semiconductor layers are in contact.
3. The micro light emitting diode chip of claim 1, wherein the cross section of the second boss, the light emitting layer, and the second type semiconductor layer is an inverted trapezoid with a plane perpendicular to the light emitting surface as a cross section.
The micro light emitting diode chip of claim 10, wherein the bottom angle of the inverted trapezoid is in the range of 10° to 80°.
11. The micro light emitting diode chip of claim 11, wherein the inverted trapezoid is an isosceles trapezoid, and the bottom angle of the isosceles trapezoid is 60°.
The micro light emitting diode chip according to claim 1, wherein the first type electrode layer and the second type electrode layer are metal electrode layers.
The micro light emitting diode chip according to claim 13, wherein the materials of the first type electrode layer and the second type electrode layer are the same or different, and the first type electrode layer and the second type electrode layer The materials include silver and aluminum.
4. The micro light emitting diode chip according to claim 1, wherein the shape of the second boss, the light emitting layer, and the second type semiconductor layer is a truncated cone or a truncated cone.
The micro light emitting diode chip of claim 1, wherein the shape of the second boss, the light emitting layer, and the second type semiconductor layer is a quadrangular pyramid.
A display panel comprising the micro light emitting diode chip according to any one of claims 1-16.