CN103179054B - For control panel and the control method of optical network unit - Google Patents
For control panel and the control method of optical network unit Download PDFInfo
- Publication number
- CN103179054B CN103179054B CN201310076816.8A CN201310076816A CN103179054B CN 103179054 B CN103179054 B CN 103179054B CN 201310076816 A CN201310076816 A CN 201310076816A CN 103179054 B CN103179054 B CN 103179054B
- Authority
- CN
- China
- Prior art keywords
- chip
- data
- port
- sub
- message
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
Links
Landscapes
- Communication Control (AREA)
- Data Exchanges In Wide-Area Networks (AREA)
- Small-Scale Networks (AREA)
Abstract
The invention discloses a kind of control panel for optical network unit and control method.Wherein, this control panel comprises: exchanges data chip and control exchange chip, wherein, control exchange chip, be connected between cpu chip and protocol conversion chip, operation management maintain message packet for being sent by the cpu chip received sends to protocol conversion chip, and cpu chip carrys out the operating state of control protocol conversion chip by operation management maintain message packet; Exchanges data chip, be connected between cpu chip and protocol conversion chip, the first Ethernet data message for sending the cpu chip received carries out filtration treatment, obtains the second Ethernet data message, and the second Ethernet data message is sent to protocol conversion chip.By the present invention, achieve cpu port operating load little, administration configuration is simple, thus drastically increases maintainability and the stability of system.
Description
Technical field
The present invention relates to network equipment field, in particular to a kind of control panel for optical network unit and control method.
Background technology
The optical network unit (i.e. ONU equipment) of legacy equipment manufacturer adopts unique exchange chip to realize the interconnected of cpu chip and EPON physical layer (i.e. PONMAC) chip in the design, device data business connects user's next stage terminal from the SNI port of equipment from the user node interface (i.e. UNI mouth) of PONMAC chip again through exchange chip, the management mutual message of cpu chip and PONMAC chip chamber also needs by this exchange chip simultaneously, the operation management maintain message (i.e. OAM message) of communication between it needs to stamp special VLAN and Tag to distinguish usually, simultaneously serial ports turns the first Ethernet data Business Stream and also will pass through this link, cpu port processing service flow is complicated.The function that in the hardware structure of conventional electric power optical network unit, CPU needs deal with data business and managed traffic flow and serial ports to turn Ethernet service stream is filtered and packet capturing analysis, software development workload estimate is large, CPU network interface operating load is larger simultaneously, long-term heavy load work easily causes CPU deadlock problem, and equipment functional reliability is low.
The cpu chip of electric power optical network unit (i.e. ONU equipment) is separated inconvenience with the data service between passive optical network media access controller (i.e. PONMAC chip) with management data communication data stream, cpu port is when mask data business and management data communication data stream, need resolution data stream, thus make cpu port workload large, administration configuration is complicated, the maintainability of influential system and stability.
Need the data service data stream and the management service data flow that process PONMAC for the cpu port of electric power optical network unit in prior art simultaneously, cpu port operating load is larger, administration configuration is complicated, thus make the problem that the maintainability of system is poor and stability is low, at present effective solution is not yet proposed.
Summary of the invention
Cpu port for correlation technique electric power optical network unit needs the data service data stream and the management service data flow that process PONMAC simultaneously, cpu port operating load is larger, administration configuration is complicated, thus make the problem that the maintainability of system is poor and stability is low, at present effective solution is not yet proposed, for this reason, main purpose of the present invention is to provide a kind of control panel for optical network unit and control method, to solve the problem.
To achieve these goals, according to an aspect of the present invention, provide a kind of control panel for optical network unit, this control panel comprises: exchanges data chip and control exchange chip, wherein, control exchange chip, be connected between cpu chip and protocol conversion chip, operation management maintain message packet for being sent by the cpu chip received sends to protocol conversion chip, and cpu chip carrys out the operating state of control protocol conversion chip by operation management maintain message packet; Exchanges data chip, be connected between cpu chip and protocol conversion chip, the first Ethernet data message for sending the cpu chip received carries out filtration treatment, obtains the second Ethernet data message, and the second Ethernet data message is sent to protocol conversion chip.
Further, protocol conversion chip is used for the second Ethernet data message to be converted to the first passive optical network protocol data, wherein, protocol conversion chip comprises the first sub-protocol conversion chip and the second sub-protocol conversion chip, operation management maintain message packet comprises the first child-operation management maintenance message packet and the second child-operation management maintenance message packet, second Ethernet data message comprises the first sub-Ethernet data message and the second sub-Ethernet data message, first sub-protocol conversion chip, be connected with control exchange chip and exchanges data chip respectively, first sub-protocol conversion chip is for receiving the first child-operation management maintenance message packet, also for receiving the first sub-Ethernet data message, and the first sub-Ethernet data message is converted to the first sub-passive optical network protocol data, second sub-protocol conversion chip, be connected with control exchange chip and exchanges data chip respectively, the second sub-protocol conversion chip is for receiving the second child-operation management maintenance message packet, also for receiving the second sub-Ethernet data message, and the second sub-Ethernet data message is converted to the second sub-passive optical network protocol data.
Further, control panel also comprises: optical module, wherein, optical module is connected between the first sub-protocol conversion chip, the second sub-protocol conversion chip and user data port, optical module is used for carrying out photoelectric signal transformation to the first sub-passive optical network protocol data and the second sub-passive optical network protocol data, to obtain the second passive optical network protocol data, and the second passive optical network protocol data are sent to user data port.
Further, optical module comprises the first sub-optical module and the second sub-optical module, wherein, first sub-optical module, be connected between the first sub-protocol conversion chip and the first child user FPDP, for carrying out photoelectric signal transformation to the first sub-passive optical network protocol data, to obtain the 3rd sub-passive optical network protocol data, and the 3rd sub-passive optical network protocol data are sent to the first child user FPDP; Second sub-optical module, be connected between the second sub-protocol conversion chip and the second child user FPDP, for carrying out photoelectric signal transformation to the second sub-passive optical network protocol data, to obtain the 4th sub-passive optical network protocol data, and the 4th sub-passive optical network protocol data are sent to the second child user FPDP.
Further, cpu chip comprises: a SMI output port, first message output port, 2nd SMI output port, second message output port, control exchange chip comprises: a SMI input port, first controls message repeating port, second controls message repeating port, 3rd controls message repeating port, exchanges data chip comprises: the 2nd SMI input port, first data message forwarding port, second data message forwarding port, 3rd data message forwarding port, first sub-protocol conversion chip comprises: first controls message input port, first data message input port, second sub-protocol conversion chip comprises: second controls message input port, second data message input port, wherein, one SMI output port of cpu chip is connected with the SMI input port controlling exchange chip by a SMI bus, wherein, one SMI bus is for transmitting the first configuration data, control exchange chip to be used for, according to the first configuration data received, all of the port controlling exchange chip is configured to physical port transceiver mode, with the first communication relation setting up cpu chip and control between exchange chip, first message output port of cpu chip controls message repeating port by 100,000,000 data retransmission interfaces and control exchange chip first and is connected, for operation management maintain message packet being sent to control exchange chip according to the first communication relation, the the second control message repeating port controlling exchange chip controls message input port with first of the first sub-protocol conversion chip and is connected, for the first child-operation management maintenance message packet is sent to the first sub-protocol conversion chip, the 3rd control message repeating port controlling exchange chip controls message input port with second of the second sub-protocol conversion chip and is connected, for the second child-operation management maintenance message packet is sent to the second sub-protocol conversion chip, 2nd SMI output port of cpu chip is connected with the 2nd SMI input port of exchanges data chip by the 2nd SMI bus, wherein, 2nd SMI bus is for transmitting the second configuration data, the all of the port of exchanges data chip is configured to physical port transceiver mode according to the second configuration data received by exchanges data chip, to set up the second communication relation between cpu chip and exchanges data chip, second message output port of cpu chip is connected with the first data message forwarding port of exchanges data chip, for the first Ethernet data message being sent to exchanges data chip according to the second communication relation, first data message forwarding port of exchanges data chip carries out filtration treatment to the first Ethernet data message, to obtain the first sub-Ethernet data message and the second sub-Ethernet data message, second data message forwarding port of exchanges data chip is connected with the first data message input port of the first sub-protocol conversion chip by gigabit data retransmission interface, so that the first sub-Ethernet data message is sent to the first sub-protocol conversion chip, 3rd data message forwarding port of exchanges data chip is connected with the second data message input port of the second sub-protocol conversion chip, so that the second sub-Ethernet data message is sent to the second sub-protocol conversion chip.
Further, 100000000 data retransmission interfaces comprise: the 100,000,000 data input pin, 200,000,000 data input pin and the 100,000,000 data output end, gigabit data retransmission interface comprises: the first gigabit data input pin, first gigabit data output end and the second gigabit data output end, wherein, 100,000,000 data input pin of 100000000 data retransmission interfaces is connected with the first message output port of cpu chip, 100,000,000 data output end of 100000000 data retransmission interfaces controls message repeating port by the first coupling capacitance and control exchange chip first and is connected, 200,000,000 data input pin of 100000000 data retransmission interfaces is connected with the 2nd SMI output port of cpu chip, first gigabit data input pin of gigabit data retransmission interface is connected with the second data message forwarding port of exchanges data chip by the second coupling capacitance, first gigabit data output end of gigabit data retransmission interface is connected with the first data message input port of the first sub-protocol conversion chip, and the second gigabit data output end of gigabit data retransmission interface is connected with the second data message input port of the first sub-protocol conversion chip.
Further, control exchange chip also to comprise: the first standby port, data management chip also comprises: SNI port, wherein, the first standby port controlling exchange chip is connected with the first end of single port transformer, and the first control message repeating port controlling exchange chip is connected with the second end of single port transformer; 3rd end of single port transformer is connected with first memory; The SNI port of data management chip is connected with network transformer, and network transformer is connected with network socket by the first lightning protection circuit.
Further, cpu chip also comprises: jtag port, MEMC port, eLBC port and the first serial port, and wherein, the jtag port of cpu chip is connected with debug port; The MEMC port of cpu chip is connected with second memory; The eLBC port of cpu chip is connected with the 3rd memory, and the eLBC port of cpu chip is also connected with the first Extended Capabilities Port; First Extended Capabilities Port is connected with first processor, and first processor is connected with the second serial port by the second lightning protection circuit; First serial port of cpu chip is connected with the second processor; Second processor is connected with the 3rd serial port.
To achieve these goals, according to an aspect of the present invention, provide a kind of control method for optical network unit, this control method comprises: the operation management maintain message packet that cpu chip sends by control exchange chip is transmitted to protocol conversion chip, is carried out the operating state of control protocol conversion chip for cpu chip by operation management maintain message packet; Exchanges data chip carries out filtration treatment to the first Ethernet data message that the cpu chip received sends, and obtains the second Ethernet data message, and the second Ethernet data message is sent to protocol conversion chip.
Pass through the present invention, operation management maintain message packet is forwarded by controlling exchange chip, realize the communication of the operation management maintain message packet between cpu chip and protocol conversion chip, Ethernet data message is forwarded by exchanges data chip, and exchanges data chip can realize the processing capacity of the data message such as data filtering and packet capturing, realize the communication of Ethernet data message between cpu chip and protocol conversion chip, instead of the communication of Ethernet data message and operation management maintain message packet between cpu chip and protocol conversion chip is completed only by one piece of exchange chip, after Ethernet data message and operation management maintain message packet separated transmission, the port of CPU only processes separately independently message, without dissection process, simplify software cpu port workload, equipment stability improves, thus the cpu port solving electric power optical network unit in prior art needs the data service data stream and the management service data flow that process PONMAC simultaneously, cpu port operating load is larger, administration configuration is complicated, thus make the problem that the maintainability of system is poor and stability is low, achieve cpu port operating load little, administration configuration is simple, thus drastically increase maintainability and the stability of system.
Accompanying drawing explanation
Accompanying drawing described herein is used to provide a further understanding of the present invention, and form a application's part, schematic description and description of the present invention, for explaining the present invention, does not form inappropriate limitation of the present invention.In the accompanying drawings:
Fig. 1 is the structural representation of the control panel for optical network unit according to the embodiment of the present invention;
Fig. 2 is the structural representation of the control panel for optical network unit according to the embodiment of the present invention one; And
Fig. 3 is the flow chart of the control method for optical network unit according to the embodiment of the present invention.
Embodiment
It should be noted that, when not conflicting, the embodiment in the application and the feature in embodiment can combine mutually.Below with reference to the accompanying drawings and describe the present invention in detail in conjunction with the embodiments.
Fig. 1 is the structural representation of the control panel for optical network unit according to the embodiment of the present invention.As shown in Figure 1, this control panel can comprise: exchanges data chip 50 and control exchange chip 30, wherein, control exchange chip 30, be connected between cpu chip 10 and protocol conversion chip 70, operation management maintain message packet for being sent by the cpu chip received 10 sends to protocol conversion chip, and cpu chip 10 carrys out the operating state of control protocol conversion chip by operation management maintain message packet; Exchanges data chip 50, be connected between cpu chip 10 and protocol conversion chip 70, the first Ethernet data message for sending the cpu chip 10 received carries out filtration treatment, obtains the second Ethernet data message, and the second Ethernet data message is sent to protocol conversion chip 70.
Adopt control panel of the present invention, operation management maintain message packet is forwarded by controlling exchange chip, realize the communication of the operation management maintain message packet between cpu chip and protocol conversion chip, Ethernet data message is forwarded by exchanges data chip, and exchanges data chip can realize the processing capacity of the data message such as data filtering and packet capturing, realize the communication of Ethernet data message between cpu chip and protocol conversion chip, instead of the communication of Ethernet data message and operation management maintain message packet between cpu chip and protocol conversion chip is completed only by one piece of exchange chip, after Ethernet data message and operation management maintain message packet separated transmission, the port of CPU only processes separately independently message, without dissection process, simplify software cpu port workload, equipment stability improves, thus the cpu port solving electric power optical network unit in prior art needs the data service data stream and the management service data flow that process PONMAC simultaneously, cpu port operating load is larger, administration configuration is complicated, thus make the problem that the maintainability of system is poor and stability is low, achieve cpu port operating load little, administration configuration is simple, thus drastically increase maintainability and the stability of system.
In addition, adopt the hardware structure of control panel of the present invention and circuit design simple hardware and software development difficulty, simultaneously the reliability of raising equipment greatly.
In the above embodiment of the present invention, protocol conversion chip 70 is for being converted to the first passive optical network protocol data by the second Ethernet data message, wherein, protocol conversion chip 70 comprises the first sub-protocol conversion chip and the second sub-protocol conversion chip, operation management maintain message packet comprises the first child-operation management maintenance message packet and the second child-operation management maintenance message packet, second Ethernet data message comprises the first sub-Ethernet data message and the second sub-Ethernet data message, first sub-protocol conversion chip, be connected with control exchange chip 30 and exchanges data chip 50 respectively, first sub-protocol conversion chip is for receiving the first child-operation management maintenance message packet, also for receiving the first sub-Ethernet data message, and the first sub-Ethernet data message is converted to the first sub-passive optical network protocol data, second sub-protocol conversion chip, be connected with control exchange chip 30 and exchanges data chip 50 respectively, the second sub-protocol conversion chip is for receiving the second child-operation management maintenance message packet, also for receiving the second sub-Ethernet data message, and the second sub-Ethernet data message is converted to the second sub-passive optical network protocol data.
In the above embodiment of the present invention, control panel can also comprise: optical module, wherein, optical module is connected between the first sub-protocol conversion chip, the second sub-protocol conversion chip and user data port, optical module is used for carrying out photoelectric signal transformation to the first sub-passive optical network protocol data and the second sub-passive optical network protocol data, to obtain the second passive optical network protocol data, and the second passive optical network protocol data are sent to user data port.
In the above embodiment of the present invention, optical module can comprise the first sub-optical module and the second sub-optical module, wherein, first sub-optical module, be connected between the first sub-protocol conversion chip and the first child user FPDP, for carrying out photoelectric signal transformation to the first sub-passive optical network protocol data, to obtain the 3rd sub-passive optical network protocol data, and the 3rd sub-passive optical network protocol data are sent to the first child user FPDP; Second sub-optical module, be connected between the second sub-protocol conversion chip and the second child user FPDP, for carrying out photoelectric signal transformation to the second sub-passive optical network protocol data, to obtain the 4th sub-passive optical network protocol data, and the 4th sub-passive optical network protocol data are sent to the second child user FPDP.
Fig. 2 is the structural representation of the control panel for optical network unit according to the embodiment of the present invention one.As shown in Figure 2, cpu chip 10 can comprise: a SMI output port, first message output port, 2nd SMI output port, second message output port, control exchange chip 30 can comprise: a SMI input port, first controls message repeating port, second controls message repeating port, 3rd controls message repeating port, exchanges data chip 50 comprises: the 2nd SMI input port, first data message forwarding port, second data message forwarding port, 3rd data message forwarding port, first sub-protocol conversion chip can comprise: first controls message input port, first data message input port, second sub-protocol conversion chip can comprise: second controls message input port, second data message input port.
Particularly, one SMI output port of cpu chip 10 is connected with the SMI input port controlling exchange chip 30 by a SMI bus, wherein, one SMI bus is for transmitting the first configuration data, control exchange chip 30 for all of the port controlling exchange chip 30 being configured to physical port transceiver mode according to the first configuration data received, with the first communication relation setting up cpu chip 10 and control between exchange chip 30; First message output port of cpu chip 10 controls message repeating port by 100,000,000 data retransmission interfaces and control exchange chip 30 first and is connected, for operation management maintain message packet being sent to control exchange chip 30 according to the first communication relation; The the second control message repeating port controlling exchange chip 30 controls message input port with first of the first sub-protocol conversion chip and is connected, for the first child-operation management maintenance message packet is sent to the first sub-protocol conversion chip; The 3rd control message repeating port controlling exchange chip 30 controls message input port with second of the second sub-protocol conversion chip and is connected, for the second child-operation management maintenance message packet is sent to the second sub-protocol conversion chip; 2nd SMI output port of cpu chip 10 is connected with the 2nd SMI input port of exchanges data chip 50 by the 2nd SMI bus, wherein, 2nd SMI bus is for transmitting the second configuration data, the all of the port of exchanges data chip 50 is configured to physical port transceiver mode according to the second configuration data received by exchanges data chip 50, to set up the second communication relation between cpu chip 10 and exchanges data chip 50; Second message output port of cpu chip 10 is connected with the first data message forwarding port of exchanges data chip 50, for the first Ethernet data message being sent to exchanges data chip 50 according to the second communication relation; First data message forwarding port of exchanges data chip 50 carries out filtration treatment to the first Ethernet data message, to obtain the first sub-Ethernet data message and the second sub-Ethernet data message; Second data message forwarding port of exchanges data chip 50 is connected with the first data message input port of the first sub-protocol conversion chip by gigabit data retransmission interface, so that the first sub-Ethernet data message is sent to the first sub-protocol conversion chip; 3rd data message forwarding port of exchanges data chip 50 is connected with the second data message input port of the second sub-protocol conversion chip, so that the second sub-Ethernet data message is sent to the second sub-protocol conversion chip.
Particularly in fig. 2, one SMI output port is SMI1 mouth, first message output port is EMAC1 mouth, 2nd SMI output port is SMI0 mouth, second message output port is EMAC0 mouth, one SMI input port is the SMI mouth controlling exchange chip 30, first controls the P1 mouth that message repeating port is control exchange chip 30, second controls the P6 mouth that message repeating port is control exchange chip 30, 3rd controls the P5 mouth that message repeating port is control exchange chip 30, 2nd SMI input port is the SMI mouth of exchanges data chip 50, first data message forwarding port is the P0 mouth of exchanges data chip 50, second data message forwarding port is the P5 mouth of exchanges data chip 50, 3rd data message forwarding port is the P6 mouth of exchanges data chip 50.
Cpu chip 10 shown in Fig. 2 has 2 independently EMAC ports, wherein, EMAC0 mouth docks with the P0 mouth of exchanges data chip 50, the P0 mouth of exchanges data chip 50 is configured to physical port transceiver mode (i.e. PHY pattern) by the second configuration data that exchanges data chip 50 gets according to the 2nd SMI bus, and the P0 mouth of exchanges data chip 50 can realize the Message processing function such as filtration and packet capturing of data message, the P5 mouth of exchanges data chip 50 and the P6 mouth of exchanges data chip 50 are also configured to PHY pattern and are connected with the first data message input port (this port can be the UNI0 mouth of PONMACA) of the first sub-protocol conversion chip (can be PONMACA chip) and the second data message input port (this port can be the UNI0 mouth of PONMACB) of the first sub-protocol conversion chip (i.e. PONMACB chip), forward Ethernet data message by exchanges data chip 50 thus realize the administration configuration of cpu chip 10 pairs of PONMAC chips.
Cpu chip 10 docks by controlling exchange chip 30 with PONMACA chip and PONMACB chip, shows the management communication of OAM message after the second road uni port connection control exchange chip 30 of PONMACA chip and PONMACB chip with the EMAC1 cause for gossip of CPU.
After Ethernet data message and operation management maintain message packet separated transmission, the port of CPU only processes separately independently message, and without dissection process, simplify software cpu port workload, equipment stability improves.Such as, adopt the PN865X panel of the above embodiment of the present invention, use this hardware mode, stable performance, operational excellence, business configuration is quite simple.
In the above embodiment of the present invention, 100000000 data retransmission interfaces can comprise: the 100,000,000 data input pin, 200,000,000 data input pin and the 100,000,000 data output end, gigabit data retransmission interface can comprise: the first gigabit data input pin, first gigabit data output end and the second gigabit data output end, wherein, 100,000,000 data input pin of 100000000 data retransmission interfaces is connected with the first message output port of cpu chip 10, 100,000,000 data output end of 100000000 data retransmission interfaces controls message repeating port by the first coupling capacitance and control exchange chip 30 first and is connected, 200,000,000 data input pin of 100000000 data retransmission interfaces is connected with the 2nd SMI output port of cpu chip 10, first gigabit data input pin of gigabit data retransmission interface is connected with the second data message forwarding port of exchanges data chip 50 by the second coupling capacitance, first gigabit data output end of gigabit data retransmission interface is connected with the first data message input port of the first sub-protocol conversion chip, and the second gigabit data output end of gigabit data retransmission interface is connected with the second data message input port of the first sub-protocol conversion chip.
The IIC2 interface of the as shown in Figure 2 first sub-optical module is connected with the IIC0 interface of cpu chip 10 by the first iic bus, and the IIC3 interface of the second sub-optical module is connected with the IIC1 interface of cpu chip 10 by the second iic bus.Particularly, cpu chip 10 obtains the work state information of the first sub-optical module by the first iic bus, according to the work state information of the first sub-optical module, working state control is carried out to its work to make cpu chip 10, cpu chip 10 obtains the work state information of the second sub-optical module by the second iic bus, carries out working state control to make cpu chip 10 according to the work state information of the second sub-optical module to its work.
In the above embodiment of the present invention, control exchange chip 30 can also comprise: the first standby port, data management chip can also comprise: SNI port, wherein, the first standby port controlling exchange chip 30 is connected with the first end of single port transformer, and the first control message repeating port controlling exchange chip 30 is connected with the second end of single port transformer; 3rd end of single port transformer is connected with first memory; The SNI port of data management chip is connected with network transformer, and network transformer is connected with network socket by the first lightning protection circuit.Wherein, above-mentioned network socket is 4 mouthfuls of RJ45 network sockets.
Wherein, the SNI port of data management chip is expressed as P1-P4 port in fig. 2, and this port is externally connect gigabit network interface.
In the above embodiment of the present invention, cpu chip 10 also comprises: jtag port, MEMC port, eLBC port and the first serial port, and wherein, the jtag port of cpu chip 10 is connected with debug port; The MEMC port of cpu chip 10 is connected with second memory; The eLBC port of cpu chip 10 is connected with the 3rd memory, and the eLBC port of cpu chip 10 is also connected with the first Extended Capabilities Port; First Extended Capabilities Port is connected with first processor, and first processor is connected with the second serial port by the second lightning protection circuit; First serial port of cpu chip 10 is connected with the second processor; Second processor is connected with the 3rd serial port.
Wherein, the first serial port is DEBUGUART port, and second memory is program storage, and the 3rd memory is data storage, and the second serial port is serial line interface * the 4, three serial port is serial line interface * 1.
Fig. 3 is the flow chart of the control method for optical network unit according to the embodiment of the present invention.As shown in Figure 3, the method comprises the steps:
Step S102, is controlled exchange chip and the operation management maintain message packet of transmission is transmitted to protocol conversion chip, carried out the operating state of control protocol conversion chip for cpu chip by operation management maintain message packet.
Step S104, exchanges data chip carries out filtration treatment to the first Ethernet data message that the cpu chip received sends, and obtains the second Ethernet data message, and the second Ethernet data message is sent to protocol conversion chip.
Adopt control method of the present invention, operation management maintain message packet is forwarded by controlling exchange chip, realize the communication of the operation management maintain message packet between cpu chip and protocol conversion chip, Ethernet data message is forwarded by exchanges data chip, and exchanges data chip can realize the processing capacity of the data message such as data filtering and packet capturing, realize the communication of Ethernet data message between cpu chip and protocol conversion chip, cpu chip is not needed to be configured Ethernet data message and operation management maintain message packet, just and exchange chip can be controlled realize Ethernet data message between cpu chip and protocol conversion chip and the communication of operation management maintain message packet by exchanges data chip, thus the cpu port solving electric power optical network unit in prior art needs to process PONMAC(and protocol conversion chip simultaneously) data service data stream and management service data flow, cpu port operating load is larger, administration configuration is complicated, thus make the problem that the maintainability of system is poor and stability is low, achieve cpu port operating load little, administration configuration is simple, thus drastically increase maintainability and the stability of system.
It should be noted that, can perform in the computer system of such as one group of computer executable instructions in the step shown in the flow chart of accompanying drawing, and, although show logical order in flow charts, but in some cases, can be different from the step shown or described by order execution herein.
From above description, can find out, present invention achieves following technique effect: forward operation management maintain message packet by controlling exchange chip, realize the communication of the operation management maintain message packet between cpu chip and protocol conversion chip, Ethernet data message is forwarded by exchanges data chip, and exchanges data chip can realize the processing capacity of the data message such as data filtering and packet capturing, realize the communication of Ethernet data message between cpu chip and protocol conversion chip, instead of the communication of Ethernet data message and operation management maintain message packet between cpu chip and protocol conversion chip is completed only by one piece of exchange chip, after Ethernet data message and operation management maintain message packet separated transmission, the port of CPU only processes separately independently message, without dissection process, simplify software cpu port workload, equipment stability improves, thus the cpu port solving electric power optical network unit in prior art needs the data service data stream and the management service data flow that process PONMAC simultaneously, cpu port operating load is larger, administration configuration is complicated, thus make the problem that the maintainability of system is poor and stability is low, achieve cpu port operating load little, administration configuration is simple, thus drastically increase maintainability and the stability of system.
Obviously, those skilled in the art should be understood that, above-mentioned of the present invention each module or each step can realize with general calculation element, they can concentrate on single calculation element, or be distributed on network that multiple calculation element forms, alternatively, they can realize with the executable program code of calculation element, thus, they can be stored and be performed by calculation element in the storage device, or they are made into each integrated circuit modules respectively, or the multiple module in them or step are made into single integrated circuit module to realize.Like this, the present invention is not restricted to any specific hardware and software combination.
The foregoing is only the preferred embodiments of the present invention, be not limited to the present invention, for a person skilled in the art, the present invention can have various modifications and variations.Within the spirit and principles in the present invention all, any amendment done, equivalent replacement, improvement etc., all should be included within protection scope of the present invention.
Claims (8)
1. for a control panel for optical network unit, it is characterized in that, described control panel comprises: exchanges data chip and control exchange chip, wherein,
Described control exchange chip, be connected between cpu chip and protocol conversion chip, operation management maintain message packet for being sent by the described cpu chip received sends to described protocol conversion chip, and described cpu chip controls the operating state of described protocol conversion chip by described operation management maintain message packet;
Described exchanges data chip, be connected between described cpu chip and described protocol conversion chip, the first Ethernet data message for sending the described cpu chip received carries out filtration treatment, obtain the second Ethernet data message, and described second Ethernet data message is sent to described protocol conversion chip;
Described protocol conversion chip is used for described second Ethernet data message to be converted to the first passive optical network protocol data, wherein, described protocol conversion chip comprises the first sub-protocol conversion chip and the second sub-protocol conversion chip, described operation management maintain message packet comprises the first child-operation management maintenance message packet and the second child-operation management maintenance message packet, described second Ethernet data message comprises the first sub-Ethernet data message and the second sub-Ethernet data message
Described first sub-protocol conversion chip, is connected with described control exchange chip and described exchanges data chip respectively, and described first sub-protocol conversion chip is for receiving described first child-operation management maintenance message packet; Also for receiving described first sub-Ethernet data message, and described first sub-Ethernet data message is converted to the first sub-passive optical network protocol data;
Described second sub-protocol conversion chip, is connected with described control exchange chip and described exchanges data chip respectively, and described second sub-protocol conversion chip is for receiving described second child-operation management maintenance message packet; Also for receiving described second sub-Ethernet data message, and described second sub-Ethernet data message is converted to the second sub-passive optical network protocol data.
2. control panel according to claim 1, is characterized in that, described control panel also comprises: optical module, wherein,
Described optical module is connected between described first sub-protocol conversion chip, the second sub-protocol conversion chip and user data port, described optical module is used for carrying out photoelectric signal transformation to described first sub-passive optical network protocol data and described second sub-passive optical network protocol data, to obtain the second passive optical network protocol data, and described second passive optical network protocol data are sent to described user data port.
3. control panel according to claim 2, is characterized in that, described optical module comprises the first sub-optical module and the second sub-optical module, wherein,
Described first sub-optical module, be connected between described first sub-protocol conversion chip and the first child user FPDP, for carrying out photoelectric signal transformation to described first sub-passive optical network protocol data, to obtain the 3rd sub-passive optical network protocol data, and described 3rd sub-passive optical network protocol data are sent to described first child user FPDP;
Described second sub-optical module, be connected between described second sub-protocol conversion chip and the second child user FPDP, for carrying out photoelectric signal transformation to described second sub-passive optical network protocol data, to obtain the 4th sub-passive optical network protocol data, and described 4th sub-passive optical network protocol data are sent to described second child user FPDP.
4. control panel according to claim 3, it is characterized in that, described cpu chip comprises: a SMI output port, first message output port, 2nd SMI output port, second message output port, described control exchange chip comprises: a SMI input port, first controls message repeating port, second controls message repeating port, 3rd controls message repeating port, described exchanges data chip comprises: the 2nd SMI input port, first data message forwarding port, second data message forwarding port, 3rd data message forwarding port, described first sub-protocol conversion chip comprises: first controls message input port, first data message input port, described second sub-protocol conversion chip comprises: second controls message input port, second data message input port, wherein,
A described SMI output port of described cpu chip is connected with a described SMI input port of described control exchange chip by a SMI bus, wherein, a described SMI bus is for transmitting the first configuration data, the all of the port of described control exchange chip is configured to physical port transceiver mode, to set up the first communication relation between described cpu chip and described control exchange chip by described first configuration data that described control exchange chip is used for according to receiving;
The described first message output port of described cpu chip controls message repeating port by 100,000,000 data retransmission interfaces with described first of described control exchange chip and is connected, for described operation management maintain message packet being sent to described control exchange chip according to described first communication relation;
The described second control message repeating port of described control exchange chip controls message input port with described first of described first sub-protocol conversion chip and is connected, for described first child-operation management maintenance message packet is sent to described first sub-protocol conversion chip;
The described 3rd control message repeating port of described control exchange chip controls message input port with described second of described second sub-protocol conversion chip and is connected, for described second child-operation management maintenance message packet is sent to described second sub-protocol conversion chip;
The described 2nd SMI output port of described cpu chip is connected with the described 2nd SMI input port of described exchanges data chip by the 2nd SMI bus, wherein, described 2nd SMI bus is for transmitting the second configuration data, the all of the port of described exchanges data chip is configured to physical port transceiver mode according to described second configuration data received by described exchanges data chip, to set up the second communication relation between described cpu chip and described exchanges data chip;
The described second message output port of described cpu chip is connected with the described first data message forwarding port of described exchanges data chip, for described first Ethernet data message being sent to described exchanges data chip according to described second communication relation;
The described first data message forwarding port of described exchanges data chip carries out filtration treatment to described first Ethernet data message, to obtain described first sub-Ethernet data message and described second sub-Ethernet data message;
The described second data message forwarding port of described exchanges data chip is connected with the described first data message input port of described first sub-protocol conversion chip by gigabit data retransmission interface, so that described first sub-Ethernet data message is sent to described first sub-protocol conversion chip;
The described 3rd data message forwarding port of described exchanges data chip is connected with the described second data message input port of described second sub-protocol conversion chip, so that described second sub-Ethernet data message is sent to described second sub-protocol conversion chip.
5. control panel according to claim 4, it is characterized in that, described 100,000,000 data retransmission interfaces comprise: the 100,000,000 data input pin, the 200,000,000 data input pin and the 100,000,000 data output end, described gigabit data retransmission interface comprises: the first gigabit data input pin, the first gigabit data output end and the second gigabit data output end, wherein
Described 100,000,000 data input pin of described 100,000,000 data retransmission interfaces is connected with the described first message output port of described cpu chip, described 100,000,000 data output end of described 100,000,000 data retransmission interfaces controls message repeating port by the first coupling capacitance with described first of described control exchange chip and is connected, and described 200,000,000 data input pin of described 100,000,000 data retransmission interfaces is connected with the described 2nd SMI output port of described cpu chip;
The described first gigabit data input pin of described gigabit data retransmission interface is connected with the second data message forwarding port of described exchanges data chip by the second coupling capacitance, the described first gigabit data output end of described gigabit data retransmission interface is connected with the described first data message input port of described first sub-protocol conversion chip, and the described second gigabit data output end of described gigabit data retransmission interface is connected with the described second data message input port of described first sub-protocol conversion chip.
6. control panel according to claim 4, is characterized in that, described control exchange chip also comprises: the first standby port, and described data management chip also comprises: SNI port, wherein,
Described first standby port of described control exchange chip is connected with the first end of single port transformer, and described first of described control exchange chip controls message repeating port and is connected with the second end of described single port transformer; 3rd end of described single port transformer is connected with first memory;
The described SNI port of described data management chip is connected with network transformer, and described network transformer is connected with network socket by the first lightning protection circuit.
7. control panel according to claim 4, is characterized in that, described cpu chip also comprises: jtag port, MEMC port, eLBC port and the first serial port, wherein,
The described jtag port of described cpu chip is connected with debug port;
The described MEMC port of described cpu chip is connected with second memory;
The described eLBC port of described cpu chip is connected with the 3rd memory, and the described eLBC port of described cpu chip is also connected with the first Extended Capabilities Port;
Described first Extended Capabilities Port is connected with first processor, and described first processor is connected with the second serial port by the second lightning protection circuit;
Described first serial port of described cpu chip is connected with the second processor;
Described second processor is connected with the 3rd serial port.
8. for a control method for optical network unit, it is characterized in that, comprising:
The operation management maintain message packet that cpu chip sends by control exchange chip is transmitted to protocol conversion chip, is controlled the operating state of described protocol conversion chip for cpu chip by described operation management maintain message packet;
Exchanges data chip carries out filtration treatment to the first Ethernet data message that the described cpu chip received sends, and obtains the second Ethernet data message, and described second Ethernet data message is sent to described protocol conversion chip;
Wherein, described second Ethernet data message is converted to the first passive optical network protocol data by described protocol conversion chip, wherein, described protocol conversion chip comprises the first sub-protocol conversion chip and the second sub-protocol conversion chip, described operation management maintain message packet comprises the first child-operation management maintenance message packet and the second child-operation management maintenance message packet, described second Ethernet data message comprises the first sub-Ethernet data message and the second sub-Ethernet data message
Described first sub-protocol conversion chip receives described first child-operation management maintenance message packet; Also receive described first sub-Ethernet data message, and described first sub-Ethernet data message is converted to the first sub-passive optical network protocol data;
Described second sub-protocol conversion chip receives described second child-operation management maintenance message packet; Also receive described second sub-Ethernet data message, and described second sub-Ethernet data message is converted to the second sub-passive optical network protocol data.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201310076816.8A CN103179054B (en) | 2013-03-11 | 2013-03-11 | For control panel and the control method of optical network unit |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201310076816.8A CN103179054B (en) | 2013-03-11 | 2013-03-11 | For control panel and the control method of optical network unit |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| CN103179054A CN103179054A (en) | 2013-06-26 |
| CN103179054B true CN103179054B (en) | 2016-01-20 |
Family
ID=48638683
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201310076816.8A Expired - Fee Related CN103179054B (en) | 2013-03-11 | 2013-03-11 | For control panel and the control method of optical network unit |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN103179054B (en) |
Families Citing this family (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN103731203A (en) * | 2013-11-15 | 2014-04-16 | 成都市宏山科技有限公司 | EPON device networking structure with anti-thunder function |
| CN103746746B (en) * | 2013-12-11 | 2017-12-19 | 上海斐讯数据通信技术有限公司 | A kind of operation system of the network equipment |
| CN107104842B (en) * | 2017-05-23 | 2022-11-04 | 信联安宝（北京）科技有限公司 | Integrated wireless management switch with discrete power supplies |
| CN107402899A (en) * | 2017-08-02 | 2017-11-28 | 湖南利能科技股份有限公司 | A kind of extended method of IIC interfaces |
| CN111163379B (en) * | 2019-12-31 | 2022-04-05 | 博为科技有限公司 | Communication method and multi-user residential unit MDU |
| CN115297187B (en) * | 2022-07-12 | 2023-11-17 | 重庆大学 | Conversion device of network communication protocol and bus protocol and cluster system |
Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| EP2051448A1 (en) * | 2006-08-11 | 2009-04-22 | Huawei Technologies Co., Ltd. | Access network system with separated controlling and bearing and communication achieving method thereof |
| CN102624738A (en) * | 2012-03-28 | 2012-08-01 | 瑞斯康达科技发展股份有限公司 | Serial port server, protocol conversion chip and data transmission method |
| CN102638735A (en) * | 2012-04-13 | 2012-08-15 | 瑞斯康达科技发展股份有限公司 | Optical node device and business switching method thereof |
| CN202602694U (en) * | 2012-06-12 | 2012-12-12 | 江西省电力公司信息通信分公司 | Physical-isolation Ethernet switch |
-
2013
- 2013-03-11 CN CN201310076816.8A patent/CN103179054B/en not_active Expired - Fee Related
Patent Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| EP2051448A1 (en) * | 2006-08-11 | 2009-04-22 | Huawei Technologies Co., Ltd. | Access network system with separated controlling and bearing and communication achieving method thereof |
| CN102624738A (en) * | 2012-03-28 | 2012-08-01 | 瑞斯康达科技发展股份有限公司 | Serial port server, protocol conversion chip and data transmission method |
| CN102638735A (en) * | 2012-04-13 | 2012-08-15 | 瑞斯康达科技发展股份有限公司 | Optical node device and business switching method thereof |
| CN202602694U (en) * | 2012-06-12 | 2012-12-12 | 江西省电力公司信息通信分公司 | Physical-isolation Ethernet switch |
Also Published As
| Publication number | Publication date |
|---|---|
| CN103179054A (en) | 2013-06-26 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| CN103179054B (en) | For control panel and the control method of optical network unit | |
| CN103049414A (en) | Method for converting and transmitting data between FC (fiber channel) bus and CAN (controller area network) bus | |
| CN110445533A (en) | A kind of dual redundant fiber optic Ethernet Transmission system | |
| CN101719791A (en) | Optic fiber transceiver having remote monitoring function and data transmission method | |
| CN107395525A (en) | A kind of rapidIO network exchange methods of VPX power boards | |
| CN107918325A (en) | Multi-channel analog acquisition card | |
| CN103716092A (en) | Networking system and communication method for bidirectional optical fiber communication in bus network | |
| CN105515829A (en) | Intelligent wiring system | |
| CN104734780A (en) | Passive light-splitting RS-485 optical fiber bus local side system | |
| CN109328449A (en) | RTEX-EtherCAT protocol conversion apparatus and industrial control system | |
| CN106101028B (en) | Ethernet switch and power receiving and supplying circuit thereof | |
| CN107181702B (en) | Device for realizing RapidIO and Ethernet fusion exchange | |
| CN210867765U (en) | Remote control network switch | |
| CN102916746A (en) | Passive optical network and optical network unit optical module thereof | |
| CN216673008U (en) | Data aggregation system with high-bandwidth power carrier communication mode | |
| CN203522787U (en) | 16-path integrated network management optical switch | |
| CN110417583B (en) | Data communication equipment and out-of-band management system | |
| CN203522744U (en) | Multi-service optical access apparatus | |
| CN110297795B (en) | System and method for realizing single-channel serial data transmission based on Ethernet PHY chip | |
| CN202679373U (en) | Ethernet optical network terminal equipment | |
| CN203057154U (en) | Manageable gigabit optical-interface access layer device based on packet transport network | |
| WO2017020292A1 (en) | Optical access device and optical access system | |
| CN209118135U (en) | A kind of automobile-used CAN bus telecommunication circuit of electrical salf-walking | |
| CN101247235A (en) | Rack type equipment and its master control module and sub-module | |
| CN110941248A (en) | EtherCAT-TSN industrial Ethernet control system |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| C06 | Publication | ||
| PB01 | Publication | ||
| C10 | Entry into substantive examination | ||
| SE01 | Entry into force of request for substantive examination | ||
| C14 | Grant of patent or utility model | ||
| GR01 | Patent grant | ||
| CF01 | Termination of patent right due to non-payment of annual fee |
Granted publication date: 20160120 |
|
| CF01 | Termination of patent right due to non-payment of annual fee |