CN202679373U - Ethernet optical network terminal equipment - Google Patents
Ethernet optical network terminal equipment Download PDFInfo
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- CN202679373U CN202679373U CN 201220300918 CN201220300918U CN202679373U CN 202679373 U CN202679373 U CN 202679373U CN 201220300918 CN201220300918 CN 201220300918 CN 201220300918 U CN201220300918 U CN 201220300918U CN 202679373 U CN202679373 U CN 202679373U
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Abstract
The utility model discloses an Ethernet optical network terminal device, which comprises a main control module FPGA, a power supply module, a data cache module, an optical fiber transceiving module, an auxiliary management module, a high-speed serial-parallel conversion module, an interface and auxiliary module, an SPI bus module, an RS232 serial port module and a network port module; the power supply module is respectively connected with the main control module FPGA, the data cache module and the high-speed serial-parallel conversion module; the network port module is connected with the main control module FPGA, the main control module FPGA is connected with the data cache module, the high-speed serial-parallel conversion module, the optical fiber transceiving module, the auxiliary management module and the interface and auxiliary module, the RS232 serial port module is connected with the auxiliary management module, the auxiliary management module is connected with the SPI bus module, the data cache module is connected with the high-speed serial-parallel conversion module, and the high-speed serial-parallel conversion module is connected with the optical fiber transceiving module. The utility model discloses it is with low costs, the extensive popularization and application of broadband network of being convenient for.
Description
Technical field
The utility model relates to a kind of ether optical network terminal.
Background technology
Ethernet passive optical network (Ethernet Passive Optical Network, EPON) be a kind of novel broadband access network, adopt the network configuration of point-to-multipoint, adopt in physical layer have transmission frequency bandwidth, the optical fiber connection of the characteristics such as transmission capacity is large, anti-electromagnetic interference capability is strong, good confidentiality, cheap, environmental protection, and have fully passive advantage of repeater, and merge with ethernet technology.This technology can provide flexibly bandwidth demand, and simultaneously networking is simple, reliable, high performance-price ratio.Therefore, Ethernet passive optical network (EPON) is to realize " unification of three nets " and solve information superhighway " last kilometer " preferred plan.Yet existing EPON communication equipment ONU has certain difficulty to never have good solution because cost is high, universal.
Summary of the invention
In order to overcome the shortcoming that existing EPON communication equipment ONU cost is high, popularize difficulty, the utility model provides a kind of lower-cost ether optical network terminal based on EPON.
The technical solution adopted in the utility model is:
The ether optical network terminal is characterized in that: comprise main control module FPGA, power module, data cache module, optical fiber receiver-transmitter module, auxiliary administration module, high speed serial parallel exchange module, interface and supplementary module, spi bus module, RS232 serial port module, network interface module; Described power module links to each other with described main control module FPGA, data cache module and high speed serial parallel exchange module respectively; Described network interface module links to each other with described main control module FPGA, described main control module FPGA links to each other with supplementary module with interface with described data cache module, high speed serial parallel exchange module, optical fiber receiver-transmitter module, auxiliary administration module, described RS232 serial port module links to each other with described auxiliary administration module, described auxiliary administration module links to each other with described spi bus module, described data cache module links to each other with described high speed serial parallel exchange module, and described high speed serial parallel exchange module links to each other with described optical fiber receiver-transmitter module.
Further, described auxiliary administration module adopts the ARM chip.
Further, described interface and supplementary module comprise trigger switch and LED lamp at least.
Further, described network interface module adopts the gigabit Ethernet control chip to link to each other with the RJ-45 interface.
The function of each module of the utility model:
1, main control module FPGA: mainly finish the driving of described high speed serial parallel exchange module and control described optical fiber receiver-transmitter module as kernel control module, can coordinate to finish the transmitting-receiving of data, and can be by Ethernet interface communication;
2, auxiliary administration module: adopt the ARM chip, Main Function is to assist described main control module FPGA to finish the conversion of corresponding agreement;
3, power module: required normal working voltage is provided during for described main control module FPGA, data cache module and the work of high speed serial parallel exchange module;
4, data cache module: finish the exchanges data buffering;
5, high speed serial parallel exchange module: the data of the data of described optical fiber receiver-transmitter module end and described main control module FPGA end are gone here and there and change and satisfy the needs that its transmitting-receiving is processed;
6, optical fiber receiver-transmitter module: be responsible for the conversion of photosignal and the transmission of light signal;
7, interface and supplementary module: mainly comprising trigger switch and LED lamp, mainly is to finish the triggering of signal specific and indication in order to check whether ONU is working properly;
8, spi bus module: initialization and the debug function of mainly finishing program;
9, RS232 serial port module: being responsible for the sending and receiving of rs 232 serial interface signal, mainly is low-level configuration and the management of equipment;
10, network interface module: finish the function of Ethernet, at the big or small inputoutput data according to system bandwidth, and according to the tolerance limit of the adjustment input and output of the size adaptation of system bandwidth.
Operation principle of the present utility model:
As shown in Figure 3, terminal equipment described in the utility model can be divided into three major types: optical transceiver module (comprising optical fiber receiver-transmitter module), control module (comprising main control module FPGA, auxiliary administration module, data cache module, high speed serial parallel exchange module, RS232 serial port module, spi bus module, interface and supplementary module, power module) and business interface module (mainly comprising the network interface module).Whole equipment is under the prerequisite of the frame format of compatible Ethernet, can finish and optionally accept the data that Centroid OLT sends over, can finish range finding and log-in command that OLT sends, data of can buffer memory business interface module (gigabit Ethernet) coming and to OLT report buffer queue situation, and in the up send window that OLT distributes, send the data of institute's buffer memory, OAM (operation, management, the maintenance) frame that OLT sends can be responded, the function of Ethernet can be finished in the business interface module.
Optical transceiver module comprises optical transceiver and SERDES module, this module is finished ONU and is communicated by letter with OLT, ONU receives the data from OLT on down link, therefore optical transceiver will have burst and accepts function, after receiving the light signal that OLT sends, optical transceiver module can be changed light signal the signal of telecommunication of low-voltage differential and deliver to the SERDES module, and the LVTTL signal that the SERDES module can change into the Low Voltage Differential Signal of the high speed that receives parallel low rate is delivered in the main control module FPGA and processed.This process is opposite on up link.
Control module mainly is to coordinate optical transceiver module and business interface module, the request of data processing is arranged when the business interface module, control module can be with data buffer storage in the situation of not receiving the OLT bandwidth authorizing, otherwise and within the time period of bandwidth authorizing, send to OLT also this.Simultaneously, also want the function of initializing of completion system, the correction of some mistakes is processed, and whole system can be carried out accurately and efficiently.
The business interface module mainly is to finish the function of Ethernet, at the big or small inputoutput data according to system bandwidth, and according to the size of system bandwidth.
The beneficial effects of the utility model are embodied in: FPGA main control chip that can the parallel processing mass data, can process high-speed data, link to each other by optical fiber with Centroid (OLT) and to realize the combination of broadband network and network, many functions of while within it section realize with software, thereby greatly reduced hardware cost, be convenient to the extensive popularization and application of broadband network.
Description of drawings
Fig. 1 is structural representation of the present utility model.
Fig. 2 is connection diagram of the present utility model.
Fig. 3 is operation principle schematic diagram of the present utility model.
Embodiment
Referring to figs. 1 through Fig. 2, the ether optical network terminal comprises main control module FPGA1, power module 3, data cache module 4, optical fiber receiver-transmitter module 6, auxiliary administration module 2, high speed serial parallel exchange module 5, interface and supplementary module 7, spi bus module 8, RS232 serial port module 9, network interface module 10; Described power module 3 links to each other with described main control module FPGA1, data cache module 4 and high speed serial parallel exchange module 5 respectively; Described network interface module 10 links to each other with described main control module FPGA1, described main control module FPGA1 links to each other with supplementary module 7 with interface with described data cache module 4, high speed serial parallel exchange module 5, optical fiber receiver-transmitter module 6, auxiliary administration module 2, described RS232 serial port module 9 links to each other with described auxiliary administration module 2, described auxiliary administration module 2 links to each other with described spi bus module 8, described data cache module 4 links to each other with described high speed serial parallel exchange module 5, and described high speed serial parallel exchange module 5 links to each other with described optical fiber receiver-transmitter module 6.
Further, described auxiliary administration module 2 adopts the ARM chip.
Further, described interface and supplementary module 7 comprise trigger switch and LED lamp at least.
Further, described network interface module 10 adopts the gigabit Ethernet control chip to link to each other with the RJ-45 interface.
The function of each module of the utility model:
1, main control module FPGA1: mainly finish the driving of described high speed serial parallel exchange module and control described optical fiber receiver-transmitter module as kernel control module, can coordinate to finish the transmitting-receiving of data, and can be by Ethernet interface communication;
2, auxiliary administration module 2: adopt the ARM chip, Main Function is to assist described main control module FPGA to finish the conversion of corresponding agreement;
3, power module 3: required normal working voltage is provided during for described main control module FPGA, data cache module and the work of high speed serial parallel exchange module;
4, data cache module 4: finish the exchanges data buffering;
5, the high speed serial parallel exchange module 5: the data of the data of described optical fiber receiver-transmitter module end and described main control module FPGA end are gone here and there and change and satisfy the needs that its transmitting-receiving is processed;
6, optical fiber receiver-transmitter module 6: be responsible for the conversion of photosignal and the transmission of light signal;
7, interface and supplementary module 7: mainly comprising trigger switch and LED lamp, mainly is to finish the triggering of signal specific and indication in order to check whether ONU is working properly;
8, the spi bus module 8: initialization and the debug function of mainly finishing program;
9, the RS232 serial port module 9: being responsible for the sending and receiving of rs 232 serial interface signal, mainly is low-level configuration and the management of equipment;
10, the network interface module 10: finish the function of Ethernet, and at the big or small inputoutput data according to system bandwidth, and according to the tolerance limit of the adjustment input and output of the size adaptation of system bandwidth.
Operation principle of the present utility model:
As shown in Figure 3, terminal equipment described in the utility model can be divided into three major types: optical transceiver module (comprising optical fiber receiver-transmitter module 6), control module (comprising main control module FPGA1, auxiliary administration module 2, data cache module 4, high speed serial parallel exchange module 5, RS232 serial port module 9, spi bus module 8, interface and supplementary module 7, power module 3) and business interface module (mainly comprising network interface module 10).Whole equipment is under the prerequisite of the frame format of compatible Ethernet, can finish and optionally accept the data that Centroid OLT sends over, can finish range finding and log-in command that OLT sends, data of can buffer memory business interface module (gigabit Ethernet) coming and to OLT report buffer queue situation, and in the up send window that OLT distributes, send the data of institute's buffer memory, OAM (operation, management, the maintenance) frame that OLT sends can be responded, the function of Ethernet can be finished in the business interface module.
Optical transceiver module comprises optical transceiver and SERDES module, this module is finished ONU and is communicated by letter with OLT, ONU receives the data from OLT on down link, therefore optical transceiver will have burst and accepts function, after receiving the light signal that OLT sends, optical transceiver module can be changed light signal the signal of telecommunication of low-voltage differential and deliver to the SERDES module, and the LVTTL signal that the SERDES module can change into the Low Voltage Differential Signal of the high speed that receives parallel low rate is delivered in the main control module FPGA and processed.This process is opposite on up link.
Control module mainly is to coordinate optical transceiver module and business interface module, the request of data processing is arranged when the business interface module, control module can be with data buffer storage in the situation of not receiving the OLT bandwidth authorizing, otherwise and within the time period of bandwidth authorizing, send to OLT also this.Simultaneously, also want the function of initializing of completion system, the correction of some mistakes is processed, and whole system can be carried out accurately and efficiently.
The business interface module mainly is to finish the function of Ethernet, at the big or small inputoutput data according to system bandwidth, and according to the size of system bandwidth.
The described content of this specification embodiment only is enumerating the way of realization of inventive concept; protection range of the present utility model should not be regarded as only limiting to the concrete form that embodiment states, protection range of the present utility model also reaches the equivalent technologies means that design can be expected according to the utility model in those skilled in the art.
Claims (4)
1. the ether optical network terminal is characterized in that: comprise main control module FPGA, power module, data cache module, optical fiber receiver-transmitter module, auxiliary administration module, high speed serial parallel exchange module, interface and supplementary module, spi bus module, RS232 serial port module, network interface module; Described power module links to each other with described main control module FPGA, data cache module and high speed serial parallel exchange module respectively; Described network interface module links to each other with described main control module FPGA, described main control module FPGA links to each other with supplementary module with interface with described data cache module, high speed serial parallel exchange module, optical fiber receiver-transmitter module, auxiliary administration module, described RS232 serial port module links to each other with described auxiliary administration module, described auxiliary administration module links to each other with described spi bus module, described data cache module links to each other with described high speed serial parallel exchange module, and described high speed serial parallel exchange module links to each other with described optical fiber receiver-transmitter module;
2. ether optical network terminal as claimed in claim 1 is characterized in that: described auxiliary administration module employing ARM chip.
3. ether optical network terminal as claimed in claim 1, it is characterized in that: described interface and supplementary module comprise trigger switch and LED lamp at least.
4. ether optical network terminal as claimed in claim 1 is characterized in that: described network interface module adopts the gigabit Ethernet control chip to link to each other with the RJ-45 interface.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN 201220300918 CN202679373U (en) | 2012-06-25 | 2012-06-25 | Ethernet optical network terminal equipment |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN 201220300918 CN202679373U (en) | 2012-06-25 | 2012-06-25 | Ethernet optical network terminal equipment |
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| CN202679373U true CN202679373U (en) | 2013-01-16 |
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| CN 201220300918 Expired - Fee Related CN202679373U (en) | 2012-06-25 | 2012-06-25 | Ethernet optical network terminal equipment |
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Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN106160851A (en) * | 2016-09-05 | 2016-11-23 | 申瓯通信设备有限公司 | A kind of fiber optical transceiver with OAM |
| CN107733527A (en) * | 2017-10-23 | 2018-02-23 | 南开大学 | A kind of Ethernet visible ray adaptor plate level scheme based on 300Mbps visible light communications |
-
2012
- 2012-06-25 CN CN 201220300918 patent/CN202679373U/en not_active Expired - Fee Related
Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN106160851A (en) * | 2016-09-05 | 2016-11-23 | 申瓯通信设备有限公司 | A kind of fiber optical transceiver with OAM |
| CN106160851B (en) * | 2016-09-05 | 2018-08-03 | 申瓯通信设备有限公司 | A kind of fiber optical transceiver of band OAM |
| CN107733527A (en) * | 2017-10-23 | 2018-02-23 | 南开大学 | A kind of Ethernet visible ray adaptor plate level scheme based on 300Mbps visible light communications |
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| C14 | Grant of patent or utility model | ||
| GR01 | Patent grant | ||
| CF01 | Termination of patent right due to non-payment of annual fee |
Granted publication date: 20130116 Termination date: 20150625 |
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| EXPY | Termination of patent right or utility model |