CN103178092A - Structure and production method of ultrahigh-voltage LDMOS (laterally diffused metal oxide semiconductor) device - Google Patents

Structure and production method of ultrahigh-voltage LDMOS (laterally diffused metal oxide semiconductor) device Download PDF

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Publication number
CN103178092A
CN103178092A CN2011104427375A CN201110442737A CN103178092A CN 103178092 A CN103178092 A CN 103178092A CN 2011104427375 A CN2011104427375 A CN 2011104427375A CN 201110442737 A CN201110442737 A CN 201110442737A CN 103178092 A CN103178092 A CN 103178092A
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Prior art keywords
inversion layer
ldmos
carbon
drift region
layer
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CN2011104427375A
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宁开明
董科
马栋
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Shanghai Huahong Grace Semiconductor Manufacturing Corp
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Shanghai Hua Hong NEC Electronics Co Ltd
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Abstract

The invention discloses a structure of an ultrahigh-voltage LDMOS (laterally diffused metal oxide semiconductor) device. The structure comprises a source terminal, a drain terminal, a gate trench and a high-voltage drift region. The high-voltage drift region is provided with a trap. An inversion layer is made in the trap by implantation. A carbon-implantedlayer is designed above the inversion layer. The invention further discloses a production method of the LDMOS device with the structure. The production method includes performing carbon implantation once again above the inversion layer by a photoresist mask the same as the inversion layer after inversion layer implantation is complete. Carbon implantation is performed once again on a channel region of the LDMOS; therefore, impurities in the reversion layer are effectively inhibited from diffusing in the drift region of the drain terminal while channel conductivity is unaffected, the width of an upper channel is increased and on resistance of the LDMOS device is lowered.

Description

Structure and the preparation method of superhigh pressure LDMOS device
Technical field
The present invention relates to semiconductor integrated circuit and make the field, particularly relate to superhigh pressure LDMOS device.
Background technology
LDMOS (laterally diffused metal oxide semiconductor, lateral double-diffused metal-oxide-semiconductor transistor) is a kind of power device of double diffusion structure.This technology be in identical source/drain region injects twice, the larger arsenic (As) of implantation concentration, the boron that another time implantation concentration is less (B), carry out again a high temperature progradation after injecting, because boron diffusion ratio arsenic is fast, so can transversely spread fartherly under the grid border, form a raceway groove (the P trap in Fig. 1) that concentration gradient is arranged, the length of raceway groove is determined by the difference of the distance of this twice horizontal proliferation.In order to increase puncture voltage, to design a drift region between source region and drain region.Drift region in LDMOS is the key of such designs.The impurity concentration of drift region is lower, and therefore, when LDMOS connect high pressure, higher voltage can be born owing to being high resistant in the drift region, thereby had improved the puncture voltage of device.
Current, advanced superhigh pressure N-type LDMOS generally adopts at the inner p type impurity that inserts of N-type deep trap (DNW), forms the drift region that the upper and lower twin-channel mode of N-type designs drain terminal.Upper channel is break-over of device state current passage (abbreviation conductive channel).Because the B atomic mass of the p type buried layer (P buried) that injects is less, be easy to be diffused in the passage of N-type and go, therefore, the effective width of conductive channel is less, thereby causes the resistance of conductive channel to increase, and leakage current reduces.
Summary of the invention
The technical problem to be solved in the present invention is to provide a kind of structure of superhigh pressure LDMOS device, and it can reduce the conducting resistance of LDMOS device.
For solving the problems of the technologies described above, the structure of superhigh pressure LDMOS device of the present invention, comprise source, drain terminal, grid groove and high pressure drift region, wherein, there is a deep trap high pressure drift region, be injected with inversion layer in deep trap, the dopant type of inversion layer is opposite with the dopant type of deep trap, also has in addition a carbon implanted layer above this inversion layer.
The technical problem to be solved in the present invention is to provide the preparation method of the superhigh pressure LDMOS device of said structure.
For solving the problems of the technologies described above, the preparation method of superhigh pressure LDMOS device of the present invention comprises the following steps:
1) deep trap of formation high pressure drift region and the substrate trap of source on substrate;
2) by photoetching and ion implantation technology, inject inversion layer in deep trap;
3) by photoetching and ion implantation technology, form the carbon implanted layer above inversion layer;
4) make source electrode, drain electrode, grid, complete the preparation of LDMOS.
Described step 3) can use described step 2) mask blank.
The present invention injects by the carbon of upper channel district's increase at superhigh pressure LDMOS, when not affecting the passage electric conductivity, effectively suppress the diffusion of the impurity in the inversion layer in the drain terminal drift region, thereby increased the width of upper channel, reduced the conducting resistance of LDMOS device.
Description of drawings
Fig. 1 is the section structure schematic diagram of traditional superhigh pressure N-type LDMOS device.
Fig. 2 is the section structure schematic diagram of the superhigh pressure N-type LDMOS device of the embodiment of the present invention.
Fig. 3 is the main technique method schematic diagram of the embodiment of the present invention.Wherein, (a) be at the section structure that carries out the LDMOS of p type buried layer when injecting; (b) be section structure after p type buried layer injects; (c) be the section structure of the LDMOS when carrying out the carbon injection; (d) be section structure after carbon injects; (e) be section structure after photoresist.
Embodiment
Understand for technology contents of the present invention, characteristics and effect being had more specifically, existing take superhigh pressure N-type LDMOS device as example, in conjunction with illustrated execution mode, details are as follows to technical scheme of the present invention:
The section structure of the superhigh pressure LDMOS device of the present embodiment as shown in Figure 2.Compare with traditional structure, the LDMOS of the present embodiment is above p type buried layer, and namely the upper channel district, increased a carbon implanted layer.The preparation technology of the LDMOS of this new structure is as follows:
Step 1, the N-type deep trap (DNW) of formation drain terminal high pressure drift region on P type substrate.
The surface density of the Implantation of DNW is 1E11~1E13/cm 2, Implantation Energy is 20~300KeV.After Impurity injection, under 1200 ℃, logical nitrogen pushed away trap 400~500 minutes,
Step 2 forms the P trap on P type substrate, the surface density of the Implantation of P trap is 1E11~1E13/cm 2, Implantation Energy is 20~200KeV.
Step 3 by photoetching process, is left the p type impurity injection zone in the N-type deep trap of high pressure drift region.
Step 4 by ion implantation technology, is injected p type impurity boron (B) to the p type impurity injection zone, forms p type buried layer, as shown in Fig. 3 (a), (b).The surface density of Implantation is 1E11~1E13/cm 2, Implantation Energy is 800~1400KeV.
Step 5 is used the mask plate identical with p type buried layer, by photoetching process, leaves above p type buried layer and will carry out the zone that carbon injects.
Step 6 is carried out a carbon and is injected, and the district forms the carbon implanted layer at upper channel, as shown in Fig. 3 (c), (d).The surface density scope that carbon injects is 1E11~1E13/cm 2, the energy that carbon injects is 700~1300Kev.The injection depth ratio p type buried layer of guaranteeing C is shallow, and namely the carbon implanted layer will be on p type buried layer.
Because C (carbon) and Si (silicon) are the 4th major elements, has identical outermost electron structure, therefore the electrical properties of two elements is identical, after carbon implanted layer of upper channel district's increase, can not have influence on the conductivity of passage, and the C layer that injects forms a kind of impurity layer at silicon, this impurity layer can suppress the diffusion of p type impurity in p type buried layer effectively, thereby can increase the width of upper channel, reduce the conducting resistance of LDMOS device.
Step 7 is follow-uply carried out source electrode, drain electrode, the isostructural making of polysilicon gate according to the common process step, until complete the preparation of superhigh pressure LDMOS device, forms structure as shown in Figure 2.

Claims (8)

1. the structure of a superhigh pressure LDMOS device comprises source, drain terminal, grid groove and high pressure drift region, and wherein, there is a deep trap high pressure drift region, is injected with inversion layer in deep trap, and the dopant type of inversion layer is opposite with the dopant type of deep trap; It is characterized in that also having a carbon implanted layer above described inversion layer.
2. the structure of LDMOS device according to claim 1, is characterized in that, the shape of described carbon implanted layer is identical with the shape of described inversion layer.
3. the structure of LDMOS device according to claim 2, is characterized in that, the surface density of described carbon implanted layer is 1E11~1E13/cm 2
4. the structure of LDMOS device according to claim 3, is characterized in that, the energy that carbon injects is 700~1300Kev.
5. the preparation method of the LDMOS device of the described structure of claim 1 comprises the following steps:
1) deep trap of formation high pressure drift region and the substrate trap of source on substrate;
2) by photoetching and ion implantation technology, inject inversion layer in deep trap;
3) make source electrode, drain electrode, grid, complete the preparation of LDMOS;
It is characterized in that step 2) and 3) between, also comprise step:
2 ') by photoetching and ion implantation technology, form the carbon implanted layer above inversion layer.
6. method according to claim 5, is characterized in that step 2 ') use step 2) mask blank.
7. method according to claim 6, is characterized in that step 2 '), the surface density that carbon injects is 1E11~1E13/cm 2
8. method according to claim 7, is characterized in that step 2 '), the energy that carbon injects is 700~1300Kev.
CN2011104427375A 2011-12-26 2011-12-26 Structure and production method of ultrahigh-voltage LDMOS (laterally diffused metal oxide semiconductor) device Pending CN103178092A (en)

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Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN113497052A (en) * 2020-03-19 2021-10-12 铠侠股份有限公司 Semiconductor memory device and method for manufacturing semiconductor memory device

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6303450B1 (en) * 2000-11-21 2001-10-16 International Business Machines Corporation CMOS device structures and method of making same
CN1679169A (en) * 2003-01-31 2005-10-05 富士通株式会社 Semiconductor device and method for fabricating the same
CN102097469A (en) * 2009-12-10 2011-06-15 世界先进积体电路股份有限公司 Semiconductor structure and manufacture method thereof

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6303450B1 (en) * 2000-11-21 2001-10-16 International Business Machines Corporation CMOS device structures and method of making same
CN1679169A (en) * 2003-01-31 2005-10-05 富士通株式会社 Semiconductor device and method for fabricating the same
CN102097469A (en) * 2009-12-10 2011-06-15 世界先进积体电路股份有限公司 Semiconductor structure and manufacture method thereof

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN113497052A (en) * 2020-03-19 2021-10-12 铠侠股份有限公司 Semiconductor memory device and method for manufacturing semiconductor memory device
CN113497052B (en) * 2020-03-19 2024-03-26 铠侠股份有限公司 Semiconductor memory device and method for manufacturing semiconductor memory device

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