CN103165660A - Thin film transistor and manufacturing method of thin film transistor - Google Patents
Thin film transistor and manufacturing method of thin film transistor Download PDFInfo
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- CN103165660A CN103165660A CN 201110413462 CN201110413462A CN103165660A CN 103165660 A CN103165660 A CN 103165660A CN 201110413462 CN201110413462 CN 201110413462 CN 201110413462 A CN201110413462 A CN 201110413462A CN 103165660 A CN103165660 A CN 103165660A
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Abstract
The invention relates to a thin film transistor and a manufacturing method of the thin film transistor. The thin film transistor comprises a base plate, a first grid electrode, an insulating layer, an active layer, a source electrode, a drain electrode and a second grid electrode, wherein the base plate, the first grid electrode, the insulating layer, the active layer, the source electrode, the drain electrode and the second grid electrode are arranged in sequence. A back channel trench area is arranged between the source electrode and the drain electrode, and the second grid electrode is formed in the back channel trench area. According to the thin film transistor and the manufacturing method of the thin film transistor, a layer of the second grid electrode is additionally arranged in the back channel trench area. A floating gate structure is adopted to control charge distribution in the back channel trench area, and thereby a threshold voltage of a device is adjusted. The threshold voltage of the thin film transistor device is reduced, and a low-power-consumption oxide thin film oxide display device is achieved. The stability of the device is improved, and the manufacturing cost of the device is lowered.
Description
[technical field]
The present invention relates to a kind of thin-film transistor and manufacture method thereof.
[background technology]
Along with the development of society, display device has become indispensable product in people's work and life.Due to the shortcoming such as the intrinsic heaviness of traditional CRT monitor, power dissipation ratio be larger, many applications have been withdrawed from.The flat panel display that replaces (FPD) has demonstrated powerful vitality.In order to obtain optimum performance, flat-panel display device often needs active matrix to come process auxiliary drive, is about to active circuit and is integrated in the variety of issue that solves in each array element in device drive.The core parts of active matrix are thin-film transistor (Thin Film Transistor, TFT).
Thin-film transistor compare with traditional silica-based TFT have that mobility is high, preparation technology is simple, in advantages such as visible light wave range are transparent, be the TFT technology of future generation that development potentiality is arranged very much.And threshold voltage is one of important parameter of TFT device, directly determines the power consumption of display device, reduces the power consumption that threshold voltage is conducive to reduce flat-panel monitor.
Traditionally, often adopt the insulating barrier of high-k (as TiO
2, Ta
2O
5, HfO
2Deng) alternative conventional SiO
2, Si
3N
4Insulating barrier, although can greatly reduce the threshold voltage of TFT device, the oxide thin film transistor that is based on the insulating barrier of high-k tends to the generation current hysteresis, causes the bad stability of device.The insulating barrier cost of manufacture of high-k is often also higher in addition, is difficult to and traditional silica-based production line compatibility, is unfavorable for practical application.
[summary of the invention]
In view of this, be necessary to provide a kind of thin-film transistor that reduces threshold voltage.
A kind of thin-film transistor comprises the substrate, first grid, insulating barrier, active layer, source electrode, drain electrode and the second grid that set gradually; Have the described second grid in ditch zone, back of the body road between described source electrode and drain electrode and be formed on ditch zone, described back of the body road.
Preferably, described baseplate material is any in silicon chip, glass or plastics.
Preferably, described first grid is selected any one or more in gold, aluminium, copper, molybdenum, chromium, titanium, tin indium oxide, tungsten, silver, tantalum, and the thickness of described first grid is 50 to 200 nanometers.
Preferably, described insulating barrier is selected tantalum oxide, aluminium oxide, silica, titanium oxide and SiN
1～1.5In one or more, the thickness of described insulating barrier is 50 to 400 nanometers.
Preferably, described active layer is oxide semiconductor active layer, selects one or more in indium oxide gallium zinc, zinc oxide, tin oxide, indium oxide, and the thickness of described oxide active layer is 10 to 50 nanometers.
Preferably, described source electrode is selected one or more preparations in gold, silver, molybdenum, aluminium, copper, chromium, titanium, magnesium, calcium; One or more preparations in gold, silver, molybdenum, aluminium, copper, chromium, titanium, magnesium, calcium are selected in described drain electrode.
Preferably, described second grid is selected one or more in gold, aluminium, copper, molybdenum, chromium, titanium, tin indium oxide, tungsten, silver, tantalum, calcium, and described second grid thickness is 30 to 80nm.
A kind of method for fabricating thin film transistor comprises the steps:
Form first grid on substrate;
Form insulating barrier on described first grid;
Form active layer on described insulating barrier;
Form source electrode and drain electrode on described active layer;
Form second grid on the ditch zone, back of the body road between described source electrode and drain electrode.
Preferably, adopt vacuum evaporation or sputtering technology to form first grid at substrate;
Adopt sputter or chemical gaseous phase depositing process to form insulating barrier on first grid;
Adopt magnetron sputtering or technique for atomic layer deposition to form active layer on insulating barrier;
Adopt vacuum evaporation or sputtering technology to form source electrode and drain electrode;
Adopt sputtering technology or vacuum evaporation method to form second grid in ditch zone, back of the body road;
Described vacuum evaporation vacuum degree is less than 10
-3Pa.
Preferably, described baseplate material is any in silicon chip, glass or plastics;
Described first grid is selected any one or more in gold, aluminium, copper, molybdenum, chromium, titanium, tin indium oxide, tungsten, silver, tantalum, and the thickness of described first grid is 50 to 200 nanometers;
Described insulating barrier is selected tantalum oxide, aluminium oxide, silica, titanium oxide and SiN
1～1.5In one or more, the thickness of described insulating barrier is 50 to 400 nanometers;
Described source electrode is selected one or more preparations in gold, silver, molybdenum, aluminium, copper, chromium, titanium, magnesium, calcium; One or more preparations in gold, silver, molybdenum, aluminium, copper, chromium, titanium, magnesium, calcium are selected in described drain electrode;
Described second grid is selected one or more in gold, aluminium, copper, molybdenum, chromium, titanium, tin indium oxide, tungsten, silver, tantalum, calcium, and described second grid thickness is 30 to 80nm.
Said film transistor and manufacture method thereof, increase one deck second grid in ditch zone, back of the body road, adopt floating gate structure, control the CHARGE DISTRIBUTION of back of the body channel region, thereby can regulate the threshold voltage of device, reduce the threshold voltage of film transistor device, realize the sull oxide display device of low-power consumption, improve the stability of device, reduce the cost of manufacture of device.
[description of drawings]
Fig. 1 is the structural representation of thin-film transistor in an embodiment;
Fig. 2 is the flow chart of method for fabricating thin film transistor in an embodiment.
[embodiment]
Below in conjunction with accompanying drawing, the specific embodiment of the present invention is described in detail.
Fig. 1 is the structural representation of thin-film transistor in an embodiment.This thin-film transistor comprises substrate 100, first grid 200, insulating barrier 300, active layer 400, source electrode 500, drain electrode 600 and the second grid 700 that sets gradually.Have ditch zone, back of the body road between source electrode 500 and drain electrode 600, second grid 700 is formed on ditch zone, back of the body road.
In this embodiment, substrate 100 materials are any in silicon chip, glass or pottery.
Insulating barrier 300 is selected tantalum oxide (Ta
2O
5), aluminium oxide (Al
2O
3), silica (SiO
2), titanium oxide (TiO
2) and SiN
1～1.5Deng in one or more, adopt the preparation of sputter or chemical gaseous phase depositing process.The thickness of insulating barrier 300 is 50 to 400nm.
One or more preparations in gold (Au), silver (Ag), molybdenum (Mo), aluminium (Al), copper (Cu), chromium (Cr), titanium (Ti), magnesium (Mg), calcium (Ca) are selected in drain electrode 600.
Vacuum evaporation or sputtering technology preparation are all adopted in source electrode 500 and drain electrode 600.
Wherein, all vacuum evaporation, vacuum degree is less than 10
-3Pa.
This thin-film transistor, increase one deck second grid 700 in ditch zone, back of the body road, namely utilize floating gate structure to control the charge accumulated in back of the body ditch zone, road, thereby regulate the threshold voltage of thin-film transistor, make the threshold voltage of device adjustable, can reduce the threshold voltage of thin-film transistor, realize the oxide thin film transistor display device of low-power consumption, improve the stability of device, reduce the cost of manufacture of device, effectively avoided the use high-k insulating layer to bring device unstable, the difficult problems such as cost of manufacture height.The kind of metal material is a lot of in addition, and price is also relatively cheap, can good compatibility be arranged with existing oxide thin film transistor technology, and it is simple that the technology of preparing of the metal electrode of vacuum evaporation simultaneously has technique, and finished product is cheap, the plurality of advantages such as environmental protection.Therefore adopt this thin-film transistor structure can effectively regulate and reduce the threshold voltage of oxide thin film transistor device, reduce the power consumption of flat-panel display device, energy savings, make on the performance of oxide film transistor array fully unaffectedly, make it can realize using value in circuit.
In addition, provide a kind of manufacture method of thin-film transistor, as shown in Figure 2, comprise the steps:
S10: form first grid on substrate.
In this embodiment, baseplate material is any in silicon chip, glass or pottery.First grid is selected any one or more in gold (Au), aluminium (Al), copper (Cu), molybdenum (Mo), chromium (Cr), titanium (Ti), tin indium oxide (ITO), tungsten (W), silver (Ag), tantalum (Ta), adopts vacuum evaporation or sputtering technology to form on substrate.The thickness of first grid is 50 to 200nm.
S20: form insulating barrier on first grid.
Insulating barrier is selected tantalum oxide (Ta
2O
5), aluminium oxide (Al
2O
3), silica (SiO
2), titanium oxide (TiO
2) and SiN
1～1.5Deng in one or more, adopt sputter or chemical gaseous phase depositing process to form on first grid.The thickness of insulating barrier 300 is 50 to 400nm.
S30: form active layer on insulating barrier.
Active layer is oxide semiconductor active layer, selects indium oxide gallium zinc (InGaZnO), zinc oxide (ZnO), tin oxide (SnO
2), indium oxide (In
2O
3) in one or more, adopt magnetron sputtering or technique for atomic layer deposition to form on insulating barrier.The thickness of active layer is 10 to 50nm.
S40: form source electrode and drain electrode on active layer.
Source electrode is selected one or more preparations in gold (Au), silver (Ag), molybdenum (Mo), aluminium (Al), copper (Cu), chromium (Cr), titanium (Ti), magnesium (Mg), calcium (Ca).
One or more preparations in gold (Au), silver (Ag), molybdenum (Mo), aluminium (Al), copper (Cu), chromium (Cr), titanium (Ti), magnesium (Mg), calcium (Ca) are selected in drain electrode.
S50: form second grid on the ditch zone, back of the body road between source electrode and drain electrode.
Second grid is formed on the ditch zone, back of the body road between source electrode 500 and drain electrode 600, select one or more of gold (Au), aluminium (Al), copper (Cu), molybdenum (Mo), chromium (Cr), titanium (Ti), tin indium oxide (ITO), tungsten (W), silver (Ag), tantalum (Ta), calcium (Ca) etc., adopt the method for sputtering technology or vacuum evaporation to form in ditch zone, back of the body road, deposition rate is 0.05～0.5nm/s.Second grid 700 thickness are 30 to 80nm.
In the method, all vacuum evaporation, vacuum degree is less than 10
-3Pa.
The method, by increasing one deck second grid 700 in ditch zone, back of the body road, namely utilize floating gate structure to control the charge accumulated in back of the body ditch zone, road, thereby regulate the threshold voltage of thin-film transistor, make the threshold voltage of device adjustable, can reduce the threshold voltage of thin-film transistor, realize the oxide thin film transistor display device of low-power consumption, improve the stability of device, reduce the cost of manufacture of device, effectively avoided the use high-k insulating layer to bring device unstable, the difficult problems such as cost of manufacture height.The kind of metal material is a lot of in addition, and price is also relatively cheap, can good compatibility be arranged with existing oxide thin film transistor technology, and it is simple that the technology of preparing of the metal electrode of vacuum evaporation simultaneously has technique, and finished product is cheap, the plurality of advantages such as environmental protection.Therefore adopt this thin-film transistor structure can effectively regulate and reduce the threshold voltage of oxide thin film transistor device, reduce the power consumption of flat-panel display device, energy savings, make on the performance of oxide film transistor array fully unaffectedly, make it can realize using value in circuit.
Said film transistor and manufacture method thereof, increase one deck second grid in ditch zone, back of the body road, adopt floating gate structure, control the CHARGE DISTRIBUTION of back of the body channel region, thereby can regulate the threshold voltage of device, reduce the threshold voltage of device, realize the sull oxide display device of low-power consumption, improve the stability of device, reduce the cost of manufacture of device.
The above embodiment has only expressed several execution mode of the present invention, and it describes comparatively concrete and detailed, but can not therefore be interpreted as the restriction to the scope of the claims of the present invention.Should be pointed out that for the person of ordinary skill of the art, without departing from the inventive concept of the premise, can also make some distortion and improvement, these all belong to protection scope of the present invention.Therefore, the protection range of patent of the present invention should be as the criterion with claims.
Claims (10)
1. a thin-film transistor, is characterized in that, comprises the substrate, first grid, insulating barrier, active layer, source electrode, drain electrode and the second grid that set gradually; Have the described second grid in ditch zone, back of the body road between described source electrode and drain electrode and be formed on ditch zone, described back of the body road.
2. thin-film transistor according to claim 1, is characterized in that, described baseplate material is any in silicon chip, glass or plastics.
3. thin-film transistor according to claim 1, is characterized in that, described first grid is selected any one or more in gold, aluminium, copper, molybdenum, chromium, titanium, tin indium oxide, tungsten, silver, tantalum, and the thickness of described first grid is 50 to 200 nanometers.
4. thin-film transistor according to claim 1, is characterized in that, described insulating barrier is selected tantalum oxide, aluminium oxide, silica, titanium oxide and SiN
1～1.5In one or more, the thickness of described insulating barrier is 50 to 400 nanometers.
5. thin-film transistor according to claim 1, it is characterized in that, described active layer is oxide semiconductor active layer, selects one or more in indium oxide gallium zinc, zinc oxide, tin oxide, indium oxide, and the thickness of described oxide active layer is 10 to 50 nanometers.
6. thin-film transistor according to claim 1, is characterized in that, described source electrode is selected one or more preparations in gold, silver, molybdenum, aluminium, copper, chromium, titanium, magnesium, calcium; One or more preparations in gold, silver, molybdenum, aluminium, copper, chromium, titanium, magnesium, calcium are selected in described drain electrode.
7. thin-film transistor according to claim 1, is characterized in that, described second grid is selected one or more in gold, aluminium, copper, molybdenum, chromium, titanium, tin indium oxide, tungsten, silver, tantalum, calcium, and described second grid thickness is 30 to 80nm.
8. a method for fabricating thin film transistor, comprise the steps:
Form first grid on substrate;
Form insulating barrier on described first grid;
Form active layer on described insulating barrier;
Form source electrode and drain electrode on described active layer;
Form second grid on the ditch zone, back of the body road between described source electrode and drain electrode.
9. method for fabricating thin film transistor according to claim 8, is characterized in that,
Adopt vacuum evaporation or sputtering technology to form first grid at substrate;
Adopt sputter or chemical gaseous phase depositing process to form insulating barrier on first grid;
Adopt magnetron sputtering or technique for atomic layer deposition to form active layer on insulating barrier;
Adopt vacuum evaporation or sputtering technology to form source electrode and drain electrode;
Adopt sputtering technology or vacuum evaporation method to form second grid in ditch zone, back of the body road;
Described vacuum evaporation vacuum degree is less than 10
-3Pa.
10. according to claim 8 or 9 described method for fabricating thin film transistor, is characterized in that,
Described baseplate material is any in silicon chip, glass or plastics;
Described first grid is selected any one or more in gold, aluminium, copper, molybdenum, chromium, titanium, tin indium oxide, tungsten, silver, tantalum, and the thickness of described first grid is 50 to 200 nanometers;
Described insulating barrier is selected tantalum oxide, aluminium oxide, silica, titanium oxide and SiN
1～1.5In one or more, the thickness of described insulating barrier is 50 to 400 nanometers;
Described source electrode is selected one or more preparations in gold, silver, molybdenum, aluminium, copper, chromium, titanium, magnesium, calcium; One or more preparations in gold, silver, molybdenum, aluminium, copper, chromium, titanium, magnesium, calcium are selected in described drain electrode;
Described second grid is selected one or more in gold, aluminium, copper, molybdenum, chromium, titanium, tin indium oxide, tungsten, silver, tantalum, calcium, and described second grid thickness is 30 to 80nm.
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| CN 201110413462 CN103165660A (en) | 2011-12-13 | 2011-12-13 | Thin film transistor and manufacturing method of thin film transistor |
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Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN108987480A (en) * | 2017-06-02 | 2018-12-11 | 上海和辉光电有限公司 | Double gate thin-film transistor and preparation method thereof, display panel and preparation method thereof |
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2011
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Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN108987480A (en) * | 2017-06-02 | 2018-12-11 | 上海和辉光电有限公司 | Double gate thin-film transistor and preparation method thereof, display panel and preparation method thereof |
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