CN103149764A - 一种薄膜晶体管阵列基板、显示装置及方法 - Google Patents
一种薄膜晶体管阵列基板、显示装置及方法 Download PDFInfo
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Abstract
本发明公开了薄膜晶体管液晶显示器制造领域中的一种薄膜晶体管阵列基板、显示装置及方法。该结构包括:包括衬底基板,以及在衬底基板上形成的薄膜晶体管、第二绝缘层、第一电极和第二电极;其中,第一电极和第二电极用于形成电场;第二绝缘层位于第一电极和第二电极之间;第二电极为梳状电极,且位于第二绝缘层的远离衬底基板一侧上;阵列基板上还包括凸起结构,位于第一电极的靠近所述衬底基板的一侧,凸起结构的位置对应于所述梳状电极之间的空隙。本发明通过树脂块改变像素电极层的形状,有效缩小了公共电极之间的水平电场弱化区域的大小,减弱了纵向噪声电场,使得水平电场对液晶的取向能力加强,抑制Trace Mura的发生,提高显示器品质。
Description
技术领域
本发明涉及薄膜晶体管液晶显示器制造领域,特别涉及一种薄膜晶体管阵列基板、显示装置及方法。
背景技术
TFT-LCD,即薄膜晶体管(Thin Film Transistor,简称TFT)液晶显示器(Liquid Crystal Display,简称LCD)基本结构包括阵列基板(Array Substrate)和彩膜基板(CF Substrate),以及充满在两片基板之间的液晶层(LC),在阵列基板和彩膜基板表面有对液晶具有取向作用的聚酰亚胺膜层(配向膜层)(Polyimide film,简称:PIfilm)。阵列基板包括栅极、栅绝缘层、有源层、源极和漏极。现有的显示基板制造技术中,阵列基板上依次沉积栅电极、栅绝缘层、有源层、像素电极、源漏电极、第二绝缘层、公共电极,形成薄膜晶体管结构,并通过控制像素电极与公共电极形成的电势差,实现水平电场驱动。
对于现有显示基板制造技术,1st透明导电薄膜作为像素电极,梳状2nd透明导电薄膜作为公共电极,梳状2nd透明导电薄膜的各个slit间形成空隙,在左右条状电极的共同作用下,上述水平电场在空隙中间区域变得很小,纵向噪声电场变得较大,水平电场对液晶的取向能力变得很弱,在白态画面下按压造成液晶偏转混乱,空隙中间区域较弱的水平电场无法恢复液晶在按压前的偏转状态,即造成Trace Mura(按压痕迹残留类不良)的发生;随着面板高像素密度的不断提升,2nd透明导电薄膜的条状宽度越做越小,在空隙宽度无明显变化的情况下,这个问题显得愈发严重。
发明内容
(一)要解决的技术问题
本发明要解决的技术问题是:如何提供一种阵列基板结构、液晶面板及显示装置,用以避免现有显示基板制造技术中Trace Mura的发生。
(二)技术方案
为解决上述技术问题,本发明提供了一种薄膜晶体管阵列基板,包括衬底基板,以及在衬底基板上形成的薄膜晶体管、第二绝缘层、第一电极和第二电极;
其中,所述第一电极和所述第二电极用于形成电场;所述第二绝缘层位于所述第一电极和所述第二电极之间;
所述第二电极为梳状电极,且位于所述第二绝缘层的远离所述衬底基板一侧上;
所述阵列基板上还包括凸起结构,位于所述第一电极的靠近所述衬底基板的一侧,所述凸起结构的位置对应于所述梳状电极之间的空隙。
所述凸起结构的凸起形状为棱柱形。
所述棱柱形为三棱柱或四棱柱,三棱柱的顶角优选30°~90°;四棱柱的顶角优选105°~120°;三棱柱或四棱柱的底边的宽度小于所述梳状电极的空隙宽度。
所述梳状电极为平行排列的多个条状电极。
所述凸起结构包括第一电极层凸起,所述第一电极层凸起与所述第一电极同时形成。
所述凸起结构包括栅极层凸起,所述栅极层凸起与所述薄膜晶体管的栅极同时形成。
所述凸起结构包括栅极绝缘层凸起,所述栅极绝缘层凸起与所述薄膜晶体管的栅绝缘层同时形成。
所述凸起结构为设置在所述第一电极与所述衬底基板之间的任意两层之间的透明块。
所述凸起结构设置在所述第一电极与所述薄膜晶体管的栅绝缘层之间,或者设置在所述栅绝缘层与所述衬底基板之间。
所述透明块为树脂材料块。
所述第一电极与所述薄膜晶体管的漏极接触,所述第一电极作为所述阵列基板的像素电极;所述第二电极作为所述阵列基板的公共电极。
所述第一电极作为所述阵列基板的公共电极;所述第二电极通过所述第二绝缘层上的过孔与所述薄膜晶体管的漏极接触,所述第二电极作为所述阵列基板的像素电极。
所述三棱柱的截面呈等腰三角形。
所述四棱柱的截面呈等腰梯形。
一种显示装置,其特征是,包括上述所述的阵列基板。
一种薄膜晶体管阵列基板的制造方法,其特征是,该方法包括:
在所述衬底基板上形成第一电极、薄膜晶体管、凸起结构以及第二绝缘层;
在所述第二绝缘层上方设置第二电极;
其中,所述第二电极为梳状电极,所述凸起结构的位置对应于所述梳状电极之间的空隙。
所述凸起结构包括第一电极层凸起,所述第一电极层凸起与所述第一电极同时形成。
所述凸起结构包括栅极层凸起,所述栅极层凸起与所述薄膜晶体管的栅极同时形成。
所述凸起结构的凸起形状为棱柱形。
(三)有益效果
本发明在现有TFT-LCD阵列基板结构的基础上,在像素电极层和第一绝缘层之间增加了树脂块,该树脂块上设有突出部;所述像素电极层与所述突出部的形状相适应;突出部的上端对应设置在相邻的两个公共电极之间;本发明通过树脂块改变像素电极层的形状,在保证像素电极层厚度不变的前提下,有效缩小了公共电极之间的水平电场弱化区域的大小,减弱了纵向噪声电场,使得水平电场对液晶的取向能力加强,抑制Trace Mura的发生,提高显示器品质。保证了高像素密度面板的显示效果。
附图说明
图1是现有显示基板制造技术的LCD侧视示意图;
图2是现有显示基板制造技术各个空隙间水平电场示意图;
图3是本发明实施例的LCD侧视示意图;
图4是本发明实施例各个空隙间水平电场示意图。
具体实施方式
下面结合附图和实施例,对本发明的具体实施方式作进一步详细描述。以下实施例用于说明本发明,但不用来限制本发明的范围。
为了解决现有显示基板制造技术中Trace Mura的发生,本发明提出了一种薄膜晶体管阵列基板,
一种薄膜晶体管阵列基板,包括衬底基板,以及在衬底基板上形成的薄膜晶体管、第二绝缘层、第一电极和第二电极;
其中,所述第一电极和所述第二电极用于形成电场,所述第二绝缘层位于所述第一电极和所述第二电极之间;
所述第二电极为梳状电极,且位于所述第二绝缘层的远离所述衬底基板一侧上;
所述阵列基板上还包括凸起结构,位于所述第一电极的靠近所述衬底基板的一侧,所述凸起结构的位置对应于所述梳状电极之间的空隙。
本方案通过凸起结构的设置,有效缩小了水平电场弱化区域的大小,减弱了纵向噪声电场,使得水平电场对液晶的取向能力加强,抑制Trace Mura的发生,提高显示器品质。保证了高像素密度面板的显示效果
优选地,本方案所提供的阵列基板还具有以下特征中的一个或多个:
所述凸起结构的凸起形状为棱柱形;棱柱的棱指向空隙的方向;当然,凸起的形状还可以为其他的能够对弱化的电场起到平衡调节作用的形状,如向上凸起的棱锥形状等,种类不限。
所述棱柱形为三棱柱或四棱柱,三棱柱的顶角在0°~180°之间,优选30°~90°;四棱柱的顶角的度数在90°~180°之间,优选105°~120°;三棱柱或四棱柱的底边的宽度小于所述梳状电极的空隙宽度。
所述梳状电极为平行排列的多个条状电极,可以为直线形条状,也可以为有折角的条状,类型不限。
所述凸起结构包括第一电极层凸起,所述第一电极层凸起与所述第一电极同时形成;即,该第一电极层凸起与所述第一电极是一体形成的,材料与第一电极的材料相同,此种凸起结构称为第一电极层凸起。
所述凸起结构包括栅极层凸起,所述栅极层凸起与所述薄膜晶体管的栅极同时形成。
所述凸起结构包括栅极绝缘层凸起,所述栅极绝缘层凸起与所述薄膜晶体管的栅绝缘层同时形成。
所述凸起结构也可以为单独设置在所述第一电极与所述衬底基板之间的任意两层之间的透明块,其不与任何其他层同时形成;则该凸起结构设置在所述第一电极与所述薄膜晶体管的栅绝缘层之间,或者设置在所述栅绝缘层与所述衬底基板之间。
所述透明块为树脂材料块。
所述第一电极与所述薄膜晶体管的漏极接触,所述第一电极作为所述阵列基板的像素电极;所述第二电极作为所述阵列基板的公共电极;
或者,所述第一电极作为所述阵列基板的公共电极;所述第二电极通过所述第二绝缘层上的过孔与所述薄膜晶体管的漏极接触,所述第二电极作为所述阵列基板的像素电极。
所述三棱柱的截面呈等腰三角形。
所述四棱柱的截面呈等腰梯形。
一种显示装置,其特征是,包括上述所述的阵列基板。
本实施方式还提供了一种薄膜晶体管阵列基板的制造方法,包括的步骤如下:
在所述衬底基板上形成第一电极、薄膜晶体管、凸起结构以及第二绝缘层;
在所述第二绝缘层上方设置第二电极;
其中,所述第二电极为梳状电极,所述凸起结构的位置对应于所述梳状电极之间的空隙。
本实施例中,通过凸起结构的设置,有效缩小了水平电场弱化区域的大小,减弱了纵向噪声电场,使得水平电场对液晶的取向能力加强,抑制Trace Mura的发生,提高显示器品质。保证了高像素密度面板的显示效果。
优选地,本实施例还可包括以下技术特征中的一个或多个:
所述凸起结构包括第一电极层凸起,所述第一电极层凸起与所述第一电极同时形成。
所述凸起结构包括栅极层凸起,所述栅极层凸起与所述薄膜晶体管的栅极同时形成。
所述凸起结构的凸起形状为棱柱形。
以下详细对本发明进行说明:
现有显示基板制造技术,衬底基板1上依次沉积第一电极2、第一绝缘层3、有源层4、像素电极层5、源电极61、漏电极62、第二绝缘层7、公共电极8,形成TFT结构,基板上依次沉积黑矩阵9、R/G/B树脂13、Over coat(覆盖保护)层10和PS树脂11形成彩膜基板。本发明通过把树脂块14做成三棱柱状,并在棱锥层树脂块14上形成三棱柱型凸起像素电极层5,有效缩小空隙中间水平电场弱化区域的大小,抑制Trace Mura的发生,从而提高显示器品质。
图1为现有显示基板制造技术TFT-LCD截面示意图。阵列基板结构包括衬底基板1、第一电极2、栅绝缘层3、有源层4、像素电极层5、源漏电极层6、第二绝缘层7、公共电极层8;彩膜基板结构包括玻璃基板、黑矩阵9、R/G/B树脂13、Over coat层10、PS树脂11;TFT-LCD结构还包括盒内的液晶层12、对液晶起取向作用的PI层以及连接阵列基板和彩膜基板的封框胶(sealant)。
图2为现有显示基板制造技术像素电极和公共电极设计各个slit间水平电场示意图。像素电极采用矩阵式平面结构设计,公共电极采用梳妆平面结构设计,通过控制公共电极各slit与像素电极的电势差,形成横向周期性强弱变化的水平电场d,b表示与水平电场的方向相反。在各个slit间的间隙c的两侧电场方向相反,间隙中间区域水平电场在抵消的作用下减弱,水平电场小于一定临界值Eth的区域a便容易发生Trace Mura。
图3为本发明实施例的LCD截面示意图。阵列基板结构包括衬底基板1、第一电极2、栅绝缘层3、有源层4、三棱柱状或者截面呈等腰梯形的四棱柱状树脂层14、像素电极层5、源漏电极层6、第二绝缘层7、公共电极层8。其中,树脂层的最高大厚度在1μm~4μm。三棱柱状树脂层截面呈等腰三角形状,三棱柱的一个棱,朝向基板出光方向一侧;四棱柱状树脂层截面呈等腰梯形;等腰梯形的上底宽度小于下底宽度,上底宽度在0μm~4μm;等腰梯形的上底宽度尽可能小;像素电极在树脂层两侧呈斜面结构。像素电极斜面与玻璃基板所成角度在15°~90°。
图4为本发明实施例像素电极和公共电极设计各个slit间水平电场示意图。栅绝缘层上的树脂层采用三棱柱状设计14,像素电极形成在树脂层上,在树脂层上形成三角柱状凸起,通过这种斜面电极的设计,现有水平电场d在前述Eth下的空隙中间区域由a减小为a’。e表示的是本发明实施例TFT-LCD阵列基板结构的水平电场,与现有结构水平电场分布中的水平电场d相比,本发明实施例得到的水平电场e能够更好地抑制Trace Mura的发生;
本发明实施例在现有TFT-LCD阵列基板结构的基础上,在像素电极层和第一绝缘层之间增加了树脂块,该树脂块上设有突出部;所述像素电极层与所述突出部的形状相适应;突出部的上端对应设置在相邻的两个公共电极之间;本发明通过树脂块改变像素电极层的形状,在保证像素电极层厚度不变的前提下,有效缩小了公共电极之间的水平电场弱化区域的大小,减弱了纵向噪声电场,使得水平电场对液晶的取向能力加强,抑制Trace Mura的发生,提高显示器品质。保证了高像素密度面板的显示效果。
另外,本发明还提供了一种液晶面板的实施例,包括上述任一所述的阵列基板结构。包括上述所述的阵列基板结构或利用上述制造方法产生的阵列基板结构。
本发明可以应用于显示装置,所述显示装置可以为:液晶面板、电子纸、OLED(有机发光二极管)面板、液晶电视、液晶显示器、数码相框、手机、平板电脑等任何具有显示功能的产品或部件。
以上实施方式仅用于说明本发明,而并非对本发明的限制,有关技术领域的普通技术人员,在不脱离本发明的精神和范围的情况下,还可以做出各种变化和变型,因此所有等同的技术方案也属于本发明的范畴,本发明的专利保护范围应由权利要求限定。
Claims (19)
1.一种薄膜晶体管阵列基板,包括衬底基板,以及在衬底基板上形成的薄膜晶体管、第二绝缘层、第一电极和第二电极;
其中,所述第一电极和所述第二电极用于形成电场;所述第二绝缘层位于所述第一电极和所述第二电极之间;
所述第二电极为梳状电极,且位于所述第二绝缘层的远离所述衬底基板一侧上;
所述阵列基板上还包括凸起结构,位于所述第一电极的靠近所述衬底基板的一侧,所述凸起结构的位置对应于所述梳状电极之间的空隙。
2.根据权利要求1所述的阵列基板,其特征是,所述凸起结构的凸起形状为棱柱形。
3.根据权利要求2所述的阵列基板,其特征是,所述棱柱形为三棱柱或四棱柱,三棱柱的顶角优选30°~90°;四棱柱的顶角优选105°~120°;三棱柱或四棱柱的底边的宽度小于所述梳状电极的空隙宽度。
4.根据权利要求2所述的阵列基板,其特征是,所述梳状电极为平行排列的多个条状电极。
5.根据权利要求1所述的阵列基板,其特征是,所述凸起结构包括第一电极层凸起,所述第一电极层凸起与所述第一电极同时形成。
6.根据权利要求1所述的阵列基板,其特征是,所述凸起结构包括栅极层凸起,所述栅极层凸起与所述薄膜晶体管的栅极同时形成。
7.根据权利要求1所述的阵列基板,其特征是,所述凸起结构包括栅极绝缘层凸起,所述栅极绝缘层凸起与所述薄膜晶体管的栅绝缘层同时形成。
8.根据权利要求1所述的阵列基板,其特征是,所述凸起结构为设置在所述第一电极与所述衬底基板之间的任意两层之间的透明块。
9.根据权利要求8所述的阵列基板,其特征是,所述凸起结构设置在所述第一电极与所述薄膜晶体管的栅绝缘层之间,或者设置在所述栅绝缘层与所述衬底基板之间。
10.根据权利要求8所述的阵列基板,其特征是,所述透明块为树脂材料块。
11.根据权利要求1所述的阵列基板,其特征是,所述第一电极与所述薄膜晶体管的漏极接触,所述第一电极作为所述阵列基板的像素电极;所述第二电极作为所述阵列基板的公共电极。
12.根据权利要求1所述的阵列基板,其特征是,所述第一电极作为所述阵列基板的公共电极;所述第二电极通过所述第二绝缘层上的过孔与所述薄膜晶体管的漏极接触,所述第二电极作为所述阵列基板的像素电极。
13.根据权利要求3所述的阵列基板,其特征是,所述三棱柱的截面呈等腰三角形。
14.根据权利要求3所述的阵列基板,其特征是,所述四棱柱的截面呈等腰梯形。
15.一种显示装置,其特征是,包括权利要求1~14中任一项所述的阵列基板。
16.一种根据权利要求1所述薄膜晶体管阵列基板的制造方法,其特征是,该方法包括:
在所述衬底基板上形成第一电极、薄膜晶体管、凸起结构以及第二绝缘层;
在所述第二绝缘层上方设置第二电极;
其中,所述第二电极为梳状电极,所述凸起结构的位置对应于所述梳状电极之间的空隙。
17.根据权利要求16所述的方法,其特征是,所述凸起结构包括第一电极层凸起,所述第一电极层凸起与所述第一电极同时形成。
18.根据权利要求16所述的方法,其特征是,所述凸起结构包括栅极层凸起,所述栅极层凸起与所述薄膜晶体管的栅极同时形成。
19.根据权利要求16所述的方法,其特征是,所述凸起结构的凸起形状为棱柱形。
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CN111679526A (zh) * | 2020-06-24 | 2020-09-18 | 武汉华星光电技术有限公司 | 显示面板及显示装置 |
CN111679526B (zh) * | 2020-06-24 | 2021-05-28 | 武汉华星光电技术有限公司 | 显示面板及显示装置 |
Also Published As
Publication number | Publication date |
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US9594280B2 (en) | 2017-03-14 |
WO2014139230A2 (zh) | 2014-09-18 |
US20150301414A1 (en) | 2015-10-22 |
WO2014139230A3 (zh) | 2014-11-06 |
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