CN103136028A - FLASH memorizer long-distance on-line upgrade method based on field programmable gate array (FPGA) - Google Patents
FLASH memorizer long-distance on-line upgrade method based on field programmable gate array (FPGA) Download PDFInfo
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Abstract
The invention provides a FLASH memorizer long-distance on-line upgrade method based on a field programmable gate array (FPGA). The FPGA serves as a main control chip and is used for receiving a command frame sent by an upper computer, feeding a response frame back to the upper computer and carrying out erasure and programming operation on a FLASH memorizer. The FPGA is used for receiving the command frame sent by the upper computer through a protocol of a serial port and judging that the command frame is a FLASH erasing command or a FLASH data frame through a zone bit of the command frame, wherein the FLASH erasing command comprises digital signal processing (DSP) programming file total length information, and the FLASH data frame comprises concrete contents of the DSP programming file. According to the FLASH memorizer long-distance on-line upgrade method based on the FPGA, the long-distance on-line upgrade of the FLASH memorizer can be achieved without dismounting the whole system, a long-distance on-line upgrade module is not affected, and vigorousness of the system is increased.
Description
Technical field
The invention belongs to communication technical field, relate to a kind of remote online upgrade method of FLASH storer.
Background technology
At present, in system, more and more higher to the requirement of real-time of realizing.Therefore, on-site programmable gate array FPGA (Field Program Gates Array) adds that the framework of high speed digital signal processor DSP (Digital SignalProcessig) is more and more used.The FLASH storer claims again flash memory, because it can be repeatedly erasable online, and the not advantage of obliterated data of cutting off the power supply, the program storage as DSP uses usually.
Online upgrading claims again online programming, the content in namely can online updating FLASH storer.In general, the method that the program code programming of DSP is entered the FLASH storer has three kinds: 1. by the JTAG emulation interface of DSP, the FLASH storer is programmed, but need to open the also very difficult requirements that adapt to the remote online programming of factor such as device housings when it can not break away from software emulation environment, programming, and emulator has also additionally increased cost; 2. adopt special-purpose programmable device to carry out off-line programing, but this method complicated operation, and can not carry out online programming arbitrarily to the content of FLASH storer; 3.DSP chip carries out online programming as CPU to the FLASH storer.Although can to the upgrading of FLASH storer remote online, also there be its drawback in this method.In a single day this method is cut off the power supply or breaks down in escalation process, caused upgrading unsuccessfully, and in the FLASH storer, old DSP program code is wiped free of so, new code does not also write, when again powering up, the DSP operation of can't booting, thus system can't carry out the remote online upgrading again.
Summary of the invention
In order to overcome the deficiencies in the prior art, the invention provides a kind of FLASH storer remote online upgrade method based on FPGA, the user need not to enter the field stripping system, only needs can carry out the remote online upgrading to the FLASH storer controlling platform operation upper computer software.
The technical solution adopted for the present invention to solve the technical problems comprises the following steps:
A) DSP utilizes program code to generate DSP programming file;
B) host computer reads DSP programming file, sends the erasable order of FLASH to FPGA, and wait FPGA feedback is wiped successfully acknowledgement frame; After FPGA receives the erasable order of FLASH, namely begin the FLASH storer is carried out erase operation, and to wiping product test, after wiping successfully, wipe successfully acknowledgement frame to the host computer feedback;
C) after host computer is received and wiped successfully acknowledgement frame, the DSP program code in DSP programming file is pressed serial port protocol send a frame serial data to FPGA, wait for the FPGA feedback complete acknowledgement frame of upgrading or lower frame data claim frame;
D) FPGA receives the serial data that host computer sends, go here and there and change, the 8 bit parallel data that are converted to are entered the FLASH storer by the byte programming, and carry out verification, until the programming of these frame data complete after, whether programming is complete to judge whole burning file, if not complete, to the lower frame data claim frame of host computer feedback; If complete, to the complete acknowledgement frame of host computer feedback upgrading;
E) if host computer is received lower frame data claim frame, send the next frame serial data, and return to steps d); If host computer is received the complete acknowledgement frame of upgrading, show to upgrade successfully online on the host computer interface and complete, the remote online escalation process is complete.
The invention has the beneficial effects as follows: FLASH remote online upgrading module is solidificated in FPGA, can realizes the remote online upgrading of FLASH storer, and need not whole system is dismantled.Concerning circuit board, only need design the code in FPGA, substantially do not affect hardware design.In the process of upgrading, even cut off the power supply or break down, cause this upgrading to complete midway, also can carry out next remote online upgrading, because the upgrading of the remote online in FPGA module is also unaffected, increased the robustness of system.
Description of drawings
Fig. 1 is FLASH storer remote online upgrading schematic diagram;
Fig. 2 is remote online upgrading hardware connection layout;
Fig. 3 is remote online upgrade software process flow diagram.
Embodiment
The present invention as main control chip, receives the command frame that host computer issues with FPGA, to host computer feedback acknowledgement frame, and the FLASH storer is wiped and programming operation.FPGA receives by serial port protocol the command frame that host computer issues, and judge that by the zone bit of command frame command frame is the erasable order of FLASH, or FLASH Frame, wherein comprise DSP programming file total length information in the erasable order of FLASH, comprise the particular content of DSP programming file in the FLASH Frame.
Four parts are mainly contained in the present invention: epigynous computer section, FPGA part, DSP part, FLASH part.Host computer sends the erasable order of FLASH to FPGA, reads DSP programming file and it is handed down to FPGA one by one by 232 serial port protocols; Solidify FLASH remote online upgrading module in FPGA, be responsible for resolving the order that host computer sends, and according to order, FLASH is carried out erase operation, maybe the valid data of the serial that receives are gone here and there and changed rear programming and enter the FLASH storer; The bus application of DSP response FPGA discharges bus; FLASH is the object of remote online updating operation.
The FLASH storer remote online upgrade method based on FPGA that the present invention proposes comprises the following steps:
F) generating programming file: DSP utilizes program code to generate DSP programming file.
G) host computer sends the erasable order of FLASH: host computer reads DSP programming file, sends the erasable order of FLASH to FPGA, and wait FPGA feedback is wiped successfully acknowledgement frame.
After FLASH memory erase: FPGA receives the erasable order of FLASH, namely begin the FLASH storer is carried out erase operation, and (method of inspection is that FPGA reads the content of wiping part in the FLASH storer, if the data of reading are 0xFF, explanation is wiped successfully to wiping product test.), after wiping successfully, wipe successfully acknowledgement frame to the host computer feedback.
H) host computer sends valid data: after host computer is received and wiped successfully acknowledgement frame, the DSP program code in DSP programming file is pressed serial port protocol send a frame serial data to FPGA, wait for the FPGA feedback complete acknowledgement frame of upgrading or lower frame data claim frame.
I) FLASH storer programming: FPGA receives the serial data that host computer sends, go here and there and change, the 8 bit parallel data that are converted to are entered the FLASH storer by the byte programming, and (method of calibration is for after writing 8 bit parallel data XX toward an address to carry out verification, need this address read-outing data from the FLASH storer again, whether what detection was read is XX, if explanation correctly writes.), until the programming of these frame data is complete.After the programming of these frame data was complete, (determination methods be whether the file size of more burned FLASH storer equates with whole programming file size, if equal illustrate that programming is complete, if unequally illustrate that programming is not complete in judgement.) whether programming is complete for whole burning file, if not complete, to the lower frame data claim frame of host computer feedback; If complete, to the complete acknowledgement frame of host computer feedback upgrading.
J) the remote online upgrading is completed: if host computer is received lower frame data claim frame, send the next frame serial data, and return to steps d); If host computer is received the complete acknowledgement frame of upgrading, show on the host computer interface " online upgrading is successfully completed ", the remote online escalation process is complete.
The present invention is further described below in conjunction with drawings and Examples.
At first the chip model in the present embodiment is introduced: that fpga chip is selected is the EP3C120 of altera corp, and that dsp chip is selected is the TS101 of ADI company, and that the FLASH storer is selected is the S29GL256N of SPANSION company.
The below is introduced the pin of using in the remote online escalation process, Addr[24..0] be address bus, Data[7..0] be data bus, RD is the read signal of Flash storer, WE is the write signal of Flash storer, CE is the chip selection signal of Flash storer, and HBR is the bus application pin of DSP, and HBG is the bus application response pin of DSP.These pins all are connected with the common I/O (Input/Output) of FPGA.
The invention provides a kind of FLASH storer remote online upgrade method based on FPGA, Fig. 3 is the method process flow diagram, comprises the following steps:
Step 1: DSP changes into DSP programming file with program code.In the present embodiment, the programming file is metric ldr formatted file.
Step 2: operation upper computer software, read step one generate DSP programming file, send the erasable order of FLASH to FPGA, wherein comprise DSP programming file size information, wait for that subsequently the FPGA feedback wipes successfully acknowledgement frame.After FPGA receives the erasable order of FLASH, DSP programming file size information is deposited, will utilize this information in step 4.Subsequently, FPGA need to apply for bus to DSP.In the present embodiment, FPGA drags down the HBR pin of dsp chip, then detects the HBG pin, if the HBG pin is high, continues to wait for until its step-down; If HBG pin step-down, the success of application bus can be carried out erase operation to the FLASH storer.FPGA carries out erase operation to FLASH, and in the present embodiment, the programming file is less, and a sector only need wiping the FLASH storer gets final product.Subsequently, FPGA reads the content of this sector in the FLASH storer, and is to be erased if the data of reading entirely for 0xFF, continue etc., and again reads this sector content every certain hour; If the data of reading are 0xFF, explanation is wiped successfully, wipes successfully acknowledgement frame to the host computer feedback.
Step 3: after host computer is received and wiped successfully acknowledgement frame, begin to send valid data.In the present embodiment, host computer sends a frame serial data to fpga chip with DSP programming file by 232 serial port protocols, waits for subsequently the FPGA feedback complete acknowledgement frame of upgrading or lower frame data claim frame.
Step 4: FPGA receives the serial data that host computer sends, go here and there and change, 8 bit parallel data after conversion are entered the FLASH storer by the byte programming, every burned byte counter adds 1, then the burned correctness of verification is until the programming of these frame data is complete.In the present embodiment, a frame data length is 256, after writing 8 bit parallel data XX toward an address, need this address read-outing data from the FLASH storer again, see whether what read is XX, thereby judge whether correctly to write, until 256 bytes all correctly write.Whether programming is complete to judge at last whole DSP burning file.In the present embodiment, determine whether that by the general act Length Ratio that will deposit in counter and step 2 upgrading is complete.If programming is not complete, FPGA is to the lower frame data claim frame of host computer feedback; If programming is complete, FPGA feeds back the complete acknowledgement frame of upgrading to host computer, and the HBR pin is set high resistance state.
Step 5: if host computer is received lower frame data claim frame, send the next frame serial data, and return to step 4; If host computer is received the complete acknowledgement frame of upgrading, show on the host computer interface " online upgrading is successfully completed ", the remote online escalation process is complete.
Fig. 1 is FLASH storer remote online upgrading schematic diagram.Because level is different, serial ports of computers can not directly be connected with fpga chip, can carry out level conversion by serial ports level transferring chip MAX232.
In order to make those of ordinary skills understand the present invention; and the present invention is described in detail; but can expect, can also make other variation and modification within not breaking away from the scope that claim of the present invention contains, these variations and revising all within protection scope of the present invention.
Claims (1)
1. the FLASH storer remote online upgrade method based on FPGA, is characterized in that comprising the steps:
A) DSP utilizes program code to generate DSP programming file;
B) host computer reads DSP programming file, sends the erasable order of FLASH to FPGA, and wait FPGA feedback is wiped successfully acknowledgement frame; After FPGA receives the erasable order of FLASH, namely begin the FLASH storer is carried out erase operation, and to wiping product test, after wiping successfully, wipe successfully acknowledgement frame to the host computer feedback;
C) after host computer is received and wiped successfully acknowledgement frame, the DSP program code in DSP programming file is pressed serial port protocol send a frame serial data to FPGA, wait for the FPGA feedback complete acknowledgement frame of upgrading or lower frame data claim frame;
D) FPGA receives the serial data that host computer sends, go here and there and change, the 8 bit parallel data that are converted to are entered the FLASH storer by the byte programming, and carry out verification, until the programming of these frame data complete after, whether programming is complete to judge whole burning file, if not complete, to the lower frame data claim frame of host computer feedback; If complete, to the complete acknowledgement frame of host computer feedback upgrading;
E) if host computer is received lower frame data claim frame, send the next frame serial data, and return to steps d); If host computer is received the complete acknowledgement frame of upgrading, show to upgrade successfully online on the host computer interface and complete, the remote online escalation process is complete.
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