CN107967236A - A kind of VxWorks system board and its software design approach based on MPC7410 processors - Google Patents
A kind of VxWorks system board and its software design approach based on MPC7410 processors Download PDFInfo
- Publication number
- CN107967236A CN107967236A CN201711202535.7A CN201711202535A CN107967236A CN 107967236 A CN107967236 A CN 107967236A CN 201711202535 A CN201711202535 A CN 201711202535A CN 107967236 A CN107967236 A CN 107967236A
- Authority
- CN
- China
- Prior art keywords
- module
- mpc7410
- tsi107
- memory
- chips
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F15/00—Digital computers in general; Data processing equipment in general
- G06F15/76—Architectures of general purpose stored program computers
- G06F15/78—Architectures of general purpose stored program computers comprising a single central processing unit
- G06F15/7803—System on board, i.e. computer system on one or more PCB, e.g. motherboards, daughterboards or blades
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F11/00—Error detection; Error correction; Monitoring
- G06F11/36—Preventing errors by testing or debugging software
- G06F11/362—Software debugging
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F8/00—Arrangements for software engineering
- G06F8/20—Software design
- G06F8/22—Procedural
Abstract
The present invention relates to a kind of VxWorks system board and its software design approach based on MPC7410 processors, including clock module, download module, reset circuit module, power module, main chip module, bridge and memory control module, serial port module, network interface module, main chip module uses CPUs of the MPC7410 for core, bridge is used for bridge joint and memory management and the pci bus management of system board with memory control module, serial port module connecting bridge is used to print Debugging message with memory control module, and network interface module is used to download VxWorks system image file.The present invention is also configured with BSP document designs method and software debugging method, VxWorks system board according to the present invention based on MPC7410 processors can not only be grasped the VxWorks system design based on MPC7410 processors, exploitation with system and its start method, and the VxWorks system board design for being alternatively other MPC series processors provides Technical Reference, technical support can be provided with repairing for the test of the Power PC Processor plate of novel airborne VxWorks system.
Description
Technical field
It is specifically a kind of based on MPC7410 processors the present invention relates to VxWorks system board design field
VxWorks system board and its software design approach.
Background technology
At present, related Power PC Processor, VxWorks systematic research are concentrated mainly on applied system design, drive and open
Hair, single board design etc., as Zhang Yukun et al. in 2013《Computer technology and development》What periodical was delivered《It is based on
The net Network Adapter Driver Development of VxWorks》With Liu Bing et al. in 2014, and in relation to the VxWorks based on MPC7410 processors
The specific design method of system board is less.Through domestic and international existing literature data-searching, still belong to blank.
For a long time, the containing in processor circuit board of all kinds of type aircrafts repaiied is held by factory, and processor is concentrated mainly on DSP
(including TMS320F2407, TMS320VC5416 and TMS320VC6713 series TI company DSP), 80CX86 (including
80C186,80486 processors), FPGA (including EPM7128 etc.) and CPLD (including XC95144 etc.) etc., but to containing
The plate of VxWorks system, which is repaired, still belongs to blank.
VxWorks system based on Power PC Processor is the canonical system of new machine airborne computer at present.With follow-up
New architecture aircraft is successively into factory, wherein the avionics product repairing quantity containing Power PC Processor will be in rising trend year by year.In order to
System grasps the detection and depth repair capability of this kind of product, and there is an urgent need to strengthen the technological reserve of this respect.For this reason, propose this
The application research of patent.
The needs that this patent is repaiied deeply for the Power PC Processor plate of the follow-up new machine system containing VxWorks of satisfaction, are based on
This Power PC Processor of MPC7410, develops one piece of VxWorks system board with serial ports, network interface, SDRAM and FLASH,
On the basis of being systematically discussed to the plate function, its hardware structure and each several part circuit design are provided, and
Under Tornado2.2 environment, BSP bags are developed, provide its hardware design and the aspect that should be noted in software development process, finally
It is tested.
The content of the invention
The technical problems to be solved by the invention are to propose a kind of VxWorks system based on MPC7410 processors
The specific design method of plate, the test and maintenance for airborne VxWorks system circuit board provide technical support, are other MPCXXXX
The board design of serial CPU provides Technical Reference.
The technical problems to be solved by the invention are realized using following technical scheme：
A kind of VxWorks system board based on MPC7410 processors, including clock module, download module, reset circuit mould
Block, power module, main chip module, bridge and memory control module, serial port module, network interface module, the clock module are institute
State bridge and provide external crystal-controlled oscillation clock with memory control module, the download module connects the main chip module and is used under program
Carry, the reset circuit module connects main chip module, bridge and the memory control module, serial port module and network interface module and carries
For reset signal, the power module connects each module and supplies different supply voltages, and the bridge leads to memory control module
Cross 60x buses and connect bridging functionality and managing internal memory that the main chip module realizes PowerPC to PCI, the serial ports mould
Block connects the bridge and is used for input and output Debugging message with memory control module, and the network interface module is connected by pci bus
The bridge is used to download VxWorks system image and communication data with memory control module.
The reseting sequence of the reset circuit module has strict demand, hand-reset signal PWRST* and emulator hard reset
Signal pCOP_HRST* passes through has pci bus reset signal PCI_RST* to be used for the bridge and memory control with gate logic output
The master chip Tsi107 controllers of module reset, network interface resets and pci card resets, and the Tsi107 controllers produce the main core
The reset signal MPC107_HRST* of piece module is used for main chip module described in hard reset, the master chip hard reset signal
MPC107_HRST* exports serial ports reset signal UART_RST* by non-gate logic and is used to reset serial port module, 107 warm resets letter
Number M107_SRST* exports the soft multiple of the main chip module with emulator warm reset signal pCOP_SRST* by be connected with door
Position signal pCPU_SRST*.
The clock module produces 33MHZ clocks by external crystal-controlled oscillation and inputs the bridge and the main core of Memory Controller module
Piece Tsi controllers, the clock 100MHZ of the master chip MPC7410 of the main chip module is produced by Tsi107 controllers, described
Tsi controllers are connected with SDRAM and pci bus, and the 100MHZ clocks and pci bus of SDRAM are provided by the Tsi controllers
33MHZ clocks.
The main chip module uses MPC7410 processors, operates in 400MHZ frequencies, and the MPC7410 processors connect
It is connected to L2 cachings to be used to meet high speed processing demand, the L2 cachings use MCM69P737 chips.
The bridge and Memory Controller module are used as master control using Tsi107 chips, described in the Tsi107 chips connect
Serial port module, the serial port module are used for input and output Debugging message, the Tsi107 chips connection using NSC16C552 chips
In the network interface module, the network interface module is used for network interface download system mirror image, the Tsi107 cores using GD82559ER chips
Piece is connected with the SDRAM memory of 128MB, and the SDRAM memory uses 5 K4561632A chips, wherein 4 conducts with
Machine memory, 1 is used for data check, and institute's Tsi107 chips are connected with FLASH memory and are used for storage program area guiding journey
Sequence, system kernel and user application, the FLASH memory use AM29LV800BT chips, and the Tsi107 chips connect
It is connected to PCI local slot, the PCI local there are 32 bit address, and traversal queries equipment on PCI local, is root
Selected according to idsel signal, wherein the idsel signal of the network interface module meets AD12, the idsel signal of PCI slot meets AD13.
4 SDRAM in the SDRAM memory are as 64 data 128MB memory headrooms of an entirety, chip selection signal
All it is CS0, address wire is Tsi107 chip handbook connections, and 16 position datawires of every SDRAM are interior with the Tsi107 chips
Deposit data bus height Opposite direction connection.
The FLASH memory data cable is connected in the Tsi107 internal storage datas bus, 8 position datawires with it is described
The internal storage data bus height Opposite direction connection of Tsi107 chips.
A kind of software design approach of the VxWorks system board based on MPC7410 processors, including BSP document design sides
Method and software debugging method, the BSP document designs method include step：Memory headroom distribution, configuration BSP header files, selection
Can download the image file type of type, initial configuration file, establish BSP engineerings, the setting of guiding row, serial ports driver and
Network port driving program.
The software debugging method includes step：Hardware power up test, the foundation of debugging enironment, Codewarrior8.8 are soft
Part setting, adjustment method, debugging driving equipment points for attention, serial port drive debugging, network port driving debugging.
The beneficial effects of the invention are as follows propose a kind of the specific of VxWorks system board based on MPC7410 processors to set
Meter method, the test and maintenance for airborne VxWorks system circuit board provide technical support, are set for the board of other MPC series CPU
Meter provides Technical Reference.
Brief description of the drawings
The present invention is further described with reference to the accompanying drawings and examples.
Fig. 1 is the system hardware structure figure of the present invention；
Fig. 2 is the reset circuit graph of a relation of the present invention；
The BSP files that Fig. 3 is the present invention form figure；
Fig. 4 is the BSP document design method and step figures of the present invention；
Fig. 5 is the software debugging method block diagram of the present invention.
Embodiment
In order to make the technical means, the creative features, the aims and the efficiencies achieved by the present invention easy to understand, below it is right
The present invention is expanded on further.
In order to meet the test needs of VxWorks system, propose claimed below：
1) there is 1 road serial ports, and can be by serial ports output control platform type information, and display system start-up course is various
Information；
2) there is 1 road network mouth communication function, and VxWorks system image file can be downloaded by network interface, so as to fulfill being
System starts；
3) have to SDRAM, FLASH read-write capability, memory headrooms of the wherein SDRAM as system, FLASH is used for storing
Bootstrap；
4) there is 1 tunnel pci bus communication interface, to realize and carry out communication friendship based on PCI9054 data acquisition I/O plates
Mutually；
5) the VxWorks system based on MPC7410 can be achieved to establish and start, be follow-up system application software (such as PCI)
Exploitation lays the foundation.
System hardware structure figure as shown in Figure 1：
The main composition device of VxWorks system board is based on processor device (MPC7410), bridge device (Tsi107), string
Mouthpart part (NS16C552), network interface device (GD82559ER), SDRAM device (K4S561632A) and FLASH devices
(Am29LV800BT)。
A kind of VxWorks system board based on MPC7410 processors, including clock module, download module, reset circuit mould
Block, power module, main chip module, bridge and memory control module, serial port module, network interface module, the clock module are institute
State bridge and provide external crystal-controlled oscillation clock with memory control module, the download module connects the main chip module and is used under program
Carry, the reset circuit module connects main chip module, bridge and the memory control module, serial port module and network interface module and carries
For reset signal, the power module connects each module and supplies different supply voltages, and the bridge leads to memory control module
Cross 60x buses and connect bridging functionality and managing internal memory that the main chip module realizes PowerPC to PCI, the serial ports mould
Block connects the bridge and is used for input and output Debugging message with memory control module, and the network interface module is connected by pci bus
The bridge is used to download VxWorks system image and communication data with memory control module.
The input voltage of the power module is 12V, by voltage conversion chip output voltage include 1.8V, 2.5V and
3.3V, stabilized power source is provided for different chips.
Reset circuit graph of a relation as shown in Figure 2：
The reseting sequence of the reset circuit module has strict demand, hand-reset signal PWRST* and emulator hard reset
Signal pCOP_HRST* passes through has pci bus reset signal PCI_RST* to be used for the bridge and memory control with gate logic output
The master chip Tsi107 controllers of module reset, network interface resets and pci card resets, and the Tsi107 controllers produce the main core
The reset signal MPC107_HRST* of piece module is used for main chip module described in hard reset, the master chip hard reset signal
MPC107_HRST* exports serial ports reset signal UART_RST* by non-gate logic and is used to reset serial port module, 107 warm resets letter
Number M107_SRST* exports the soft multiple of the main chip module with emulator warm reset signal pCOP_SRST* by be connected with door
Position signal pCPU_SRST*.
The clock module produces 33MHZ clocks by external crystal-controlled oscillation and inputs the bridge and the main core of Memory Controller module
Piece Tsi controllers, the clock 100MHZ of the master chip MPC7410 of the main chip module is produced by Tsi107 controllers, due to
MPC7410 processors use 4 frequency doubling systems, therefore CPU frequency is 400MHZ, and the Tsi controllers are connected with SDRAM and PCI
Bus, the 100MHZ clocks of SDRAM and the 33MHZ clocks of pci bus are provided by the Tsi controllers.
The main chip module uses MPC7410 processors, be a new generation G4 embeded processors, speed of service highest
For 500MHZ, the system operates in 400MHZ frequencies, and the MPC7410 processors contain a L2Cache controller in itself, because
This L2Cache caching for being connected with a 2Mbytes is used to meet high speed processing demand, and the L2Cache cachings use
MCM69P737 chips.By the reasonable disposition to memories at different levels, the high speed processing ability for processor of impeaching can be sent out completely, it is full
The requirement of sufficient Networking Platform.
The configuration signal of the master chip MPC7410 is used to set the working method of processor in the present system, wherein/
EMODE is mode bus selection, it should connects chip power signal and draws high.BVSEL is that bus voltage selection signal and MPC7410 are hard
Reset and be connected.The configuration signal that Tsi107 is sampled when resetting is drawn high or is dragged down according to handbook requirement selection.
The bridge and Memory Controller module use Tsi107 chips, and as master control, Tsi107 chips are for PowerPC
Bridge chip/the Memory Controller specially designed, mainly realizes the bridging functionality of PowerPC to PCI, while manages memory,
It may operate in the processor bus frequency of up to 133MHz.The system Tsi107 is operated in host mode patterns, by Tsi
107 management memories and pci bus part.
The Tsi107 chips connect the serial port module, and the serial port module uses NSC16C552 chips, is articulated in
The least-significant byte of Tsi107 Memory Controller Hub.Due to being simple serial ports, serial ports need to only provide TXD and RXD signals.Serial ports is mainly used as
The console of type information and input instruction interaction is exported in System guides, startup and operational process.
The Tsi107 chips are connected to the network interface module, the local that the design of network interface part is controlled based on Tsi107
Pci bus, mainly by GD82559ER chips, network isolation transformer and RJ45 three parts composition.Wherein GD82559ER is one
A high integration, high-performance, low-power consumption 10/100Mbps fast Ethernet controllers.Network interface module is mainly used for downloading
VxWorks system image and data communication.
The Tsi107 chips are connected with the SDRAM memory of 128MB, and SDRAM is the operation of program and preserves interim text
Part provides space, and the SDRAM memory uses 5 K4561632A chips, wherein 4 are used as random access memory, 1 is used for
Data check, 4 SDRAM in the SDRAM memory are as 64 data 128MB memory headrooms of an entirety, piece choosing letter
Number be all CS0, address wire is Tsi107 chip handbook connections, due to the reason of big small end, 16 position datawires of every SDRAM with
The internal storage data bus height Opposite direction connection of the Tsi107 chips.
The Tsi107 chips are connected with FLASH memory and are used for storage program area bootstrap, system kernel and use
Family application program, the FLASH memory use AM29LV800BT chips, since FLASH data cables are connected on Tsi107 memory numbers
According in bus, 8 position datawires are due to the big small end also Opposite direction connection as SDRAM.In addition, address wire will be in strict accordance with Tsi107
Handbook sequence of addresses is attached.
The Tsi107 chips are connected with PCI local slot, and the PCI local has 32 bit address, and PCI is local
Traversal queries equipment in bus, is selected according to idsel signal, wherein the idsel signal of the network interface module meets AD12, PCI
The idsel signal of slot meets AD13.
BSP (Board Support Package), i.e. board suppot package, are between motherboard hardware and operating system
One layer, belong to the part of operating system, in order to support operating system, enable preferably to run on hardware master
Plate.The migration process of BSP is exactly to crop unwanted file, and constantly adds each file into a new board suppot package
To realize the process of its function, kernel initialization code is realized first in this process, then add the driving of each peripheral hardware one by one
Program.
BSP files as described in Figure 3 form figure：
The BSP of this VxWorks system is by public execution file, bootstrap file, system image file and device drives
File forms, and is integrated with hardware-related software and the unrelated software of fractional hardware, there is provided VxWorks access the driving of hardware
The initialization operation of program and relevant device, can initialize CPU, target machine and system resource etc..
BSP design method block diagrams as shown in Figure 4, need to note in the BSP board suppot packages exploitation of VxWorks system
Meaning be：
1) system memory space distribution is paid attention to:
Each module normal work needs different memory headrooms to support on minimum system plate, the address and space of each module
Size concrete numerical value writes config.h files, sets and correctly just can guarantee that each module has each independent memory headroom.Pay attention to
The memory headroom of Power PC Processor is related with chip selection signal.
2) BSP header files:
BSP header files define it is all with minimum system is relevant include file and configuration information, macrodefinition etc., if setting
It is incorrect, generation BSP failures or correlation module may be caused not to work normally.Each module is set in bspname.h files
Initial address and size and macrodefinition.Makefile definition compiles and links whole BSP rules.Notice that compilation tool will select
With the corresponding compiler when establishing BSP engineerings.
3) selection can download the image file type of type：
Since the bootstrap of VxWorks has different mirror image natures, different type is generated according to different demands
Bootrom files, otherwise emulator cannot identify the bootstrap of download, guiding task can not be completed.In the design
Tornado2.2 generations Bootrom will select that the mirror image of type can be downloaded, and attentional selection does not compress and bin binary files.Flash
Download mirror image and use bootrom_uncmp.bin, establish Codewarrior8.8 requirement of engineering and use bootrom_uncmp texts
Part.
4) initial configuration file：
Configuration file function is that minimum system plate is connected with host computer with emulator, initializes system sdram, is opened up interior
Deposit.Wherein each module parameter of memory register must be provided with correctly, and otherwise SDRAM spaces cannot be read and write.Pay attention to according to Tsi107
Each parameter of handbook sdram interface is configured, and ensures that sequential will be matched with used SDRAM device, and memory sky is established in completion
Between task.
5) Tornado2.2 establishes BSP engineerings：
BSP is compiled and the generation of bootstrap is completed in the case where Tornado2.2 establishes BSP engineerings.BSP engineerings are just
Really establish determine cut compiling after BSP whether can normal service in system and each hardware module.Pay attention at " Workspace "
In tabs select VxWorks label, the file of display is cut, it would be desirable to component right button " include " cover
In VxWorks system BSP.
6) setting of guiding row：
System board guiding row provides Bootrom loading VxWorks mirror image instruction, including guiding equipment, mirror path,
The parameters such as the user name of the IP address and FTP of host and target machine, password.Paying special attention to the variable of not assignment not write out,
Otherwise guiding line program is called to collapse.
7) serial ports driver：
Serial ports is the important debugging interface that host communicates with minimum system plate.System resource can be carried out by serial ports
Check and configure and the loading of system kernel.Serial ports driver is write, and mainly includes initialization function and receives and send out
Send function.TtyDrv manages the communication between I/O systems and true driver.Pay attention to completing tty intermediate drivers equipment
Establishment be to realize the precondition of bottom serial port drive functions of the equipments, otherwise serial equipment can not complete system and user is defeated
Enter/the work of output control platform.
8) network port driving program：
Network interface is the mainstream debugging interface of PowerPC single board computers, is mainly used for VxWorks image download and data pass
It is defeated.Network port driving program is directly interacted with network hardware equipment, if network port driving programming is problematic, causes network interface can not
Use, the data transmission capabilities of minimum system plate will be reduced substantially, and can increase the difficulty of debugging BSP.
Network port driving program committed step is：First complete netinit fei82557EndLoad and equipment starts
Two functions of fei82557Start, then it is received and transmitted processing function.Wherein MUX intermediate layers be management I/O systems with it is true
The interface of two layers of communication above and below real driver.
Pay special attention to, confirm the receiving unit in network interface chip and the completion of order unit (including transfer function) initialization
The process realized with operating instruction function, compiling procedure pay attention to the processing to order retaking of a year or grade status word in Interrupt Subroutine
Judge.
After the BSP files transplanting of VxWorks system, show that each hardware components of system board are working properly,
To build the debugging of VxWorks system program and download environment to whole system plate.
Used debugging acid is the debugging software Codewarrior8.8 of Wind River companies and its imitates accordingly
True device Codewarrior USB TAP.
The step of software debugging method block diagram as shown in Figure 5, debugging, is：
1) hardware power up test：
BSP is debugged in minimum system, it is necessary to assure the hardware condition of minimum system plate debugging is correct.Hardware is BSP
With the premise and basis of VxWorks system application, therefore hardware design cannot go wrong.Pay special attention to debugging and ensure be
Uniting, each modular power source of plate, clock and configuration signal are normal, and each device pin is without short circuit and rosin joint.If system power-on reset is just
Often, serial port module meeting print system reseting address, hard reset address 0xFFF00100 should be jumped to by powering on, and show each mould of system board
Block reset is correct.
2) foundation of debugging enironment：
VxWorks system debug environment is the platform for carrying out the Hardware Design and BSP exploitations, and development environment must be correct
Configuration could be that follow-up debugging is laid a solid foundation.Pay attention to directly opening bootrom_ under Codewarrior8.8 environment
Uncmp files, software can add BSP engineerings automatically, and alignment processing type number is selected in engineering installation, will on hosted environment
ICP/IP protocol, ftp server are installed and mainframe network IP address is set.
3) Codewarrior8.8 software design patterns：
Debugging acids of the Codewarrior8.8 as minimum system plate, it is particularly important that being familiar with the application method of software.Such as
The related option setting of fruit is wrong, and debugging process will be obstructed.
Pay special attention to the software interface parameter setting downloaded：
3.1) Target Board memory ram buffer address and size are 0x00002000 and 0x00020000；
3.2) before downloading Bootrom, each sectors of FLASH first to be all wiped and empty detection is completed；
3.3) download interface " limitation address realm " not tick, " application address offset " will be ticked and be arranged to
0xFFF00100, otherwise can not complete to download.
4) adjustment method：
Since in BSP debugging process, the external equipment such as serial ports network interface may cannot temporarily be used also, suitable debugging is selected
Means seem most important.Otherwise it can not confirm the concrete condition that bootstrap performs, cause next step debugging efforts not open
Exhibition.Pay attention to being carried out the trace debug of processor with " Attatch " of Codewarrior8.8.In addition, the tool of determining program operation
Body position：Before serial ports tune leads to, breaking；After serial ports tune leads to, journey can be checked by the use of printf () function as mark
The position of sort run.Checked by memory window or whether rewrite data, the definite register for debugging each module are empty in memory
Between correctly configured.
5) driving equipment points for attention are debugged：
Driving equipment is debugged as the very important part of BSP debugging, it is necessary to assure driver can be completed pair
The support of hardware module, realizes the various functions of minimum system plate demand.Debug external equipment driver when, first individually into
The read-write operation of row device register.System trace debug driver, procedures of observation are transported again after equipment initialization normally completes
Row state and register read-write content, determine whether debugging passes through.
Pay special attention to, the data structure such as various equipment interface controls, function, state defined in driver header file,
Clearly each member variable and data structure function are had to, otherwise the various call relations of variable can not in driver processing function
Clear, also just can not be successfully completion debugging.
6) serial port drive is debugged：
Serial ports can be used as system control position output type information, it is that extremely important debugging is set in BSP debugging process
It is standby, therefore correct adjust of serial port drive logical means that the debugging of BSP completes an important step.Pay special attention to, serial port of host computer and
The baud rate for the initialization that bspname.h is set will be with setting unanimously in serial ports driver.In addition, serial port drive can work
In interruption and poll pattern, do not set also if interrupted at debugging initial stage, can first using PollInput () and
PollOutput (), which is polled to send and receive, completes data transfer.Complete to interrupt registration, then be arranged on interrupt mode downward
Examination.
7) network port driving is debugged：
Network port driving program support network interface hardware device is interacted with system, and the transmission rate and data volume of network interface are much larger than
Serial ports.Only network interface program debugging success, will be that VxWorks system image is downloaded and startup is taken a firm foundation.Pay attention to network interface
In driver debugging process, it is crucial first the problem of be to find equipment by pci interface traversal to carry out matching somebody with somebody for PCI space again
Put.It is data further it is necessary to want trace debug to ensure that endload () and endStart () function complete loading and start task
The reception and transmission of frame are ready.
Basic principle, main feature and the advantages of the present invention of the present invention has been shown and described above.The technology of the industry
Personnel are it should be appreciated that the present invention is not limited to the above embodiments, and what is described in the above embodiment and the description is only the present invention
Principle, without departing from the spirit and scope of the present invention, various changes and modifications of the present invention are possible, these change and
Improvement all fall within the protetion scope of the claimed invention.The claimed scope of the invention is by appended claims and its equivalent
Thing defines.
Claims (10)
- A kind of 1. VxWorks system board based on MPC7410 processors, it is characterised in that：Including clock module, download module, Reset circuit module, power module, main chip module, bridge and memory control module, serial port module, network interface module, when described Clock module provides external crystal-controlled oscillation clock for the bridge and memory control module, and the download module connects the main chip module For download program, the reset circuit module connect main chip module, bridge and the memory control module, serial port module and Network interface module provides reset signal, and the power module connects each module and supplies different supply voltages, the bridge and memory Control module realizes the bridging functionality and managing internal memory of PowerPC to PCI by the 60x buses connection main chip module, The serial port module connects the bridge and is used for input and output Debugging message with memory control module, and the network interface module passes through Pci bus connects the bridge and is used to download VxWorks system image and communication data with memory control module.
- A kind of 2. VxWorks system board based on MPC7410 processors according to claim 1, it is characterised in that：It is described The reseting sequence of reset circuit module has strict demand, hand-reset signal PWRST* and emulator hard reset signal pCOP_ HRST* passes through the master for having pci bus reset signal PCI_RST* to be used for the bridge and memory control module with gate logic output Chip Tsi107 controllers reset, network interface resets and pci card resets, and the Tsi107 controllers produce the main chip module Reset signal MPC107_HRST* is used for main chip module described in hard reset, the master chip hard reset signal MPC107_HRST* Serial ports reset signal UART_RST* is exported by non-gate logic to be used to reset serial port module, 107 warm reset signal M107_SRST* Pass through with emulator warm reset signal pCOP_SRST* and the warm reset signal pCPU_ for exporting the main chip module is connected with door SRST*。
- A kind of 3. VxWorks system board based on MPC7410 processors according to claim 1, it is characterised in that：It is described Clock module produces 33MHZ clocks by external crystal-controlled oscillation and inputs the bridge and the master chip Tsi controllers of Memory Controller module, The clock 100MHZ of the master chip MPC7410 of the main chip module, the Tsi controllers connection are produced by Tsi107 controllers There are SDRAM and pci bus, the 100MHZ clocks of SDRAM and the 33MHZ clocks of pci bus are provided by the Tsi controllers.
- A kind of 4. VxWorks system board based on MPC7410 processors according to claim 1, it is characterised in that：It is described Main chip module uses MPC7410 processors, operates in 400MHZ frequencies, and the MPC7410 processors are connected with L2 cachings and use In meeting high speed processing demand, the L2 cachings use MCM69P737 chips.
- A kind of 5. VxWorks system board based on MPC7410 processors according to claim 1, it is characterised in that：It is described Bridge connects the serial port module, institute using Tsi107 chips with Memory Controller module as master control, the Tsi107 chips State serial port module and input and output Debugging message is used for using NSC16C552 chips, the Tsi107 chips are connected to the network interface Module, the network interface module are used for network interface download system mirror image using GD82559ER chips, and the Tsi107 chips are connected with The SDRAM memory of 128MB, the SDRAM memory uses 5 K4561632A chips, wherein 4 are used as random access memory, 1 is used for data check, and institute's Tsi107 chips are connected with FLASH memory in storage program area bootstrap, system Core and user application, the FLASH memory use AM29LV800BT chips, and the Tsi107 chips are connected with PCI sheets Ground bus slot, the PCI local have 32 bit address, and traversal queries equipment on PCI local, is believed according to IDSEL Number selection, wherein the idsel signal of the network interface module meets AD12, the idsel signal of PCI slot meets AD13.
- A kind of 6. VxWorks system board based on MPC7410 processors according to claim 5, it is characterised in that：It is described 4 SDRAM in SDRAM memory are as 64 data 128MB memory headrooms of an entirety, and chip selection signal is all CS0, address Line is Tsi107 chip handbook connections, and 16 position datawires of every SDRAM and the internal storage data bus of the Tsi107 chips are high Low Opposite direction connection.
- A kind of 7. VxWorks system board based on MPC7410 processors according to claim 5, it is characterised in that：It is described FLASH memory data cable is connected in the Tsi107 internal storage datas bus, and 8 position datawires are interior with the Tsi107 chips Deposit data bus height Opposite direction connection.
- A kind of 8. software design approach of the VxWorks system board based on MPC7410 processors, it is characterised in that：Including BSP texts Part design method and software debugging method.
- 9. a kind of software design approach of VxWorks system board based on MPC7410 processors according to claim 8, It is characterized in that：The BSP document designs method includes step：Memory headroom distribution, configuration BSP header files, selection can download The image file type of type, initial configuration file, establish BSP engineerings, setting, serial ports driver and the network interface of guiding row drive Dynamic program.
- 10. a kind of software design approach of VxWorks system board based on MPC7410 processors according to claim 8, It is characterized in that：The software debugging method includes step：Hardware power up test, debugging enironment foundation, Codewarrior8.8 software design patterns, adjustment method, debugging driving equipment points for attention, serial port drive debugging, network port driving tune Examination.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201711202535.7A CN107967236A (en) | 2017-11-27 | 2017-11-27 | A kind of VxWorks system board and its software design approach based on MPC7410 processors |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201711202535.7A CN107967236A (en) | 2017-11-27 | 2017-11-27 | A kind of VxWorks system board and its software design approach based on MPC7410 processors |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN107967236A true CN107967236A (en) | 2018-04-27 |
Family
ID=61998845
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201711202535.7A Pending CN107967236A (en) | 2017-11-27 | 2017-11-27 | A kind of VxWorks system board and its software design approach based on MPC7410 processors |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN107967236A (en) |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN108762948A (en) * | 2018-05-18 | 2018-11-06 | 上海泰砚通信技术有限公司 | A kind of the hot key interactive system and method for VxWorks system |
| CN109597651A (en) * | 2018-10-12 | 2019-04-09 | 国营芜湖机械厂 | A kind of serial ports and network interface module development approach based on MPC7410 processor |
Citations (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US6785840B1 (en) * | 1999-08-31 | 2004-08-31 | Nortel Networks Limited | Call processor system and methods |
| CN201266388Y (en) * | 2008-09-28 | 2009-07-01 | 长沙湘计海盾科技有限公司 | High integration embedded graphics display drive device |
| CN203490476U (en) * | 2013-09-11 | 2014-03-19 | 陕西明泰电子科技发展有限公司 | PC104-plus controller system of Power PC |
| CN103955387A (en) * | 2014-04-25 | 2014-07-30 | 国家电网公司 | Design method for BSP in VxWorks system |
| CN205210883U (en) * | 2015-10-29 | 2016-05-04 | 上海飞斯信息科技有限公司 | Computer processing integrated circuit board |
| CN107390626A (en) * | 2017-08-28 | 2017-11-24 | 上海斐讯数据通信技术有限公司 | RPDU communication cards and distribution system based on Power PC Processor |
-
2017
- 2017-11-27 CN CN201711202535.7A patent/CN107967236A/en active Pending
Patent Citations (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US6785840B1 (en) * | 1999-08-31 | 2004-08-31 | Nortel Networks Limited | Call processor system and methods |
| CN201266388Y (en) * | 2008-09-28 | 2009-07-01 | 长沙湘计海盾科技有限公司 | High integration embedded graphics display drive device |
| CN203490476U (en) * | 2013-09-11 | 2014-03-19 | 陕西明泰电子科技发展有限公司 | PC104-plus controller system of Power PC |
| CN103955387A (en) * | 2014-04-25 | 2014-07-30 | 国家电网公司 | Design method for BSP in VxWorks system |
| CN205210883U (en) * | 2015-10-29 | 2016-05-04 | 上海飞斯信息科技有限公司 | Computer processing integrated circuit board |
| CN107390626A (en) * | 2017-08-28 | 2017-11-24 | 上海斐讯数据通信技术有限公司 | RPDU communication cards and distribution system based on Power PC Processor |
Non-Patent Citations (3)
| Title |
|---|
| 刘丽君等: ""PowerPC嵌入式系统中的以太网接口设计"", 《现代电子技术》 * |
| 刘丽君等: ""基于 PowerPC的嵌入式系统硬件设计"", 《现代电子技术》 * |
| 卢世哲: ""基于PowerPC平台的BSP的设计与实现"", 《中国优秀硕士学位论文全文数据库信息科技辑辑》 * |
Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN108762948A (en) * | 2018-05-18 | 2018-11-06 | 上海泰砚通信技术有限公司 | A kind of the hot key interactive system and method for VxWorks system |
| CN109597651A (en) * | 2018-10-12 | 2019-04-09 | 国营芜湖机械厂 | A kind of serial ports and network interface module development approach based on MPC7410 processor |
| CN109597651B (en) * | 2018-10-12 | 2022-04-12 | 国营芜湖机械厂 | Serial port and network port module development method based on MPC7410 processor |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| US6173419B1 (en) | Field programmable gate array (FPGA) emulator for debugging software | |
| US7970596B2 (en) | Method and system for virtual prototyping | |
| KR101035832B1 (en) | Simulation circuit of pci express endpoint and downstream port for a pci express switch | |
| US7072825B2 (en) | Hierarchical, network-based emulation system | |
| CN105279127B (en) | A kind of FPGA program downloading systems and method based on PCI or PCIe buses | |
| US20090007050A1 (en) | System for designing re-programmable digital hardware platforms | |
| US9158723B2 (en) | Expanded protocol adapter for in-vehicle networks | |
| US7970597B2 (en) | Event-driven emulation system | |
| CN100397286C (en) | System and method for dynamically controlling clock signal | |
| CN106293807A (en) | A kind of Flash chip based on DSP guides loading method | |
| CN102253845B (en) | Server system | |
| CN104216324A (en) | Synthetic aperture radar task management controller and related method thereof | |
| CN107967236A (en) | A kind of VxWorks system board and its software design approach based on MPC7410 processors | |
| CN109639547A (en) | A kind of portable multi-function gateway equipment for train | |
| US7337407B1 (en) | Automatic application programming interface (API) generation for functional blocks | |
| CN111427839B (en) | Remote online configuration and debugging method for Intel SoC FPGA | |
| CN113688592A (en) | SoC chip implementation system, method, medium and device based on driving middleware | |
| US20090182544A1 (en) | Multiple chassis emulation environment | |
| CN116112412A (en) | Virtual network card binding redundancy function test method, system, device and medium | |
| Caesar | Integrating pxi with vxi, gpib, usb, and lxi instrumentation | |
| CN102662811B (en) | Method for realizing online debugging on application codes of 51 soft core | |
| CN102446132B (en) | Method and device for performing board-level management by simulating local bus | |
| Tam et al. | Fast configuration of PCI express technology through partial reconfiguration | |
| Makarcheva | Implementation of a PLC Сode on Raspberry Pi in CODESYS Environment | |
| US20230289500A1 (en) | Method and system for building hardware images from heterogeneous designs for eletronic systems |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| PB01 | Publication | ||
| PB01 | Publication | ||
| SE01 | Entry into force of request for substantive examination | ||
| SE01 | Entry into force of request for substantive examination | ||
| RJ01 | Rejection of invention patent application after publication | ||
| RJ01 | Rejection of invention patent application after publication |
Application publication date: 20180427 |