CN103124172A - Voltage level shift circuit - Google Patents
Voltage level shift circuit Download PDFInfo
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- CN103124172A CN103124172A CN2011103717741A CN201110371774A CN103124172A CN 103124172 A CN103124172 A CN 103124172A CN 2011103717741 A CN2011103717741 A CN 2011103717741A CN 201110371774 A CN201110371774 A CN 201110371774A CN 103124172 A CN103124172 A CN 103124172A
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Abstract
The invention discloses a voltage level shift circuit which comprises an output stage, an input state and a clamping module. The output stage is used generating an output signal and comprises a first power transistor and a second power transistor, wherein the first power transistor is coupled to a high-output-level voltage source, and the second power transistor is coupled to a low-output-level voltage source. The input stage selectively generates an output signal through the first power transistor or the second power transistor according to an input signal. A first clamping unit in the clamping module is used for clamping operation voltage of a grid electrode of the first power transistor between a high output level and first clamping voltage.
Description
Technical field
The present invention relates to a kind of circuit structure, and be particularly related to a kind of voltage level shift circuit.
Background technology
Along with the development of present electronic technology, digitized electronic signal has become the main flow that present signal is processed.Under digitized framework, electronic signal often utilizes different parameters of electric power (as voltage level, size of current) to represent different logic value, as logical one (logic 1) or logical zero (logic 0).
In actual large scale circuit framework, the various digital electronic components of corresponding different purposes may there are differences for the definition mode of logical value.For instance, suppose in the microcontroller circuit of interior kernel operation, operating voltage range may be between 0 volt to 1.5 volts, when the voltage level of signal greater than just counterlogic value 1 of 1.3V; And in the power supply digital circuit of large voltage, operating voltage range may be between-10 volts to+20 volts, and the voltage level of signal must be greater than+15V, and signal is just understood counterlogic value 1.
So, identical voltage signal is different in the definition meeting of different digital circuit.For instance, voltage level is the input signal of 1.5V, and counterlogic value 1 in microcontroller circuit is in power supply digital circuit counterlogic value 0.If input signal through conversion, just when directly being passed to the second digital circuit by the first digital circuit, the definition difference between two digital circuits can cause the erroneous judgement of signal, and then does not make the operation of integrated circuit go wrong.
Therefore, between the digital circuit with different operating voltage specification, electronic signal can't share and directly transmit, and need by suitable conversion, just can guarantee digital circuit normal running separately.
Voltage level shift circuit (voltage level shifter circuit) often is used between two digital circuits, be used for the scope of the voltage level of an input signal is adjusted, and then produce the output signal of the scope with another voltage level.Take low voltage difference input (0V～+ 5V) to High Pressure Difference output (20V～+ 40V) voltage level shift circuit is as example, known its output stage of conventional voltage level shift circuit need adopt the power transistor that can tolerate large operating voltage poor (as-20V to the voltage difference that can tolerate between+40V more than 60 volts), as the switch element of its output stage of voltage level shift circuit.Yet, can tolerate the poor power transistor of large operating voltage different from general microelectronic circuit on technique, need extra process costs, and the area that takies is larger on circuit board, make the area service efficiency descend.
Summary of the invention
For addressing the above problem, this disclosure of documents proposes a kind of voltage level shift circuit, voltage level shift circuit (voltage level shifter circuit) can be used between two digital circuits, be used for the scope of the voltage level of signal is adjusted, in addition, its output stage of voltage level shift circuit in the present invention has two groups of power transistors, and two groups of power transistors are respectively in order to produce the output signal of high output level and low output level.By this, one of them power transistor can be operated in the voltage range less with of high output level vicinity, and another group power transistor can be operated in another voltage range contiguous with low output level.Thus, two power transistors of output stage need not adopt the poor circuit element of the larger operating voltage of tolerance, can save circuit space and manufacturing cost.
The one side of this disclosure is that a kind of voltage level shift circuit is being provided, it is in order to produce output signal according to input signal, input signal and output signal have different voltage level, and voltage level shift circuit comprises output stage, input stage and clamp module.Output stage is in order to produce output signal, and output stage comprises one first power transistor and one second power transistor, and wherein the first power transistor is coupled to the voltage source of a high output level, and the second power transistor is coupled to the voltage source of a low output level.Input stage optionally produces output signal by the first power transistor or the second power transistor according to input signal.The clamp module comprises one first clamp units, and the first clamp units is coupled to a grid of the first power transistor, and the first clamp units is clamped on an operating voltage of grid between high output level and one first clamping voltage.
According to one embodiment of the invention, have an output voltage between the high output level of output signal and low output level poor, a high incoming level of input signal and a low incoming level input voltage therebetween are poor poor less than output voltage.
According to one embodiment of the invention, it is poor that the first power transistor has an element tolerance pressure, and formed the first clamping voltage of the first clamp units subtracts element tolerance pressure reduction more than or equal to high output level.
According to one embodiment of the invention, wherein the first clamp units comprises a boost transistor, boost transistor has a first end, one second end and a grid, the first end of boost transistor is coupled to the grid of the first power transistor, the second end of boost transistor is coupled to input stage, and the grid of boost transistor is coupled to a booster tension.
According to one embodiment of the invention, when input signal is high level, wherein input stage is coupled to a system voltage source with the second end of boost transistor, the first clamp units produces the grid of the first clamping voltage to the first power transistor according to booster tension, make the first power transistor conducting produce the output signal of high output level.
According to one embodiment of the invention, when input signal was low level, wherein input stage made the second end suspension joint of boost transistor, and the first power transistor is turn-offed.
According to one embodiment of the invention, wherein the clamp module also comprises one second clamp units, the second clamp units is coupled to a grid of the second power transistor, and the second clamp units is clamped on an operating voltage of second its grid of power transistor between low output level and one second clamping voltage.
According to one embodiment of the invention, wherein the second clamp units comprises a step-down transistor, the step-down transistor has a first end, one second end and a grid, the transistorized first end of step-down is coupled to the grid of the second power transistor, transistorized the second end of step-down is coupled to input stage, and the transistorized grid of step-down is coupled to a decline voltage.
According to one embodiment of the invention, when input signal is low level, wherein input stage is coupled to a system voltage source with transistorized the second end of step-down, the second clamp units produces the grid of the second clamping voltage to the second power transistor according to drop-out voltage, make the second power transistor conducting produce the output signal of low output level.
According to one embodiment of the invention, when input signal was high level, wherein input stage made transistorized the second end suspension joint of step-down, and the second power transistor is turn-offed.
Description of drawings
For above and other purpose of the present invention, feature, advantage and embodiment can be become apparent, the description of the drawings is as follows:
Fig. 1 illustrates the functional block diagram according to a kind of voltage level shift circuit in one embodiment of the invention; And
Fig. 2 illustrates in Fig. 1 wherein a kind of circuit embodiments schematic diagram of voltage level shift circuit.
[main element symbol description]
100: voltage level shift circuit
120: input stage
122,124: switching transistor
140: the clamp module
142: the first clamp units
142a: boost transistor
144: the second clamp units
144a: step-down transistor
142b, 144b: driving transistors
160: output stage
162: the first power transistors
164: the second power transistors
Embodiment
For the narration that makes this disclosure more detailed and complete, can be with reference to appended accompanying drawing and the various embodiment of the following stated, graphic in identical number represent same or analogous element.But the embodiment that provides limits the scope that the present invention is contained, and the description of circuit structure running is non-in order to limit the order of its execution, any structure that is reconfigured by element, the device with impartial effect that produces is all the scope that the present invention is contained.On the other hand, well-known element and step are not described in embodiment, to avoid that the present invention is caused unnecessary restriction.
See also Fig. 1, it illustrates the functional block diagram according to a kind of voltage level shift circuit 100 in one embodiment of the invention, in this embodiment, voltage level shift circuit 100 is in order to adjusting according to the voltage level of input signal IN, and then produces output signal OUT.By the adjustment of voltage level shift circuit 100, make output signal OUT have the voltage level different with input signal IN.
Voltage level shift circuit 100 comprises input stage 120, clamp module 140 and output stage 160.Output stage 160 is in order to produce output signal OUT, and output stage OUT comprises the first power transistor 162 and the second power transistor 164, and wherein the first power transistor 162 couples paramount output level V
HVoltage source, the second power transistor 164 is coupled to low output level V
LVoltage source.
In this embodiment, the input voltage interval of input signal IN is between high incoming level V
hWith a low incoming level V
1On the other hand, the output voltage interval of output signal OUT is between high output level V
HWith this low output level V
LIn this embodiment, by the adjusting of voltage level shift circuit 100, can make the output voltage of output signal OUT of its generation poor (between high output level V
HWith low output level V
L) poor (between high incoming level V greater than the input voltage of input signal IN
hWith low incoming level V
1).That is to say, the input signal IN that voltage level shift circuit 100 can be less with pressure reduction maps to the larger output signal OUT of pressure reduction.
Lift a practical operation example, the input voltage of input signal IN is poor is 0V to+5V, and voltage level shift circuit 100 is in order to produce output signal OUT, the high output level V of output signal according to 0V to the input signal IN between+5V
HFor+40V hangs down output level V
LBeing-20V, output voltage is poor is-20V is to+40V.Thus, voltage level shift circuit 100 and be the input signal IN of 5V with the input voltage difference, displacement is modulated to the output signal OUT that the output voltage difference is 60V.
In this practical operation example, input stage 120 is selected according to input signal IN, makes the first power transistor 162 or second power transistor 164 one of them generation output signal OUT.For example, when input signal IN is 5V, the first power transistor 162 generation+40V (high output level V
H) output signal OUT; When input signal IN is 0V, the second power transistor 164 generation-20V (low output level V
L) output signal OUT.
Must can tolerate the circuit element of 60V output pressure reduction in the output stage setting in known technology, the voltage level shift circuit 100 in the application has two groups of power transistors 162,164 respectively in order to produce the output signal OUT of high and low output level.By this, one of them power transistor can be operated in and+40V (high output level V
H) a contiguous less voltage range, and another group power transistor can be operated in and-20V (low output level V
L) another contiguous voltage range.Thus, two power transistors of output stage need not adopt the poor circuit element of the larger operating voltage of tolerance, can save circuit space and manufacturing cost.
In order to achieve the above object, the operating voltage V1 of the grid of the first power transistor 162 need operate in high output level V
HNear, and the operating voltage V2 of the grid of the second power transistor 162 need operate in low output level V
LNear.Therefore, voltage level shift circuit 100 is provided with clamp module 140 between input stage 120 and output stage 160, is used for operating voltage V1 and operating voltage V2 are carried out voltage clamp (voltage clamping).Clamp module 140 comprises the first clamp units 142 and the second clamp units 144.
The first clamp units 142 is coupled to the grid of the first power transistor 162, and the first clamp units 142 is clamped on high output level V with the operating voltage V1 of first power transistor 162 its grids
HAnd between the first clamping voltage.
The second clamp units 144 is coupled to the grid of the second power transistor 164, and the second clamp units 144 is clamped on low output level V with the operating voltage V2 of second power transistor 164 its grids
LAnd between the second clamping voltage.
Below utilize a circuit embodiments to illustrate wherein a kind of execution mode of the present invention, see also Fig. 2, it illustrates in Fig. 1 wherein a kind of circuit embodiments schematic diagram of voltage level shift circuit 100.
As shown in Figure 2, input stage 120 comprises switching transistor 122 and switching transistor 124.Wherein, switching transistor 122 and switching transistor 124 alternatively's conductings.
As shown in Figure 2, in one embodiment, the first power transistor 162 of voltage level shift circuit 100 its output stages 160 has element tolerance pressure reduction, and the first formed the first clamping voltage of clamp units 142 is more than or equal to high output level V
HDeduct element tolerance pressure reduction.For instance, be 5V if the first power transistor 162 is selected the element tolerance pressure reduction that can bear, as high output level V
HBe+40V, the first formed the first clamping voltage of clamp units 142 is more than or equal to+35V.By this, the operating voltage V1 that makes first power transistor 162 its grids at least greater than the first clamping voltage (in this example for+35V).
The first clamp units 142 comprises boost transistor 142a and driving transistors 142b.The first end of boost transistor 142a is coupled to the grid of the first power transistor 162.The second end of boost transistor 142a is coupled to the switching transistor 122 of input stage 120, the grid of boost transistor 142a be coupled to booster tension Vmp (can be approximately in this example+35V).
When input signal IN was high level (H), wherein switching transistor 122 conductings in input stage 120 were coupled to the second end of boost transistor 142a the system voltage source (as Vss end or GND end) of low pressure.At this moment, the minimum value of the voltage level of the first end of boost transistor 142a (being operating voltage V1) is the threshold voltage vt hp that booster tension Vmp adds boost transistor 142a, and in general threshold voltage vt hp is about+0.6V.Namely the pass of operating voltage V1 is at this moment:
V1＞Vmp+Vthp＝Vmp+0.6V
That is to say, the voltage level of the first end of boost transistor 142a (being operating voltage V1) is clamped at least greater than booster tension Vmp, for instance, booster tension Vmp can select+34.4V, by this, just can form so-called the first clamping voltage of the application (in this example for+35V).At this moment, the operating voltage V1 of the first power transistor 162 equals the first clamping voltage and is+35V.
Therefore, when input signal IN is high level (H), wherein the first clamp units according to this booster tension generation first clamping voltage (in this example is+35V) to the grid of the first power transistor 162, make the first power transistor 162 conductings produce high output level V
HOutput signal OUT.
Relatively, when input signal IN is low level (L), wherein in input stage 120, switching transistor 122 turn-offs, make the second end suspension joint (floating) of boost transistor 142a, at this moment, driving transistors 142b in the first clamp units 142 can supply+grid of operating voltage V1 to the first power transistor 162 of 40V, and the first power transistor 162 is turn-offed.
Thus, the operating voltage V1 of the first power transistor 162 just can operate to the operating voltage interval of+40V at+35V, and it is the negative sense logical triggering transistor of 5V that the first power transistor 162 can adopt element tolerance pressure reduction.
What should be specified is, (the V for example of above-mentioned voltage value in the application
H:+40V, Vmp:+34.4Vor+35V, the first clamping voltage :+35V etc.) be only illustrative, not in order to limit the application's technical scope.High output level V
HThe output voltage demand of neglecting greatly actual voltage level shift circuit 100 and decide, the element of neglecting greatly the first power transistor 162 of booster tension Vmp and the first clamping voltage tolerates pressure reduction and decides, and its spirit is that the first formed the first clamping voltage of clamp units 142 must be more than or equal to high output level V
HDeduct the element tolerance pressure reduction of the first power transistor 162.
Above-mentioned paragraph has illustrated the first power transistor 162 high output level V of output
HMechanism, and the mode of the first clamping voltage that the first clamp units 142 produces is described, the operating voltage that is used for limiting the first power transistor 162 is interval.The following passage is used for illustrating, the second relative power transistor 164 low output level V of output
LMechanism have corresponding relation with foregoing, therefore its detailed content is similar to above-mentioned paragraph, repeats part to repeat no more, can be with reference to the explanation of above-mentioned paragraph.
The second clamp units 144 is coupled to the grid of the second power transistor 164, and the second clamp units 144 is clamped on low output level V with the operating voltage V2 of second power transistor 164 its grids
LAnd between the second clamping voltage.
In the embodiment of Fig. 2, it is poor that the second power transistor 164 also has an element tolerance pressure, and the second formed the second clamping voltage of clamp units 144 is more than or equal to low output level V
LAdd element tolerance pressure reduction.For instance, be 5V if the second power transistor 164 is selected the element tolerance pressure reduction that can bear, as low output level V
LFor-20V, the second formed the second clamping voltage of clamp units 144 is for being less than or equal to-15V.By this, the operating voltage V2 that makes second power transistor 164 its grids at least less than the second clamping voltage (in this example for-15V).
As Fig. 2, wherein the second clamp units 144 comprises step-down transistor 144a and driving transistors 144b, the first end of step-down transistor 144a is coupled to the grid of the second power transistor 164, the second end of step-down transistor 144a is coupled to the switching transistor 124 of input stage 120, the grid of step-down transistor 144a be coupled to drop-out voltage Vmn (can be approximately in this example-15V).
When input signal IN was low level (L), wherein switching transistor 124 conductings of input stage 120 were coupled to the system voltage source of e high pressure (as Vdd end or V with the second end of step-down transistor 144a
HEnd).
At this moment, the minimum value of the voltage level of the first end of step-down transistor 144a (being operating voltage V2) is the threshold voltage vt hn that drop-out voltage Vmn adds step-down transistor 144a, and in general threshold voltage vt hn is about 0.6V.Namely the pass of operating voltage V2 is at this moment:
V2＜Vmn-Vthn＝Vmn-0.6V
That is to say, the maximum of the voltage level of the first end of step-down transistor 144a (being operating voltage V2) by clamp to lower than drop-out voltage Vmn, for instance, drop-out voltage Vmn can select-14.4V, by this, just can form so-called the second clamping voltage of the application (in this example for-15V).At this moment, the operating voltage V2 of the second power transistor 164 equals the second clamping voltage and is-15V.
The second clamp units 144a produces the grid of the second clamping voltage to the second power transistor 164 according to drop-out voltage Vmn, the operating voltage V2 as the grid of the second power transistor 164 makes the second power transistor 164 conductings produce low output level V
LOutput signal OUT.
Relatively, when input signal IN is high level (H), wherein in input stage 120, switching transistor 124 turn-offs, make the second end suspension joint of step-down transistor 144a, at this moment, driving transistors 144b in the second clamp units 144 can supply-grid of operating voltage V2 to the second power transistor 164 of 20V, and the second power transistor 164 is turn-offed.
Thus, the operating voltage V2 of the second power transistor 164 just can operate to the operating voltage interval of-20V at-15V, and it is the forward logical triggering transistor of 5V that the second power transistor 164 can adopt element tolerance pressure reduction.
What should be specified is, (the V for example of above-mentioned voltage value in the application
L:-20V, Vmn:-14.4Vor-15V, the second clamping voltage :-15V etc.) be only illustrative, not in order to limit the application's technical scope, when depending on side circuit use.
What need to replenish is, in the above-described embodiments, setting by clamp module 140 in the present invention, make poor being clamped at below 5 volts of operating voltage between the first power transistor 162 and second power transistor 164 its grids and end points, therefore, the first power transistor 162 and the second power transistor 164 element that only must select element tolerance pressure reduction to reach 5 volts gets final product.In addition, in the above-described embodiments, switching transistor 122, switching transistor 124, boost transistor 142a and step-down transistor 144a etc., the element that also only must select element tolerance pressure reduction to reach 5 volts gets final product.Therefore, voltage level shift circuit of the present invention only need utilize the combination of the element of low element tolerance pressure reduction, just can correspondingly produce relatively large voltage difference output signal (as-20V to+40V).
In sum, voltage level shift circuit of the present invention can be used between two digital circuits, be used for the voltage level between input signal and output signal is adjusted, in addition, its output stage of voltage level shift circuit in the present invention has two groups of power transistors, and two groups of power transistors are respectively in order to produce the output signal of high output level and low output level.By this, one of them power transistor can be operated in the voltage range less with of high output level vicinity, and another group power transistor can be operated in another voltage range contiguous with low output level.Thus, two power transistors of output stage need not adopt the poor circuit element of the larger operating voltage of tolerance, can save circuit space and manufacturing cost.
Although the present invention discloses as above with execution mode; so it is not to limit the present invention, those skilled in the art, without departing from the spirit and scope of the present invention; when can be used for a variety of modifications and variations, so protection scope of the present invention is as the criterion when looking the appended claims person of defining.
Claims (10)
1. voltage level shift circuit, in order to produce an output signal according to an input signal, this input signal and this output signal have different voltage level, and this voltage level shift circuit comprises:
One output stage, in order to produce this output signal, this output stage comprises one first power transistor and one second power transistor, and wherein this first power transistor is coupled to the voltage source of a high output level, and this second power transistor is coupled to the voltage source of a low output level;
One input stage optionally produces this output signal by this first power transistor or this second power transistor according to this input signal; And
One clamp module, this clamp module comprises one first clamp units, and this first clamp units is coupled to one of this first power transistor grid, and this first clamp units is clamped on one of this grid operating voltage between this high output level and one first clamping voltage.
2. voltage level shift circuit as claimed in claim 1, wherein have an output voltage between this high output level of this output signal and this low output level poor, a high incoming level of this input signal and a low incoming level input voltage therebetween are poor poor less than this output voltage.
3. voltage level shift circuit as claimed in claim 1, it is poor that wherein this first power transistor has an element tolerance pressure, and formed this first clamping voltage of this first clamp units subtracts this element tolerance pressure reduction more than or equal to this high output level.
4. voltage level shift circuit as claimed in claim 1, wherein this first clamp units comprises a boost transistor, this boost transistor has a first end, one second end and a grid, this first end of this boost transistor is coupled to this grid of this first power transistor, this of this boost transistor the second end is coupled to this input stage, and this grid of this boost transistor is coupled to a booster tension.
5. voltage level shift circuit as claimed in claim 4, when this input signal is high level, wherein this input stage is coupled to a system voltage source with this second end of this boost transistor, this first clamp units produces this first clamping voltage to this grid of this first power transistor according to this booster tension, makes this first power transistor conducting produce this output signal of this high output level.
6. voltage level shift circuit as claimed in claim 4, when this input signal was low level, wherein this input stage made this second end suspension joint of this boost transistor, and this first power transistor is turn-offed.
7. voltage level shift circuit as claimed in claim 1, wherein this clamp module also comprises one second clamp units, this second clamp units is coupled to one of this second power transistor grid, and this second clamp units is clamped on one of this its grid of the second power transistor operating voltage between this low output level and one second clamping voltage.
8. voltage level shift circuit as claimed in claim 7, wherein this second clamp units comprises a step-down transistor, this step-down transistor has a first end, one second end and a grid, transistorized this first end of this step-down is coupled to this grid of this second power transistor, transistorized this second end of this step-down is coupled to this input stage, and transistorized this grid of this step-down is coupled to a decline voltage.
9. voltage level shift circuit as claimed in claim 8, when this input signal is low level, wherein this input stage is coupled to a system voltage source with transistorized this second end of this step-down, this second clamp units produces this second clamping voltage to this grid of this second power transistor according to this drop-out voltage, makes this second power transistor conducting produce this output signal of this low output level.
10. voltage level shift circuit as claimed in claim 8, when this input signal was high level, wherein this input stage made transistorized this second end suspension joint of this step-down, and this second power transistor is turn-offed.
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| Application Number | Priority Date | Filing Date | Title |
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| CN201110371774.1A CN103124172B (en) | 2011-11-21 | 2011-11-21 | Voltage level shift circuit |
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|---|---|---|---|
| CN201110371774.1A CN103124172B (en) | 2011-11-21 | 2011-11-21 | Voltage level shift circuit |
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| CN103124172A true CN103124172A (en) | 2013-05-29 |
| CN103124172B CN103124172B (en) | 2015-06-24 |
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Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
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| CN107317578A (en) * | 2016-04-26 | 2017-11-03 | 台湾类比科技股份有限公司 | Voltage quasi position shift circuit |
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| CN1734942A (en) * | 2004-08-09 | 2006-02-15 | 三星电子株式会社 | Level shifter with low-leakage current |
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| CN107317578A (en) * | 2016-04-26 | 2017-11-03 | 台湾类比科技股份有限公司 | Voltage quasi position shift circuit |
| CN107317578B (en) * | 2016-04-26 | 2020-06-02 | 台湾类比科技股份有限公司 | Voltage level shift circuit |
Also Published As
| Publication number | Publication date |
|---|---|
| CN103124172B (en) | 2015-06-24 |
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