CN103124172B - Voltage level shift circuit - Google Patents
Voltage level shift circuit Download PDFInfo
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- CN103124172B CN103124172B CN201110371774.1A CN201110371774A CN103124172B CN 103124172 B CN103124172 B CN 103124172B CN 201110371774 A CN201110371774 A CN 201110371774A CN 103124172 B CN103124172 B CN 103124172B
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Abstract
The invention discloses a voltage level shift circuit which comprises an output stage, an input state and a clamping module. The output stage is used generating an output signal and comprises a first power transistor and a second power transistor, wherein the first power transistor is coupled to a high-output-level voltage source, and the second power transistor is coupled to a low-output-level voltage source. The input stage selectively generates an output signal through the first power transistor or the second power transistor according to an input signal. A first clamping unit in the clamping module is used for clamping operation voltage of a grid electrode of the first power transistor between a high output level and first clamping voltage.
Description
Technical field
The present invention relates to a kind of circuit structure, and in particular to a kind of voltage level shift circuit.
Background technology
Along with the development of present electronic technology, digitized electronic signal has become the main flow of current signal transacting.Under digitized framework, electronic signal often utilizes different parameters of electric power (as voltage level, size of current) to represent different logic value, as logical one (logic 1) or logical zero (logic 0).
In actual large scale circuit framework, the various digital electronic components of corresponding different purposes may there are differences for the definition mode of logical value.For example, suppose in the microcontroller circuit of interior kernel operation, operating voltage range may between 0 volt to 1.5 volts, when the voltage level of signal is greater than 1.3V just counterlogic value 1; And in the power supply digital circuit of large voltage, operating voltage range may between-10 volts to+20 volts, the voltage level of signal must be greater than+15V, and signal just can counterlogic value 1.
So, identical voltage signal can be different in the definition of different digital circuit.For example, voltage level is the input signal of 1.5V, counterlogic value 1 in microcontroller circuit, in power supply digital circuit then counterlogic value 0.If input signal is without conversion, just direct when being passed to the second digital circuit by the first digital circuit, the definition difference between two digital circuits can cause the erroneous judgement of signal, and then the operation of integrated circuit is gone wrong.
Therefore, between the digital circuit with different operating voltage specification, electronic signal cannot share and directly transmit, and by suitable conversion, just need can guarantee respective digital circuit normal running.
Voltage level shift circuit (voltage level shifter circuit) is often used between two digital circuits, be used for adjusting the scope of the voltage level of an input signal, and then produce the output signal with the scope of another voltage level.Export the voltage level shift circuit of (-20V ~+40V) to High Pressure Difference for low voltage difference input (0V ~+5V), known its output stage of conventional voltage levels shift circuit need adopt the power transistor that can tolerate large operating voltage difference (as tolerated the voltage difference of more than 60 volts between-20V to+40V), as the switch element of its output stage of voltage level shift circuit.But the power transistor that can tolerate large operating voltage difference is different from general microelectronic circuit in technique, needs extra process costs, and the area taken on circuit boards is comparatively large, and area service efficiency is declined.
Summary of the invention
For solving the problem, this disclosure of documents proposes a kind of voltage level shift circuit, voltage level shift circuit (voltage level shifter circuit) can be used between two digital circuits, be used for adjusting the scope of the voltage level of signal, in addition, its output stage of voltage level shift circuit in the present invention has two groups of power transistors, and two groups of power transistors are respectively in order to produce the output signal of high output level and low output level.By this, one of them power transistor can be operated in the voltage range less with of high output level vicinity, and another group power transistor can be operated in another voltage range contiguous with low output level.Thus, two power transistors of output stage do not need the circuit element adopting the larger operating voltage difference of tolerance, can save circuit space and manufacturing cost.
The one side of this disclosure is providing a kind of voltage level shift circuit, it is in order to produce output signal according to input signal, input signal has different voltage level with output signal, and voltage level shift circuit comprises output stage, input stage and clamp module.Output stage is in order to produce output signal, and output stage comprises one first power transistor and one second power transistor, and wherein the first power transistor is coupled to the voltage source of a high output level, and the second power transistor is coupled to the voltage source of a low output level.Input stage optionally produces output signal by the first power transistor or the second power transistor according to input signal.Clamp module comprises one first clamp units, and the first clamp units is coupled to a grid of the first power transistor, and an operating voltage of grid is clamped between high output level and one first clamping voltage by the first clamp units.
According to one embodiment of the invention, have an output voltage poor between the high output level of output signal and low output level, a high incoming level of input signal and a low incoming level input voltage difference is therebetween less than output voltage difference.
According to one embodiment of the invention, it is poor that the first power transistor has an element tolerance pressure, and the first clamping voltage that the first clamp units is formed is more than or equal to high output level and subtracts element tolerance pressure reduction.
According to one embodiment of the invention, wherein the first clamp units comprises a boost transistor, boost transistor has a first end, one second end and a grid, the first end of boost transistor is coupled to the grid of the first power transistor, second end of boost transistor is coupled to input stage, and the grid of boost transistor is coupled to a booster tension.
According to one embodiment of the invention, when input signal is high level, wherein the second end of boost transistor is coupled to a system voltage source by input stage, first clamp units produces the grid of the first clamping voltage to the first power transistor according to booster tension, makes the first power transistor conducting produce the output signal of high output level.
According to one embodiment of the invention, when input signal is low level, wherein input stage makes the second end suspension joint of boost transistor, and the first power transistor is turned off.
According to one embodiment of the invention, wherein clamp module also comprises one second clamp units, second clamp units is coupled to a grid of the second power transistor, and an operating voltage of second its grid of power transistor is clamped between low output level and one second clamping voltage by the second clamp units.
According to one embodiment of the invention, wherein the second clamp units comprises a step-down transistor, step-down transistor has a first end, one second end and a grid, the first end of step-down transistor is coupled to the grid of the second power transistor, second end of step-down transistor is coupled to input stage, and the grid of step-down transistor is coupled to a drop-out voltage.
According to one embodiment of the invention, when input signal is low level, wherein the second end of step-down transistor is coupled to a system voltage source by input stage, second clamp units produces the grid of the second clamping voltage to the second power transistor according to drop-out voltage, makes the second power transistor conducting produce the output signal of low output level.
According to one embodiment of the invention, when input signal is high level, wherein input stage makes the second end suspension joint of step-down transistor, and the second power transistor is turned off.
Accompanying drawing explanation
For above and other object of the present invention, feature, advantage and embodiment can be become apparent, the description of the drawings is as follows:
Fig. 1 illustrates the functional block diagram according to voltage level shift circuit a kind of in one embodiment of the invention; And
Fig. 2 illustrates voltage level shift circuit wherein a kind of circuit embodiments schematic diagram in Fig. 1.
[main element symbol description]
100: voltage level shift circuit
120: input stage
122,124: switching transistor
140: clamp module
142: the first clamp units
142a: boost transistor
144: the second clamp units
144a: step-down transistor
142b, 144b: driving transistors
160: output stage
162: the first power transistors
164: the second power transistors
Embodiment
In order to make describing of this disclosure more detailed and complete, can refer to appended accompanying drawing and the various embodiment of the following stated, number identical in graphic represents same or analogous element.But the embodiment provided also is not used to limit the scope that contains of the present invention, and the description of circuit structure running is not used to limit its order performed, any structure reconfigured by element, produce the device with impartial effect, be all the scope that the present invention is contained.On the other hand, well-known element and step are not described in embodiment, to avoid causing unnecessary restriction to the present invention.
Refer to Fig. 1, it illustrates the functional block diagram according to voltage level shift circuit 100 a kind of in one embodiment of the invention, in this embodiment, voltage level shift circuit 100 in order to adjust according to the voltage level of input signal IN, and then produces output signal OUT.By the adjustment of voltage level shift circuit 100, output signal OUT is made to have the voltage level different with input signal IN.
Voltage level shift circuit 100 comprises input stage 120, clamp module 140 and output stage 160.Output stage 160 comprises the first power transistor 162 and the second power transistor 164 in order to produce output signal OUT, output stage OUT, and wherein the first power transistor 162 couples paramount output level V
hvoltage source, the second power transistor 164 is coupled to low output level V
lvoltage source.
Input stage 120 optionally produces high output level V by the first power transistor 162 according to input signal IN
houtput signal OUT, also or by the second power transistor 164 produce low output level V
loutput signal OUT.
In this embodiment, the input voltage of input signal IN is interval between high incoming level V
hwith a low incoming level V
1; On the other hand, the output voltage interval of OUT is outputed signal then between high output level V
hwith this low output level V
l.In this embodiment, by the adjustment of voltage level shift circuit 100, the output voltage difference of its output signal OUT produced can be made (between high output level V
hwith low output level V
l) be greater than the input voltage difference of input signal IN (between high incoming level V
hwith low incoming level V
1).That is, input signal IN less for pressure reduction can be mapped to the larger output signal OUT of pressure reduction by voltage level shift circuit 100.
Lift a practical operation example, the input voltage difference of input signal IN is 0V to+5V, and voltage level shift circuit 100 is in order to produce output signal OUT, the high output level V of output signal according to the input signal IN between 0V to+5V
hfor+40V and low output level V
lfor-20V, output voltage difference is-20V to+40V.Thus, voltage level shift circuit 100 be the input signal IN of 5V by input voltage difference, displacement is modulated to the output signal OUT that output voltage difference is 60V.
In this practical operation example, input stage 120 is selected according to input signal IN, makes the first power transistor 162 or one of them generation output signal of the second power transistor 164 OUT.Such as, when input signal IN is 5V, the first power transistor 162 produces+40V (high output level V
h) output signal OUT; When input signal IN is 0V, the second power transistor 164 produces-20V (low output level V
l) output signal OUT.
Must arrange in output stage in known technology and can tolerate the circuit element that 60V exports pressure reduction, the voltage level shift circuit 100 in the application has two groups of power transistors 162,164 respectively in order to produce the output signal OUT of high and low output level.By this, one of them power transistor can be operated in and+40V (high output level V
h) a contiguous less voltage range, and another group power transistor can be operated in and-20V (low output level V
l) contiguous another voltage range.Thus, two power transistors of output stage do not need the circuit element adopting the larger operating voltage difference of tolerance, can save circuit space and manufacturing cost.
In order to achieve the above object, the operating voltage V1 of the grid of the first power transistor 162 need operate in high output level V
hnear, and the operating voltage V2 of the grid of the second power transistor 162 need operate in low output level V
lnear.Therefore, voltage level shift circuit 100 is provided with clamp module 140 between input stage 120 and output stage 160, is used for carrying out voltage clamp (voltage clamping) to operating voltage V1 and operating voltage V2.Clamp module 140 comprises the first clamp units 142 and the second clamp units 144.
First clamp units 142 is coupled to the grid of the first power transistor 162, and the operating voltage V1 of first its grid of power transistor 162 is clamped on high output level V by the first clamp units 142
hand between the first clamping voltage.
Second clamp units 144 is coupled to the grid of the second power transistor 164, and the operating voltage V2 of second its grid of power transistor 164 is clamped on low output level V by the second clamp units 144
land between the second clamping voltage.
Below utilize a circuit embodiments to illustrate the present invention's wherein a kind of execution mode, refer to Fig. 2, it illustrates voltage level shift circuit 100 wherein a kind of circuit embodiments schematic diagram in Fig. 1.
As shown in Figure 2, input stage 120 comprises switching transistor 122 and switching transistor 124.Wherein, switching transistor 122 and switching transistor 124 alternatively conducting.
As shown in Figure 2, in one embodiment, the first power transistor 162 of its output stage 160 of voltage level shift circuit 100 has element tolerance pressure reduction, and the first clamping voltage that the first clamp units 142 is formed is more than or equal to high output level V
hdeduct element tolerance pressure reduction.For example, if the first power transistor 162 selects the element tolerance pressure reduction that can bear to be 5V, as high output level V
hfor+40V, the first clamping voltage that the first clamp units 142 is formed is for being more than or equal to+35V.By this, the operating voltage V1 of first its grid of power transistor 162 is made at least to be greater than the first clamping voltage (being+35V in this instance).
First clamp units 142 comprises boost transistor 142a and driving transistors 142b.The first end of boost transistor 142a is coupled to the grid of the first power transistor 162.Second end of boost transistor 142a is coupled to the switching transistor 122 of input stage 120, and the grid of boost transistor 142a is coupled to booster tension Vmp (can be approximately+35V in this instance).
When input signal IN is high level (H), switching transistor 122 conducting wherein in input stage 120, is coupled to the system voltage source (as Vss end or GND end) of low pressure by second end of boost transistor 142a.Now, the minimum value of the voltage level (i.e. operating voltage V1) of the first end of boost transistor 142a is the threshold voltage vt hp that booster tension Vmp adds boost transistor 142a, and in general threshold voltage vt hp is about+0.6V.Namely now the pass of operating voltage V1 is:
V1＞Vmp+Vthp＝Vmp+0.6V
That is, the voltage level (i.e. operating voltage V1) of the first end of boost transistor 142a is clamped on and is at least greater than booster tension Vmp, for example, booster tension Vmp can select+34.4V, by this, so-called first clamping voltage of the application (being+35V in this instance) can just be formed.Now, the operating voltage V1 of the first power transistor 162 equals the first clamping voltage is+35V.
Therefore, when input signal IN is high level (H), wherein the first clamp units produces the first clamping voltage (being+35V in this instance) to the grid of the first power transistor 162 according to this booster tension, makes the first power transistor 162 conducting produce high output level V
houtput signal OUT.
Relatively, when input signal IN is low level (L), wherein in input stage 120, switching transistor 122 turns off, make the second end suspension joint (floating) of boost transistor 142a, now, driving transistors 142b in first clamp units 142 can supply the grid of operating voltage V1 to the first power transistor 162 of+40V, and the first power transistor 162 is turned off.
Thus, the operating voltage V1 of the first power transistor 162 just can operate under the operating voltage interval of+35V to+40V, the first power transistor 162 element can be adopted to tolerate negative sense logical triggering transistor that pressure reduction is 5V.
Should be specified, the citing (V of above-mentioned voltage value in the application
h:+40V, Vmp:+34.4Vor+35V, the first clamping voltage :+35V etc.) be only illustrative, not in order to the technical scope of limit the application.High output level V
hthe output voltage demand of neglecting greatly actual voltage level shift circuit 100 and determine, the element neglecting greatly the first power transistor 162 of booster tension Vmp and the first clamping voltage tolerates pressure reduction and determines, and its spirit is that the first clamping voltage that the first clamp units 142 is formed must be more than or equal to high output level V
hdeduct the element tolerance pressure reduction of the first power transistor 162.
Above-mentioned paragraph has described the first power transistor 162 and has exported high output level V
hmechanism, and the mode of the first clamping voltage that the first clamp units 142 produces is described, it is interval to be used for the operating voltage of restriction first power transistor 162.The following passage is then used for illustrating, the second relative power transistor 164 exports low output level V
lmechanism with foregoing, there is corresponding relation, its detailed content is similar to above-mentioned paragraph, therefore repeat part repeat no more, can with reference to the explanation of above-mentioned paragraph.
Second clamp units 144 is coupled to the grid of the second power transistor 164, and the operating voltage V2 of second its grid of power transistor 164 is clamped on low output level V by the second clamp units 144
land between the second clamping voltage.
In the embodiment of fig. 2, it is poor that the second power transistor 164 also has an element tolerance pressure, and the second clamping voltage that the second clamp units 144 is formed is more than or equal to low output level V
ladd element tolerance pressure reduction.For example, if the second power transistor 164 selects the element tolerance pressure reduction that can bear to be 5V, as low output level V
lfor-20V, the second clamping voltage that the second clamp units 144 is formed is for being less than or equal to-15V.By this, the operating voltage V2 of second its grid of power transistor 164 is made at least to be less than the second clamping voltage (being-15V in this instance).
As Fig. 2, wherein the second clamp units 144 comprises step-down transistor 144a and driving transistors 144b, the first end of step-down transistor 144a is coupled to the grid of the second power transistor 164, second end of step-down transistor 144a is coupled to the switching transistor 124 of input stage 120, and the grid of step-down transistor 144a is coupled to drop-out voltage Vmn (can be approximately-15V in this instance).
When input signal IN is low level (L), wherein switching transistor 124 conducting of input stage 120, is coupled to the system voltage source of e high pressure (as Vdd end or V by second end of step-down transistor 144a
hend).
Now, the minimum value of the voltage level (i.e. operating voltage V2) of the first end of step-down transistor 144a is the threshold voltage vt hn that drop-out voltage Vmn adds step-down transistor 144a, and in general threshold voltage vt hn is about 0.6V.Namely now the pass of operating voltage V2 is:
V2＜Vmn-Vthn＝Vmn-0.6V
That is, the maximum of the voltage level (i.e. operating voltage V2) of the first end of step-down transistor 144a by clamp to lower than drop-out voltage Vmn, for example, drop-out voltage Vmn can select-14.4V, by this, so-called second clamping voltage of the application (being-15V in this instance) can just be formed.Now, the operating voltage V2 of the second power transistor 164 equals the second clamping voltage is-15V.
Second clamp units 144a produces the grid of the second clamping voltage to the second power transistor 164 according to drop-out voltage Vmn, as the operating voltage V2 of the grid of the second power transistor 164, makes the second power transistor 164 conducting produce low output level V
loutput signal OUT.
Relatively, when input signal IN is high level (H), wherein in input stage 120, switching transistor 124 turns off, make the second end suspension joint of step-down transistor 144a, now, driving transistors 144b in second clamp units 144 can supply the grid of operating voltage V2 to the second power transistor 164 of-20V, and the second power transistor 164 is turned off.
Thus, the operating voltage V2 of the second power transistor 164 just can operate under the operating voltage interval of-15V to-20V, the second power transistor 164 element can be adopted to tolerate forward logical triggering transistor that pressure reduction is 5V.
Should be specified, the citing (V of above-mentioned voltage value in the application
l:-20V, Vmn:-14.4Vor-15V, the second clamping voltage :-15V etc.) be only illustrative, not in order to the technical scope of limit the application, when applying depending on side circuit.
You need to add is that, in the above-described embodiments, by the setting of clamp module 140 in the present invention, the operating voltage difference between the first power transistor 162 and second power transistor 164 its grid and end points is made to be clamped at less than 5 volts, therefore, the first power transistor 162 and the second power transistor 164 only must select element tolerance pressure reduction to reach the element of 5 volts.In addition, in the above-described embodiments, switching transistor 122, switching transistor 124, boost transistor 142a and step-down transistor 144a etc., also only must select element tolerance pressure reduction to reach the element of 5 volts.Therefore, voltage level shift circuit of the present invention only needs to utilize low element to tolerate the combination of the element of pressure reduction, just may correspond to the output signal (as-20V to+40V) of the relatively large voltage difference of generation.
In sum, voltage level shift circuit of the present invention can be used between two digital circuits, be used for adjusting the voltage level between input signal and output signal, in addition, its output stage of voltage level shift circuit in the present invention has two groups of power transistors, and two groups of power transistors are respectively in order to produce the output signal of high output level and low output level.By this, one of them power transistor can be operated in the voltage range less with of high output level vicinity, and another group power transistor can be operated in another voltage range contiguous with low output level.Thus, two power transistors of output stage do not need the circuit element adopting the larger operating voltage difference of tolerance, can save circuit space and manufacturing cost.
Although the present invention discloses as above with execution mode; so itself and be not used to limit the present invention, those skilled in the art, without departing from the spirit and scope of the present invention; when being used for a variety of modifications and variations, therefore protection scope of the present invention is when being as the criterion depending on the appended claims person of defining.
Claims (9)
1. a voltage level shift circuit, in order to produce an output signal according to an input signal, this input signal and this output signal have different voltage level, and this voltage level shift circuit comprises:
One output stage, in order to produce this output signal, this output stage comprises one first power transistor and one second power transistor, and wherein this first power transistor is coupled to the voltage source of a high output level, and this second power transistor is coupled to the voltage source of a low output level;
One input stage, optionally produces this output signal by this first power transistor or this second power transistor according to this input signal; And
One clamp module, this clamp module comprises one first clamp units, and this first clamp units is coupled to one of this first power transistor grid, and one of this grid operating voltage is clamped between this high output level and one first clamping voltage by this first clamp units,
Wherein this input stage comprises the first switching transistor, and the grid of this first switching transistor couples this input signal, and the first end of this first switching transistor is coupled to a system voltage source,
Wherein this first clamp units comprises a boost transistor, this boost transistor has a first end, one second end and a grid, this first end of this boost transistor is coupled to this grid of this first power transistor, this second end of this boost transistor is coupled to the second end of the first switching transistor of this input stage, and this grid of this boost transistor is coupled to a booster tension.
2. voltage level shift circuit as claimed in claim 1, wherein have an output voltage between this high output level of this output signal and this low output level poor, it is poor that a high incoming level of this input signal and a low incoming level input voltage difference is therebetween less than this output voltage.
3. voltage level shift circuit as claimed in claim 1, wherein to have an element tolerance pressure poor for this first power transistor, and this first clamping voltage that this first clamp units is formed is more than or equal to this high output level and subtracts this element and tolerate pressure reduction.
4. voltage level shift circuit as claimed in claim 1, when this input signal is high level, wherein this second end of this boost transistor is coupled to this system voltage source by this input stage, this first clamp units produces this first clamping voltage this grid to this first power transistor according to this booster tension, makes this first power transistor conducting produce this output signal of this high output level.
5. voltage level shift circuit as claimed in claim 1, when this input signal is low level, wherein this input stage makes this second end suspension joint of this boost transistor, and this first power transistor is turned off.
6. voltage level shift circuit as claimed in claim 1, wherein this clamp module also comprises one second clamp units, this second clamp units is coupled to one of this second power transistor grid, and one of this its grid of the second power transistor operating voltage is clamped between this low output level and one second clamping voltage by this second clamp units.
7. voltage level shift circuit as claimed in claim 6, wherein this second clamp units comprises a step-down transistor, this step-down transistor has a first end, one second end and a grid, this first end of this step-down transistor is coupled to this grid of this second power transistor, this second end of this step-down transistor is coupled to this input stage, and this grid of this step-down transistor is coupled to a drop-out voltage.
8. voltage level shift circuit as claimed in claim 7, when this input signal is low level, wherein this second end of this step-down transistor is coupled to this system voltage source by this input stage, this second clamp units produces this second clamping voltage this grid to this second power transistor according to this drop-out voltage, makes this second power transistor conducting produce this output signal of this low output level.
9. voltage level shift circuit as claimed in claim 7, when this input signal is high level, wherein this input stage makes this second end suspension joint of this step-down transistor, and this second power transistor is turned off.
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| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201110371774.1A CN103124172B (en) | 2011-11-21 | 2011-11-21 | Voltage level shift circuit |
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| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201110371774.1A CN103124172B (en) | 2011-11-21 | 2011-11-21 | Voltage level shift circuit |
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| CN103124172B true CN103124172B (en) | 2015-06-24 |
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| CN1734942A (en) * | 2004-08-09 | 2006-02-15 | 三星电子株式会社 | Level shifter with low-leakage current |
| US20070085566A1 (en) * | 2005-10-19 | 2007-04-19 | Masaaki Koto | Level shift circuit |
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| CN101248582A (en) * | 2005-05-02 | 2008-08-20 | 爱特梅尔公司 | Voltage-level shifter |
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| CN102160288A (en) * | 2008-12-29 | 2011-08-17 | 艾格瑞系统有限公司 | Voltage level translator circuit |
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| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN1734942A (en) * | 2004-08-09 | 2006-02-15 | 三星电子株式会社 | Level shifter with low-leakage current |
| CN101248582A (en) * | 2005-05-02 | 2008-08-20 | 爱特梅尔公司 | Voltage-level shifter |
| US20070085566A1 (en) * | 2005-10-19 | 2007-04-19 | Masaaki Koto | Level shift circuit |
| CN101154941A (en) * | 2006-09-27 | 2008-04-02 | 统宝光电股份有限公司 | Level shifter with reduced power consumption |
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