CN103105885B - Circuit producing reference voltage of high voltage - Google Patents
Circuit producing reference voltage of high voltage Download PDFInfo
- Publication number
- CN103105885B CN103105885B CN201210586340.8A CN201210586340A CN103105885B CN 103105885 B CN103105885 B CN 103105885B CN 201210586340 A CN201210586340 A CN 201210586340A CN 103105885 B CN103105885 B CN 103105885B
- Authority
- CN
- China
- Prior art keywords
- reference voltage
- resistance
- nmos tube
- voltage
- pipe
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Active
Links
Abstract
The invention provides a circuit producing reference voltage of high voltage. The circuit producing the reference voltage of the high voltage comprises a first N-channel metal oxide semiconductor (NMOS) tube, a second NMOS tube, a first resistor and a second resistor. A grid electrode of the first NMOS tube is connected with reference voltage of low voltage, a source electrode of the first NMOS tube is connected with one end of the first resistor, and the other end of the first resistor is connected with the ground. A substrate of the first NMOS tube is connected with the source electrode of the first NMOS tube. A source electrode of the second NMOS tube is connected with a drain electrode of the first NMOS tube, and a common connection point of the source electrode of the second NMOS tube and the drain electrode of the first NMOS tube is connected with an output end of the circuit producing the reference voltage of the high voltage. A substrate of the second NMOS tube is connected with the source electrode of the second NMOS tube, and a grid electrode of the second NMOS tube is connected with the drain electrode of the second NMOS tube. A connection joint of the grid electrode of the second NMOS tube and the drain electrode of the second NMOS tube is connected with one end of the second resistor, and the other end of the second resistor is connected with a power source end. Besides, the invention further provides a circuit producing reference voltage of another high voltage. The circuit producing the reference voltage of the high voltage is capable of producing the reference voltage based on any high voltage, so that repeated production of a set of complex reference voltage circuit is avoided, a circuit structure is simplified, and a chip area is saved.
Description
Technical field
The present invention relates to the reference voltage generating circuit technical field in Analogous Integrated Electronic Circuits, specifically, the present invention relates to a kind of circuit that produces reference voltage based on arbitrary high pressure.
Background technology
In field of analog integrated circuit, often relate to voltage detecting and current detecting.Testing circuit need to have reference voltage V ref accurately, then voltage to be detected and this reference voltage is obtained to output state by comparer.If need voltage relatively based on voltage be not ground voltage, now corresponding reference voltage also need to produce based on non-ground voltage.
Such as in the application scheme of multisection lithium battery protection, need to detect voltage of batteries, therefore also need to produce the reference voltage V ref1-Vref4 of the terminal potential VC1-VC4 based on each batteries.Fig. 1 is a schematic diagram for the voltage detecting circuit of multiple batteries of the prior art.As shown in Figure 1, if still adopt traditional band gap (bandgap) circuit to produce reference voltage V ref1-Vref4, need many cover band-gap circuits.Because a set of band-gap circuit is comparatively complicated, if in order to produce these reference voltage V ref1-Vref4, the many covers of design band-gap circuit, can waste chip area undoubtedly, increases complexity in circuits, also means that chip power-consumption is larger simultaneously.
Summary of the invention
In order to overcome this difficulty, the present invention, on the basis of existing reference voltage over the ground, adopts comparatively simple circuit can realize other several reference voltages based on terminal potential VC1-VC4.
Be that technical matters to be solved by this invention is to provide a kind of high pressure reference voltage generating circuit, can produce reference voltage based on arbitrary high pressure, avoid again doing the reference voltage circuit of a set of complexity, simplify circuit structure, save chip area.
For solving the problems of the technologies described above, the invention provides a kind of high pressure reference voltage generating circuit, comprising: a NMOS pipe, the 2nd NMOS pipe, the first resistance and the second resistance; Wherein,
The grid of a described NMOS pipe connects a low pressure reference voltage, and the source electrode of a described NMOS pipe connects one end of described the first resistance, the other end ground connection of described the first resistance, the substrate of a described NMOS pipe and its source shorted;
The source electrode of described the 2nd NMOS pipe connects the drain electrode of a described NMOS pipe, both common joints are connected to the output terminal of described high pressure reference voltage generating circuit, the substrate of described the 2nd NMOS pipe and its source shorted, the grid of described the 2nd NMOS pipe and its drain electrode short circuit, described the 2nd grid of NMOS pipe and the common joint of its drain electrode are connected to one end of described the second resistance, and the other end of described the second resistance connects a power end.
Alternatively, the consistent size of a described NMOS pipe and described the 2nd NMOS pipe.
Alternatively, described the first resistance is identical with the resistance of described the second resistance.
For solving the problems of the technologies described above, the present invention also provides a kind of high pressure reference voltage generating circuit, comprising: a PMOS pipe, the 2nd PMOS pipe, the first resistance and the second resistance; Wherein,
The grid of a described PMOS pipe connects the reference voltage based on a power end, and the source electrode of a described PMOS pipe connects one end of described the first resistance, another power end of another termination of described the first resistance, the substrate of a described PMOS pipe and its source shorted;
The source electrode of described the 2nd PMOS pipe connects the drain electrode of a described PMOS pipe, both common joints are connected to the output terminal of described high pressure reference voltage generating circuit, the substrate of described the 2nd PMOS pipe and its source shorted, the grid of described the 2nd PMOS pipe and its drain electrode short circuit, described the 2nd grid of PMOS pipe and the common joint of its drain electrode are connected to one end of described the second resistance, and the other end of described the second resistance connects an arbitrary voltage.
Alternatively, the consistent size of a described PMOS pipe and described the 2nd PMOS pipe.
Alternatively, described the first resistance is identical with the resistance of described the second resistance.
Compared with prior art, the present invention has the following advantages:
The existing low pressure reference voltage (Vref4) over the ground of high pressure reference voltage generating circuit of the present invention utilization, can produce very simply the reference voltage (Vref1, Vref2 and Vref3) based on other voltage (VC2, VC3 and VC4), thereby avoid again doing the reference voltage circuit of a set of complexity, simplify circuit structure, saved the area of chip.
This circuit of the present invention can be widely used in the generation of reference voltage in the comparator circuit based on high pressure, as the high battery voltage detection circuit etc. of going here and there in multiple batteries.
Brief description of the drawings
The above and other features of the present invention, character and advantage are by by becoming more obvious below in conjunction with the description of drawings and Examples, wherein:
Fig. 1 is a schematic diagram for the voltage detecting circuit of multiple batteries of the prior art;
Fig. 2 is the high pressure reference voltage generating circuit of first embodiment of the invention;
Fig. 3 is the high pressure reference voltage generating circuit of second embodiment of the invention.
Embodiment
Below in conjunction with specific embodiments and the drawings, the invention will be further described; set forth in the following description more details so that fully understand the present invention; but the present invention obviously can implement with the multiple alternate manner that is different from this description; those skilled in the art can do similar popularization, deduction according to practical situations without prejudice to intension of the present invention in the situation that, therefore should be with content constraints protection scope of the present invention of this specific embodiment.
The first embodiment of high pressure reference voltage generating circuit
Fig. 2 is the high pressure reference voltage generating circuit of first embodiment of the invention.It should be noted that this accompanying drawing is all only as example, it is not to draw according to the condition of equal proportion, and should not be construed as limiting as the protection domain to actual requirement of the present invention using this.
As shown in Figure 2, this high pressure reference voltage generating circuit 200 mainly comprises: a NMOS pipe M1, the 2nd NMOS pipe M2, the first resistance R 1 and the second resistance R 2.Wherein, the grid of a NMOS pipe M1 meets a low pressure reference voltage V in, and the source electrode of a NMOS pipe M1 connects one end of the first resistance R 1, the other end ground connection of the first resistance R 1, substrate and its source shorted of a NMOS pipe M1.
And the source electrode of the 2nd NMOS pipe M2 connects the drain electrode of a NMOS pipe M1, both common joints are connected to the output end vo ut of high pressure reference voltage generating circuit 200, substrate and its source shorted of the 2nd NMOS pipe M2, grid and its drain electrode short circuit of the 2nd NMOS pipe M2, the 2nd NMOS pipe grid of M2 and the common joint of its drain electrode are connected to one end of the second resistance R 2, and the other end of the second resistance R 2 connects a power end VDD.So just, produced the reference voltage V out(Vref1 based on this power end VDD), this reference voltage V out=VDD-Vin.
In the present embodiment, the consistent size of a NMOS pipe M1 and the 2nd NMOS pipe M2, and their source electrode and the equal short circuit of substrate, the therefore equal short circuit of their source electrode and substrate, therefore they also have identical threshold voltage.An other NMOS pipe M1 and the 2nd NMOS pipe M2, at same branch road, have same current, therefore the gate source voltage Vgs of a NMOS pipe M1 and the 2nd NMOS pipe M2 is equal, i.e. and Vgs1=Vgs2.
In addition, in the present embodiment, the first resistance R 1 is identical with the resistance of the second resistance R 2, on same branch road, has same current, therefore the pressure drop VR in the first resistance R 1 and the second resistance R 2 is equal, i.e. and VR1=VR2.And Vin=Vgs1+VR1, VDD-Vout=Vgs2+VR2, therefore Vin=VDD-Vout, i.e. Vout=VDD-Vin.
Thereby by existing reference voltage V in over the ground, produce the reference voltage to VDD.
This structure can be for detection of VDD associated voltage, reaches certain predetermined value and produces marking signal as detected the pressure reduction of VDD and a voltage Vx, if only have reference voltage over the ground, because VDD can change, is difficult to realize this comparison.By the VDD-Vref of circuit generation above, Vx and this voltage are directly passed through to common comparer, can realize this measuring ability.Thereby avoid the complexity of circuit.
The second embodiment of high pressure reference voltage generating circuit
Fig. 3 is the high pressure reference voltage generating circuit of second embodiment of the invention.It should be noted that this accompanying drawing is all only as example, it is not to draw according to the condition of equal proportion, and should not be construed as limiting as the protection domain to actual requirement of the present invention using this.
In addition, the present embodiment is continued to use element numbers and the partial content of previous embodiment, wherein adopts identical label to represent identical or approximate element, and has optionally omitted the explanation of some constructed content.Explanation about clipped can be with reference to previous embodiment, and it is no longer repeated for the present embodiment.
As shown in Figure 3, this high pressure reference voltage generating circuit 300 mainly comprises: a PMOS pipe M1, the 2nd PMOS pipe M2, the first resistance R 1 and the second resistance R 2.Wherein, the grid of the one PMOS pipe M1 meets the reference voltage V in based on a power end (VDD in embodiment illustrated in fig. 1), the source electrode of the one PMOS pipe M1 connects one end of the first resistance R 1, another power end of another termination VDD of the first resistance R 1, substrate and its source shorted of a PMOS pipe M1.
And the source electrode of the 2nd PMOS pipe M2 connects the drain electrode of a PMOS pipe M1, both common joints are connected to the output end vo ut of high pressure reference voltage generating circuit 300, substrate and its source shorted of the 2nd PMOS pipe M2, grid and its drain electrode short circuit of the 2nd PMOS pipe M2, the 2nd PMOS pipe grid of M2 and the common joint of its drain electrode are connected to one end of the second resistance R 2, and the other end of the second resistance R 2 connects an arbitrary voltage VC.So just, produced based on VC(VC2, VC3 or VC4) reference voltage V out(Vref2, Vref3), this reference voltage V out=VC+(VDD-Vin).
In the present embodiment, a PMOS pipe M1 and the 2nd PMOS pipe M2 have identical size, and their source electrode and the equal short circuit of substrate, and therefore they also have identical threshold voltage.In addition, a PMOS pipe M1 and the 2nd PMOS pipe M2, at same branch road, have same current, therefore the gate source voltage Vsg of a PMOS pipe M1 and the 2nd PMOS pipe M2 is equal, i.e. and Vsg1=Vsg2.
In addition, in the present embodiment, the first resistance R 1 is identical with the second resistance R 2 resistances, on same branch road, has same current, therefore the pressure drop VR in the first resistance R 1 and the second resistance R 2 is equal, i.e. and VR1=VR2.Therefore obtain: VDD-Vin=Vout-VC, i.e. Vout=VC+ (VDD-Vin).
Wherein VDD-Vin is master reference magnitude of voltage, is designated as Vref, and Vin can produce by the circuit of Fig. 2.By this circuit, can produce the reference voltage V C+Vref based on free voltage VC.In actual applications, if the detection voltage of comparer is the voltage based on VC, can adopt the circuit of Fig. 3 to produce the reference voltage V C+Vref based on VC, then the voltage ratio of direct and needs detection.
Below in conjunction with multisection lithium battery voltage detection mode in Fig. 1 further describe Fig. 2 and embodiment illustrated in fig. 3 in the application of high pressure reference voltage generating circuit 200,300 voltage detecting circuits at multiple batteries.
In Fig. 1, need the voltage of comparison to have Vd1 and Vref1, Vd2 and Vref2, Vd3 and Vref3, Vd4 and Vref4.Wherein Vd4 and Vref4 are the direct level based on ground, can directly compare, and the generation of all the other reference voltage V ref1 ~ Vref3 is difficult point.According to content of the present invention, can realize easily this three reference voltage V ref1 ~ Vref3 and produce, then use common comparer can realize the comparison of these three groups of voltages.
By the circuit in Fig. 2, change VDD into VC1, Vin adds reference voltage V ref4 over the ground, can realize Vref1=VC1-Vref4, and this voltage and Vd1 directly compare, and can realize the detection of first segment cell voltage.
Adopt the circuit in Fig. 3, Vin input adds Vref1 voltage, and VC meets VC3, can produce Vref2=VC3+Vref4, and this voltage and Vd2 directly compare, and can realize the detection of second section cell voltage.
In like manner, continue to adopt the circuit in Fig. 3, Vin input adds Vref1 voltage, and VC meets VC4, can produce Vref3=VC4+Vref4, and this voltage and Vd3 directly compare, and can realize the detection of the 3rd batteries voltage.
The existing low pressure reference voltage (Vref4) over the ground of high pressure reference voltage generating circuit of the present invention utilization, can produce very simply the reference voltage (Vref1, Vref2 and Vref3) based on other voltage (VC2, VC3 and VC4), thereby avoid again doing the reference voltage circuit of a set of complexity, simplify circuit structure, saved the area of chip.
This circuit of the present invention can be widely used in the generation of reference voltage in the comparator circuit based on high pressure, as the high battery voltage detection circuit etc. of going here and there in multiple batteries.
Although the present invention with preferred embodiment openly as above, it is not for limiting the present invention, and any those skilled in the art without departing from the spirit and scope of the present invention, can make possible variation and amendment.Therefore, every content that does not depart from technical solution of the present invention, any amendment, equivalent variations and the modification above embodiment done according to technical spirit of the present invention, within all falling into the protection domain that the claims in the present invention define.
Claims (4)
1. a high pressure reference voltage generating circuit (200), comprising: a NMOS pipe (M1), the 2nd NMOS pipe (M2), the first resistance (R1) and the second resistance (R2); Wherein,
The grid of a described NMOS pipe (M1) connects a low pressure reference voltage (Vin), the source electrode of a described NMOS pipe (M1) connects one end of described the first resistance (R1), the other end ground connection of described the first resistance (R1), substrate and its source shorted of a described NMOS pipe (M1);
The source electrode of described the 2nd NMOS pipe (M2) connects the drain electrode of a described NMOS pipe (M1), both common joints are connected to the output terminal (Vout) of described high pressure reference voltage generating circuit (200), substrate and its source shorted of described the 2nd NMOS pipe (M2), grid and its drain electrode short circuit of described the 2nd NMOS pipe (M2), described the 2nd NMOS pipe grid of (M2) and the common joint of its drain electrode are connected to one end of described the second resistance (R2), and the other end of described the second resistance (R2) connects a power end (VDD);
The consistent size of a described NMOS pipe (M1) and described the 2nd NMOS pipe (M2).
2. high pressure reference voltage generating circuit according to claim 1 (200), is characterized in that, described the first resistance (R1) is identical with the resistance of described the second resistance (R2).
3. a high pressure reference voltage generating circuit (300), comprising: a PMOS pipe (M1), the 2nd PMOS pipe (M2), the first resistance (R1) and the second resistance (R2); Wherein,
The grid of a described PMOS pipe (M1) connects the reference voltage (Vin) based on a power end, the source electrode of a described PMOS pipe (M1) connects one end of described the first resistance (R1), another power end of another termination (VDD) of described the first resistance (R1), substrate and its source shorted of a described PMOS pipe (M1);
The source electrode of described the 2nd PMOS pipe (M2) connects the drain electrode of a described PMOS pipe (M1), both common joints are connected to the output terminal (Vout) of described high pressure reference voltage generating circuit (300), substrate and its source shorted of described the 2nd PMOS pipe (M2), grid and its drain electrode short circuit of described the 2nd PMOS pipe (M2), described the 2nd PMOS pipe grid of (M2) and the common joint of its drain electrode are connected to one end of described the second resistance (R2), and the other end of described the second resistance (R2) connects an arbitrary voltage (VC);
The consistent size of a described PMOS pipe (M1) and described the 2nd PMOS pipe (M2).
4. high pressure reference voltage generating circuit according to claim 3 (300), is characterized in that, described the first resistance (R1) is identical with the resistance of described the second resistance (R2).
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201210586340.8A CN103105885B (en) | 2012-12-28 | 2012-12-28 | Circuit producing reference voltage of high voltage |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201210586340.8A CN103105885B (en) | 2012-12-28 | 2012-12-28 | Circuit producing reference voltage of high voltage |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| CN103105885A CN103105885A (en) | 2013-05-15 |
| CN103105885B true CN103105885B (en) | 2014-09-17 |
Family
ID=48313819
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201210586340.8A Active CN103105885B (en) | 2012-12-28 | 2012-12-28 | Circuit producing reference voltage of high voltage |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN103105885B (en) |
Families Citing this family (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN110416968A (en) * | 2019-08-09 | 2019-11-05 | 无锡启腾电子科技有限公司 | A kind of electrical fuse and its working method |
| CN113364436B (en) * | 2021-06-24 | 2023-11-07 | 中颖电子股份有限公司 | Voltage comparison circuit |
Family Cites Families (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH0679262B2 (en) * | 1984-02-28 | 1994-10-05 | シャープ株式会社 | Reference voltage circuit |
| CN101051841B (en) * | 2007-02-06 | 2010-08-25 | 复旦大学 | Window type parallel modulus converter suitable for digital power controller |
| JP2009265955A (en) * | 2008-04-25 | 2009-11-12 | Hitachi Ulsi Systems Co Ltd | Semiconductor integrated circuit |
| CN101702514B (en) * | 2009-11-26 | 2014-09-10 | 北京中星微电子有限公司 | Battery protection control device |
| CN101902215B (en) * | 2010-08-02 | 2012-09-26 | 中颖电子股份有限公司 | Four-input terminal comparator |
-
2012
- 2012-12-28 CN CN201210586340.8A patent/CN103105885B/en active Active
Also Published As
| Publication number | Publication date |
|---|---|
| CN103105885A (en) | 2013-05-15 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| CN102739235B (en) | Switching value acquisition insulating circuit | |
| CN207851026U (en) | Systematic gas monitoring system | |
| CN103105885B (en) | Circuit producing reference voltage of high voltage | |
| CN102624369B (en) | POR (Power-on Reset) circuit with variable reset point on basis of band gap reference source | |
| US9356471B2 (en) | Power supply circuit | |
| CN102594312B (en) | Novel power-on reset circuit | |
| CN101408564A (en) | Voltage detection circuit | |
| CN103457465B (en) | A kind of constant current/constant voltage DC-DC converting system with outside adjustable current-limiting function | |
| CN104300949A (en) | Low-voltage resetting circuit for radio frequency chip of internet of things | |
| CN104483033A (en) | CMOS (complementary metal-oxide-semiconductor transistor) temperature sensor circuit with wide temperature range | |
| CN208818364U (en) | Temperature measuring circuit | |
| CN101902215B (en) | Four-input terminal comparator | |
| CN101769954B (en) | Voltage detecting circuit for multiple serial batteries | |
| CN106300248A (en) | A kind of under-voltage protecting circuit of current control mode | |
| CN102931833A (en) | Circuit for converting high voltage into low voltage in analogue circuit | |
| CN104716949B (en) | A kind of two line sensor interface circuitries | |
| CN102706473A (en) | Temperature detecting circuit applied to radio frequency receiver | |
| CN204117011U (en) | A kind of voltage signal conditioning circuit based on controllable accurate source of stable pressure | |
| CN203455403U (en) | Battery voltage detection circuit based on Zener diode | |
| CN204119024U (en) | A kind of voltage signal conditioning circuit based on TL431 | |
| CN201733130U (en) | Power supply management module circuit | |
| CN202903932U (en) | Anti-interference three-state input detection circuit with low power consumption | |
| CN107525602B (en) | Middle-upper battery pack temperature detection circuit in battery pack serial body | |
| CN101586987B (en) | Temperature sensing circuit suitable for operation at low voltage | |
| CN105099182B (en) | Realize the switch power converter of fast current detecting |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| C06 | Publication | ||
| PB01 | Publication | ||
| C10 | Entry into substantive examination | ||
| SE01 | Entry into force of request for substantive examination | ||
| C14 | Grant of patent or utility model | ||
| GR01 | Patent grant |