CN101051841B

CN101051841B - Window type parallel modulus converter suitable for digital power controller

Info

Publication number: CN101051841B
Application number: CN2007100372023A
Authority: CN
Inventors: 严伟; 周锋
Original assignee: Fudan University
Current assignee: Fudan University
Priority date: 2007-02-06
Filing date: 2007-02-06
Publication date: 2010-08-25
Anticipated expiration: 2027-02-06
Also published as: CN101051841A

Abstract

The parallel A/D converter is composed of 7 PMOS tubes, 4 NMOS tubes, and 2n comparators. The MOS tubes form folded common source and common grid amplifier with a difference input and single end output. N resistances are connected to up/down of the output node of amplifier respectively. Amplifier is wired in unitary negative feedback follow form, and positive input end is connected to reference voltage Vref. Since Vref is DC, and amplifier operates at static state, thus, current passing through resistance is equal to DC bias current of output branch of amplifier. 2n threshold voltages are formed from two ends of each resistance. Using 2n comparators controlled by clock CK compare the input signal Vin with 2n threshold voltages so as to generate the output codes of thermometer. The A/D converter possesses features of window quantification, quick speed, low power waste, small area, and low difficulty of design. The converter is met to requirement of numeral powersupply control fully.

Description

Be applicable to the window type parallel analog to digital converter of digital power controller

Technical field

The invention belongs to technical field of integrated circuits, be specifically related to a kind of modified model window type parallel analog to digital converter that is applicable to the digital power controller.

Background technology

In recent decades, switch power technology relies on advantages such as its conversion efficiency height, voltage stabilized range be wide always, and is widely used.When for example being the computer microprocessor chip power supply, good Switching Power Supply can reduce the power consumption of system greatly.In such as portable battery-powered device such as mobile phone, notebook computers, the importance of Switching Power Supply is particularly outstanding.Key modules is used Switching Power Supply, not only can prolong the service time of device battery, and can make good isolation the interference between the module, thus the performance of raising equipment.Can predict, all can use Switching Power Supply in following nearly all high-performance electronic product.Along with the development of integrated circuit technique, the trend of Switching Power Supply must be the precision height, response is fast, low in energy consumption, volume is little, even is integrated into the chip internal that is powered.

At present, the power-supply controller of electric in the Switching Power Supply adopts simulated mode always.Yet the analog power controller has proposed very high requirement to designer's designed capacity, because Switching Power Supply often is operated in the rugged environment, the performance of controller can be subjected to the tremendous influence of factors such as noise, temperature, process deviation.And the analog power controller needs using compensation electric capacity, and no matter adopting integration mode still is external mode, all can the outer area of occupying volume, and cause bigger power consumption.For the consideration of these factors, the digital power controller has obtained the foreign scholar and industry is more and more paid close attention to.The digital power controller is sampled output voltage, and realizes control with optimized Algorithm.Compare the analog power controller, the digital power controller is difficult for receiving the influence of outside adverse circumstances, has higher reliability, has reduced design difficulty and design cycle.The use of optimized Algorithm makes controller can adjust response curve flexibly, and realizes control able to programme.The most important thing is that digital control approach can be realized the function of power management, promptly manage a plurality of equipment simultaneously.These advantages all are that the analog power controller is incomparable, and therefore the research to digital power-supply controller of electric has very high practical value.

Most important analog module is the analog to digital converter (ADC) that its front end is used for the output voltage sampling in the digital power controller.Different with the analog to digital converter of routine, the analog to digital converter in the digital power controller has its special requirement and characteristics.At first, the time-delay of digital power controller is mainly produced by analog to digital converter, and it can have a strong impact on the response curve of controller, so analog to digital converter should have enough little time-delay and guarantees stablizing of control loop.At present popular flow-line modulus converter or sigma-delta pattern number converter are not suitable for the application scenario of power supply control all because of the use of its multilevel hierarchy or digital filter has bigger time-delay.The single-stage parallel A/D converter then because of its good time-delay characteristics, becomes first-selected structure.Secondly, near substantially all fluctuations output reference voltage of the output voltage of digital power controller, promptly the measuring object of analog to digital converter is a very little scope.If parallel A/D converter is designed to the gamut form, both consumed a lot of power consumptions, take very large tracts of land again, inefficiency.Therefore, how to design the window type analog to digital converter that is operated in certain particular segment voltage range, become one of key technology in the digital power controller.

The earliest the window type parallel analog to digital converter that is applied to the digital power controller appeared at about 2003 on the foreign literature, can be referring to Peterchev A.V., Jinwen Xiao and Sanders S.R., " Archi tecture and ICimplementation of a digital VRM controller; " IEEE Trans.Power Electronics, vol.18, NO.1, .Jan.2003, its principle as shown in Figure 1.About reference voltage Vref, each n

error voltage source

1,2,3,4,5,6 of having connected produces 2n threshold voltage.Have the negative terminal of 2n

comparator

7,8,9,10,11,12 to be connected respectively to 2n threshold voltage simultaneously, anode is connected to and is sampled voltage Vin.Like this, output Vout+n, Vout+2, Vout+1, Vout-1, Vout-2, the Vout-n of 2n comparator are exactly the thermometer output code within the window that is centered around about reference voltage Vref.As seen, the window type parallel analog to digital converter can detect the error amount within certain scope of the output reference voltage left and right sides, adapts to the application scenario of digital power controller fully, and greatly reduces circuit area and power consumption.But this document has only proposed thought, does not realize and provide concrete circuit.

At present, domestic research about this type of circuit is at the early-stage, a kind of concrete circuit as shown in Figure 2, referring to Guo Jianmin, Zhang Ke, Gu Peipei, Li Wenhong, " be applicable to the ADC of mainboard voltage adjuster digital control module ", solid electronics research and progress, 2007 the 2nd phases.The amplifier 25 that is connected into the form of following with the voltage clamp of node 30 in reference voltage Vref; The constant-current source that is formed by metal-oxide-

semiconductor

26,27,28,29 can produce 2n threshold voltage in conjunction with

2n resistance

13,14,15,16,17,18; 2n the

comparator

19,20,21,22,23,24 by clock CK control compares input signal Vin and 2n threshold voltage, produces last output.Yet sort circuit needs extra constant-current source to come to be the resistance power supply, has introduced additional power consumption.

Summary of the invention

The objective of the invention is to propose a kind of modified model window type parallel analog to digital converter that is applicable to the digital power controller,, satisfied the trend of current low power dissipation design to overcome the existing bigger deficiency of window type parallel analog to digital converter power consumption.

The modified model window type parallel analog to digital converter that the present invention proposes is by PMOS

pipe

31,32,33,34,35,36,37, NMOS

pipe

38,39,40,41,

resistance

42,43,44,45,46,47,

comparator

48,49,50,51,52,53 connects to form through circuit, and its structure as shown in Figure 3.Following mask body is introduced its annexation and its operation principle:

PMOS pipe 31～41 and resistance 42～47 constitute the folded common source and common grid amplifier of the input of a PMOS pipe difference, single-ended output.The anode input of this amplifier connects reference voltage Vref, and the negative terminal input is connected to the output node 54 of amplifier, formed the unit negative feedback and followed form, so the voltage of node 54 equals reference voltage Vref.About amplifier output node 54, each n resistance of connecting.When circuit working, Vref is a constant reference voltage, so amplifier is operated in static state, can think a constant value so flow through the electric current of resistance, and equal the output branch current of amplifier.Because the window that needs to investigate is around a reference voltage Vref very little voltage range up and down, so the linear output voltage range of amplifier can comprise the dividing potential drop summation on the

resistance

42,43,44,45,46,47 fully, so amplifier can operate as normal.According to actual needs, design the branch current of amplifier and the value of resistance, and each resistance two ends is drawn, form a satisfactory 2n threshold voltage.With

2n comparator

48,49,50,51,52,53 input signal Vin and 2n threshold voltage are compared, produce last thermometer output code by clock CK control.

Than existing technology, window type analog to digital converter of the present invention is the resistance string biasing without any need for additional electric current when not influencing circuit performance fully, has avoided extra power consumption, has reduced the area of circuit.

Description of drawings

Fig. 1 window type parallel analog to digital converter thought.

The existing window type parallel analog-digital converter circuit of Fig. 2 is realized.

The modified model window type parallel analog-digital converter circuit that Fig. 3 the present invention proposes is realized.

Label declaration: 1,2,3,4,5,6 is the error voltage source, 7,8,9,10,11,12 is comparator, 13,14,15,16,17,18,42,43,44,45,46,47 is resistance, 19,20,21,22,23,24,48,49,50,51,52,53 comparators for clock CK control, 25 is amplifier, 26,27,31,32,33,34,35,36,37 are the PMOS pipe, and 28,29,38,39,40,41 are the NMOS pipe.

Embodiment

Further describe the present invention below in conjunction with accompanying drawing.

In Fig. 3, metal-oxide-semiconductor 31～41 and resistance 42～47 have constituted a folded common source and common grid amplifier.It is right that wherein

PMOS pipe

32,33 forms the input of PMOS difference; PMOS manages the 31 common source end tail currents as differential pair; NMOS manages 40, the 41 drain terminal tail currents as differential pair;

NMOS pipe

38,39 is input cascade pipe;

PMOS pipe

34,35,36,37 forms the load of PMOS common-source common-gate current mirror; 2n resistance of polyphone on the output branch road of amplifier, and its intermediate node 54 is connected to the negative input end of amplifier for the output of amplifier, and the positive input terminal of amplifier is connected to reference voltage Vref; The negative input end of 2n clock CK control comparator is connected respectively to the upper end of each resistance, and anode is connected to input and is sampled voltage Vin.

During work, amplifier is linked to be the unit negative feedback and follows form, so the voltage of amplifier output node 54 equals the voltage Vref of amplifier positive input terminal.And Vref is a direct voltage, so amplifier is operated in static state, and electric current of its output branch road can be thought constant, and equals dc bias current.Branch current and resistance string acting in conjunction have formed Vref a series of threshold voltages up and down.In the digital power controller, the voltage range that ADC investigates is at a Vref very little window up and down, and less than the linear output voltage range of amplifier itself, therefore as long as resistance number 2n obtains rationally, amplifier output is can be unsaturated to its value far away.Input is sampled voltage Vin with the comparator that utilizes 2n clock CK to control and 2n threshold voltage compares, and just can produce 2n thermometer output code, thereby realize at reference voltage Vref window type parallel analog to digital converter up and down.

Analog to digital converter of the present invention has the advantages that window quantizes, speed is fast, low in energy consumption, area is little, design difficulty is low, is applicable to the requirement of digital power controller fully.

Claims

1. a window type parallel analog to digital converter that is applicable to the digital power controller is characterized in that by 7 PMOS pipes (31～37), 4 NMOS pipes (38～41), and 2n resistance (42～47), comparator (48～53) connects and composes through circuit; Wherein, 7 PMOS pipes (31～37), 4 NMOS pipes (38～41) and 2n resistance (42～47) constitute the input of a PMOS pipe difference, the folded common source and common grid amplifier of single-ended output, wherein a PMOS manages (32), it is right that the 2nd PMOS pipe (33) forms the input of PMOS difference, the 3rd PMOS pipe (31) forms the common source end tail current pipe of differential pair, the one NMOS manages (40), the 2nd NMOS pipe (41) forms the drain terminal tail current pipe of differential pair, the 3rd NMOS manages (38), the 4th NMOS pipe (39) forms input folded common source and common grid pipe, and the 4th PMOS manages (34), the 5th PMOS manages (35), the 6th PMOS manages (36), the 7th PMOS pipe (37) forms the load of PMOS common-source common-gate current mirror; The anode input of this folded common source and common grid amplifier connects reference voltage Vref, and the negative terminal input is connected to the output node (54) of this folded common source and common grid amplifier, forms the unit negative feedback and follows form; About this folded common source and common grid amplifier output node (54), each n resistance of connecting; According to actual needs, design the electric current of the branch road of forming by 2n resistance of series connection on the folded common source and common grid amplifier and the value of resistance, and each resistance two ends is drawn, form a satisfactory 2n threshold voltage; With 2n comparator (48,49,50,51,52,53) input signal Vin and 2n threshold voltage are compared, produce last thermometer output code by clock CK control.