CN202903932U - Anti-interference three-state input detection circuit with low power consumption - Google Patents
Anti-interference three-state input detection circuit with low power consumption Download PDFInfo
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- CN202903932U CN202903932U CN 201220628265 CN201220628265U CN202903932U CN 202903932 U CN202903932 U CN 202903932U CN 201220628265 CN201220628265 CN 201220628265 CN 201220628265 U CN201220628265 U CN 201220628265U CN 202903932 U CN202903932 U CN 202903932U
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Abstract
The utility model provides an anti-interference three-state input detection circuit with low power consumption. The circuit comprises an input voltage division circuit, an input voltage division clamping circuit and a controlled current unit. When an input voltage is a high-low level, a current of the input voltage division circuit is a quiescent current. When the input is high impedance, the input voltage division clamping circuit controls working of the controlled current circuit through controlling the voltage of an input point so that the current of the input circuit is increased and an ability of noise resistance of the detection circuit is increased too.
Description
[technical field]
The utility model relates to electronic circuit field, particularly about the jamproof ternary input detecting circuit of a kind of low-power consumption.
[background technology]
The input state of a circuit comprises three kinds of basic logic states of high level, low level and high-impedance state (or being called suspended state (floating)), is called for short ternary.During design circuit, usually can adopt a testing circuit to determine that the voltage of input is high level, low level or high-impedance state.
As depicted in figs. 1 and 2, its demonstration is traditional ternary input detecting circuit.Resistance R 1 and R2 among Fig. 1, the transistor M3 among Fig. 2 and M4 have consisted of the bleeder circuit of input.Transistor M1, M2 consist of two comparers that turn threshold is different, when being input as when high or low, Vin is transfused to signal and draws high or drag down, result's (for example AB is height or AB is low) corresponding to comparer output, and when being input as high resistant, Vin voltage is determined by the input bleeder circuit, in Fig. 1, Vin is R2/ (R1+R2) supply voltage doubly, it is low making output A, and B is high, and so just can detect input is high-impedance state, the principle of dividing potential drop is similar among Fig. 2, and Mos pipe M3, the M4 of utilization are as partial pressure device.
All the time have electric current to flow through in the input bleeder circuit of existing ternary testing circuit, for example the electric current of the bleeder circuit of ternary testing circuit shown in Figure 1 is VDD/ (R1+R2).If wish that the quiescent current of this bleeder circuit is lower, need to increase the impedance of bleeder circuit, make the electric current that flows through less.But, when input signal is high-impedance state and when certain superimposed noise is arranged, the bleeder circuit impedance is too high, noise current can produce larger amplitude at input signal Vin,, the input signal Vin that noise produces to cause the upset of comparer mistake if having surpassed the threshold value of comparer, so that output A, B change, the tri-state state that then detects may be wrong.And the electric current of bleeder circuit is nonlinear among Fig. 2, depend on supply voltage, if supply voltage has larger fluctuation, great changes have taken place then may to cause the electric current of this circuitry consumes, supply voltage is too high might to make that comparer can not overturn when being input as high-low level, and supply voltage is crossed the low situation of high resistant input that then may make and made mistakes.
When in the face of strong noise, supply voltage is unstable or the complicated applied environment such as bullet (ground bounce) is significantly arranged, the structure of existing ternary testing circuit is difficult to take into account the requirement of each side, need to carry out balance to performance, may need to sacrifice a part of power consumption or fault-tolerant ability.
That is to say, existing ternary testing circuit is if think that the electric current of bleeder circuit consumption is less, just must increase the impedance of bleeder circuit, but increase impedance, then can cause the noise resistivity to the outside to weaken, support antimierophonic ability if improve, then need to consume more electric current.
In addition, existing ternary testing circuit adopts resistance or linear resistance or transistor to carry out dividing potential drop, and is higher to the requirement of power supply, and supply voltage is can not fluctuation ratio larger.But for power management chip, it often is operated under the abominable external power source condition, supply voltage has larger variation, adopt existing dividing potential drop mode, can cause that quiescent current has larger variation under the different voltages, also can have influence on the resistivity to external disturbance, even error-detecting occur.
Therefore, be necessary existing ternary input detecting circuit is improved, to overcome the defective of existing testing circuit.
[utility model content]
The purpose of this utility model is to provide a kind of low-power consumption jamproof ternary input detecting circuit.
For reaching aforementioned purpose, a kind of ternary input detecting circuit of the utility model, it comprises: the input bleeder circuit, described input bleeder circuit comprises the first power device and the second power device that is series between the first level node and the second electrical level node, wherein the tie point of the first power device and the second power device is input end, the tie point of the first power device and the first level node is the first output terminal, the tie point of the second power device and second electrical level node is the second output terminal, when input end input be high-low level the time, the first output terminal and the second output terminal output same level, when input end is high-impedance state, the first output terminal and the second output terminal output varying level, described ternary input detecting circuit also comprises the controlled current flow unit that is connected in the first output node and the second output node, when input end input high-low level, the electric current of described input bleeder circuit is the first electric current, when input end was high-impedance state, the electric current that input end control controlled current flow unit provides electric current to make described input bleeder circuit rose to the second electric current.
According to an embodiment of the present utility model, it also comprises input dividing potential drop clamping circuit described ternary input detecting circuit, the electric current of the described input bleeder circuit of described input dividing potential drop clamping circuit mirror image makes the voltage of input end revert to reference voltage when input end is high-impedance state.
According to an embodiment of the present utility model, described input dividing potential drop clamping circuit comprises the 3rd power device and the 4th power device that is series between the first level node and the second electrical level node, and wherein the tie point of the 3rd power device and the 4th power device is the input reference voltage node.
According to an embodiment of the present utility model, the first power device of described input bleeder circuit is a nmos pass transistor Q1, the second power device of described input bleeder circuit is a PMOS transistor Q3, the 3rd power device of described input dividing potential drop clamping circuit is a nmos pass transistor Q0, described the 4th power device is a PMOS transistor Q2, the drain electrode of described the first power device is connected in described the first output node, source electrode is connected in described input node, the source electrode of described the second power device is connected in described input node, the drain electrode of described the second power device is connected in described the second output node, the drain electrode of the 3rd power device of described dividing potential drop clamping circuit is connected in described the first level node, source electrode is connected in described reference voltage input node, the source electrode of the 4th power device of described dividing potential drop clamping circuit is connected in described reference voltage input node, and drain electrode is connected in described second electrical level node.The grid of described the first power device links to each other with the grid of described the 3rd power device, and the grid of described the second power device and the 4th power device links to each other.
According to an embodiment of the present utility model, described controlled current flow unit comprises the first controlled current flow unit that is connected in the first output node, and it comprises the first voltage comparator, the first controlled switch; Described the first voltage comparator is input voltage and the first reference voltage relatively, described the first controlled switch according to the output control linkage of the first voltage comparator in the current branch of the first output node; Described controlled current flow unit comprises the second controlled current flow unit that is connected in the second output node, and it comprises second voltage comparer, the second controlled switch; Described second voltage comparer is input voltage and the second reference voltage relatively, described the second controlled switch according to the output control linkage of second voltage comparer in the current branch of the second output node, the first reference voltage of described the first voltage comparator is low level VTHL, the second reference voltage of described second voltage comparer is high level VTHH, VTHH〉VTHL.
According to an embodiment of the present utility model, the electric current that the current branch that described the first controlled switch is controlled provides for current source, or the electric current that provides of divider resistance, or the electric current that provides of transistor feedback.
According to an embodiment of the present utility model, described power device is mosfet transistor or junction transistor.
Ternary input detecting circuit of the present utility model, by input dividing potential drop clamping circuit and controlled current flow unit are set, when input voltage is high-low level, static current sinking is also constant, when being input as high-impedance state, make the current potential of the input node of input bleeder circuit revert to reference voltage by input dividing potential drop clamping circuit, the electric current of control controlled current flow unit adds in the input bleeder circuit, in the situation that do not increase power consumption, significantly improve to antimierophonic ability.
[description of drawings]
Fig. 1 is the structural drawing of existing ternary input detecting circuit.
Fig. 2 is the structural drawing of existing another ternary input detecting circuit.
Fig. 3 is the schematic diagram that the three-state of ternary input detecting circuit of the present utility model detects.
Fig. 4 is the structural drawing of an embodiment of ternary input detecting circuit of the present utility model.
Fig. 5 is the structural drawing of another embodiment of ternary input detecting circuit of the present utility model.
Fig. 6 is the structural drawing of another embodiment of ternary input detecting circuit of the present utility model.
[embodiment]
Alleged " embodiment " or " embodiment " refer to be contained in special characteristic, structure or the characteristic at least one implementation of the utility model herein.Different local in this manual " in one embodiment " that occur not are all to refer to same embodiment, neither be independent or the embodiment mutually exclusive with other embodiment optionally.
The utility model is for the ternary testing circuit of prior art, the electric current of input bleeder circuit hour opposing interference performance a little less than, increase the defective that the bleeder circuit electric current then can improve power consumption, propose the strong ternary input detecting circuit of a kind of low-power consumption and antijamming capability.
See also shown in Figure 3, it shows the ultimate principle figure of ternary input detecting circuit, as shown in Figure 3, ternary input detecting circuit of the present utility model is to adopt the input bleeder circuit, this input bleeder circuit comprises the first power device G1 and the second power device G2 that is series between the first level node VDD and the second electrical level node earth point, wherein the tie point of the first power device G1 and the second power device G2 is the input voltage vin input end, the tie point of the first power device G1 and the first level node is the first output terminals A, the second power device G2 is the second output terminal B with the tie point on ground, when input end input be high level the time, the first output terminals A and the identical high level of the second output terminal B output, when input end input be low level the time, the first output terminals A and the identical low level of the second output terminal B output, when input end is high-impedance state, the first output terminals A and the second output terminal B export varying level, detect like this three kinds of states of input.
See also shown in Figure 4ly, it shows the structural drawing of an embodiment of ternary input detecting circuit of the present utility model.As shown in Figure 4, ternary input detecting circuit of the present utility model comprises input bleeder circuit, input dividing potential drop clamping circuit and controlled current flow unit.
Please continue to consult shown in Figure 4, in an embodiment of the present utility model, the first power device of the input bleeder circuit of ternary input detecting circuit of the present utility model is a nmos pass transistor Q1, the second power device of described input bleeder circuit is a PMOS transistor Q2, wherein the drain electrode of transistor Q1 is connected in the certain in other embodiments drain electrode of transistor Q1 of the first level node VDD(by current source I1 and also can be connected in the first level node VDD by resistance or other circuit), the drain electrode of transistor Q1 is as the first output node A of ternary input detecting circuit, the source electrode of transistor Q1 links to each other with the source electrode of transistor Q2, and wherein input detects the input node of voltage to the node N1 that links to each other with the source electrode of transistor Q2 of the source electrode of transistor Q1 as three-state; The drain electrode of transistor Q2 is by a current source I1 ' ground connection (similarly, the drain electrode of transistor Q2 also can be passed through resistance or other circuit grounds in other embodiments), and the drain electrode of transistor Q2 is as the second output node B of ternary testing circuit.
Please continue to consult shown in Figure 4, the input dividing potential drop clamping circuit of ternary input detecting circuit of the present utility model comprises the 3rd power device and the 4th power device that is series between the first level node and the second electrical level node, wherein the tie point of the 3rd power device and the 4th power device is input reference voltage node N0, wherein in this embodiment, described the 3rd power device is a nmos pass transistor Q3, described the 4th power device is a PMOS transistor Q2, wherein the drain electrode of transistor Q3 is connected in the first level node VDD by a current source I0, the source electrode of transistor Q3 is connected in a reference voltage VREF input node N0, the source electrode of described transistor Q4 is connected in described reference voltage VREF input node N0, and the drain electrode of transistor Q4 is by a current source I0 ' ground connection.Wherein the grid of transistor Q3 links to each other with the grid of the transistor Q1 of input bleeder circuit, the grid of transistor Q4 links to each other with the grid of the transistor Q2 of input bleeder circuit, the electric current of input dividing potential drop clamping circuit is actually the electric current of mirror image input bleeder circuit like this, ratio between the electric current of input dividing potential drop clamping circuit and the electric current of input bleeder circuit depends on the ratio of Q1 and Q3 and Q2 and Q4, and the electric current of input dividing potential drop clamping circuit is the electric current of Q3/Q1 input bleeder circuit doubly.
Please continue to consult shown in Figure 4, described controlled current flow unit comprises the first controlled current flow unit that is connected in the first output node A, and it comprises the first voltage comparator CMP1, the first controlled switch S1; Described the first voltage comparator CMP1 is input voltage vin and the first reference voltage VTHL relatively, wherein the first reference voltage VTHL of the first voltage comparator CMP1 is low level, in the current branch of the first output node A, wherein the current branch of the first controlled switch S1 control is the current branch that current source I2 forms to described the first controlled switch S1 among this embodiment according to the output control linkage of the first voltage comparator CMP1.
The controlled current flow unit also comprises the second controlled current flow unit that is connected in the second output node B, and it comprises second voltage comparator C MP2, the second controlled switch S2; Described second voltage comparator C MP2 is input voltage vin and the second reference voltage relatively, and the second reference voltage of second voltage comparator C MP2 is high level VTHH, VTHH〉VTHL.In the current branch of the second output node B, wherein the current branch of the second controlled switch S2 control is the current branch that is formed by current source I2 ' to described the second controlled switch S2 among this embodiment according to the output control linkage of second voltage comparator C MP2.
Please continue to consult shown in Figure 4, when input voltage vin is low level, during and Vin＜VTHL, this moment voltage comparator CMP1 output signal so that controlled switch S1 disconnects, and voltage comparator CMP2 output signal is so that controlled switch S2 is closed.Because input voltage vin is low level, and the source electrode of nmos pass transistor Q1 is connected in input node N1 so the gate source voltage VGS of transistor Q1〉0, the Q1 conducting.And the source electrode of PMOS transistor Q2 is connected in input node N1, and input voltage vin is low level, so the Q2 cut-off.This moment is because transistor Q1 is conducting, and input voltage vin is low level, so the output voltage of the first output node A is low level; Because transistor Q2 is cut-off, so the second output node B is equivalent to by current source ground connection, therefore the output of the second output node B also is low level, and such the first output node A and the equal output low level of the second output node B can judge that then input voltage vin is low level.
When input voltage vin is high level, and Vin〉during VTHH, this moment voltage comparator CMP1 output signal so that controlled switch S1 is closed, and voltage comparator CMP2 output signal is so that controlled switch S2 disconnection.Because input voltage vin is high level, and the source electrode of nmos pass transistor Q1 is connected in input node N1, so the gate source voltage VGS of transistor Q1＜0, the Q1 cut-off.And the source electrode of PMOS transistor Q2 is connected in input node N1, and input voltage vin is high level, so transistor Q2 conducting.This moment is because transistor Q1 is cut-off, so the output voltage of the first output node A is the equal of the power vd D that connects by current source, so the first output node is output as high level.Because transistor Q2 is conducting, and input voltage is high level, so the second output node B is output as high level, such the first output node A and the second output node B all export high level, can judge that then input voltage vin is high level.
When input voltage is high-impedance state, Q3 and the Q4 that input the dividing potential drop clamping circuit this moment are conductings, the electric current of input dividing potential drop clamping circuit is I0, this moment Q1, the electric current of Q2 is relevant by the ratio 1:B of Q1/Q3 and Q2/Q4, electric current is B*I0, input bleeder circuit this moment and form mirror with input dividing potential drop clamping circuit, under the effect of electric current I 1, the input voltage of input node N1 can return to input reference voltage VREF, and input reference voltage VREF be one greater than low level VTHL, and less than the medium voltage of high level VTHH, so comparator C MP1 output this moment control signal makes controlled switch S1 closed, comparator C MP2 output control signal is so that controlled switch S2 is closed, and this moment transistor Q1, Q2 is all conductings also, this moment, the first output node A was output as high level, and the output of the second output node B then is low level, can judge thus that then input Vin is high-impedance state.When being input as high-impedance state, this moment, controlled switch S1 and the S2 of controlled current flow unit were closed, so that the electric current I 2 of the current branch of controlled switch S1 and S2 control is incorporated in the input bleeder circuit, the electric current that input bleeder circuit this moment is I1+I2, if input voltage vin has current perturbation, the electric current that needs to surpass I1+I2 just can make output state flip, has therefore improved the antijamming capability of circuit.That is to say, the ternary testing circuit of input of the present utility model, when input voltage is high-low level, static current sinking is also constant, when external disturbance departs from input voltage vin, maximum current that clamp current can provide improves, so electric current can in the situation that do not increase power consumption, significantly improve to antimierophonic ability.
It more than is a specific embodiment of the present utility model, in the aforementioned embodiment, the current branch of the controlled switch control of described controlled current flow circuit is the formed current branch of current source I2, see also shown in Figure 5, in another embodiment, the current branch of the first controlled switch S1 control of described controlled current flow unit also can be the current branch that is formed by the resistance R 1 that is connected between the first output node A and the high level VDD, and the current branch of the second controlled switch S2 control of described controlled current flow unit also can be the current branch that is formed by the resistance R 2 that is connected between the second output node B and the ground.
See also shown in Figure 6, in another embodiment, the current branch of the first controlled switch S1 of described controlled current flow unit control also can be the current branch that forms by being connected in transistor M1 between the first output node A and the high level VDD and resistance R 1, and the current branch that the second controlled switch S2 of described controlled current flow unit controls also can be the current branch that forms by being connected in transistor M2 between the second output node B and the ground and resistance R 2.And be to be connected by resistance R 3 between the transistor Q3 of input dividing potential drop clamping circuit and the high level VDD, be to be connected by resistance R 4 between the transistor Q4 that inputs the dividing potential drop clamping circuit and the ground.
The concrete structure of transistor Q1, Q2, Q3, Q4 is that NMOS pipe or PMOS pipe also can make up according to thinking of the present utility model in other embodiments.In addition, in the aforementioned embodiment, described transistor Q1, Q2, Q3, Q4 are mosfet transistor, also can be junction transistor in other embodiments.
Ternary input detecting circuit of the present utility model, by input dividing potential drop clamping circuit and controlled current flow unit are set, when input voltage is high-low level, static current sinking is also constant, when being input as high-impedance state, make the current potential of the input node of input bleeder circuit revert to reference voltage by input dividing potential drop clamping circuit, the electric current of control controlled current flow unit adds in the input bleeder circuit, in the situation that do not increase power consumption, significantly improve to antimierophonic ability.
Above-mentioned explanation has fully disclosed embodiment of the present utility model.It is pointed out that and be familiar with the scope that any change that the person skilled in art does embodiment of the present utility model does not all break away from claims of the present utility model.Correspondingly, the scope of claim of the present utility model also is not limited only to previous embodiment.
Claims (7)
1. ternary input detecting circuit, it comprises: the input bleeder circuit, described input bleeder circuit comprises the first power device and the second power device that is series between the first level node and the second electrical level node, wherein the tie point of the first power device and the second power device is input end, the tie point of the first power device and the first level node is the first output terminal, the tie point of the second power device and second electrical level node is the second output terminal, when input end input be high-low level the time, the first output terminal and the second output terminal output same level, when input end is high-impedance state, the first output terminal and the second output terminal output varying level, it is characterized in that: it also comprises the controlled current flow unit that is connected in the first output node and the second output node, when input end input high-low level, the electric current of described input bleeder circuit is the first electric current, when input end was high-impedance state, the electric current that input end control controlled current flow unit provides electric current to make described input bleeder circuit rose to the second electric current.
2. ternary input detecting circuit as claimed in claim 1, it is characterized in that: it also comprises input dividing potential drop clamping circuit, the electric current of the described input bleeder circuit of described input dividing potential drop clamping circuit mirror image makes the voltage of input end revert to reference voltage when input end is high-impedance state.
3. ternary input detecting circuit as claimed in claim 2, it is characterized in that: described input dividing potential drop clamping circuit comprises the 3rd power device and the 4th power device that is series between the first level node and the second electrical level node, and wherein the tie point of the 3rd power device and the 4th power device is the input reference voltage node.
4. ternary input detecting circuit as claimed in claim 3, it is characterized in that: the first power device of described input bleeder circuit is a nmos pass transistor Q1, the second power device of described input bleeder circuit is a PMOS transistor Q3, the 3rd power device of described input dividing potential drop clamping circuit is a nmos pass transistor Q0, described the 4th power device is a PMOS transistor Q2, the drain electrode of described the first power device is connected in described the first output node, source electrode is connected in described input node, the source electrode of described the second power device is connected in described input node, the drain electrode of described the second power device is connected in described the second output node, the drain electrode of the 3rd power device of described dividing potential drop clamping circuit is connected in described the first level node, source electrode is connected in described reference voltage input node, the source electrode of the 4th power device of described dividing potential drop clamping circuit is connected in described reference voltage input node, drain electrode is connected in described second electrical level node, the grid of described the first power device links to each other with the grid of described the 3rd power device, and the grid of described the second power device and the 4th power device links to each other.
5. ternary input detecting circuit as claimed in claim 1, it is characterized in that: described controlled current flow unit comprises the first controlled current flow unit that is connected in the first output node, and it comprises the first voltage comparator, the first controlled switch; Described the first voltage comparator is input voltage and the first reference voltage relatively, described the first controlled switch according to the output control linkage of the first voltage comparator in the current branch of the first output node; Described controlled current flow unit comprises the second controlled current flow unit that is connected in the second output node, and it comprises second voltage comparer, the second controlled switch; Described second voltage comparer is input voltage and the second reference voltage relatively, described the second controlled switch according to the output control linkage of second voltage comparer in the current branch of the second output node, the first reference voltage of described the first voltage comparator is low level VTHL, the second reference voltage of described second voltage comparer is high level VTHH, VTHH〉VTHL.
6. ternary input detecting circuit as claimed in claim 5 is characterized in that: the electric current that the current branch that described the first controlled switch is controlled provides for current source, or the electric current that provides of divider resistance, or the electric current that provides of transistor feedback.
7. ternary input detecting circuit as claimed in claim 1, it is characterized in that: described power device is mosfet transistor or junction transistor.
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| Application Number | Priority Date | Filing Date | Title |
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| CN 201220628265 CN202903932U (en) | 2012-11-23 | 2012-11-23 | Anti-interference three-state input detection circuit with low power consumption |
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| CN 201220628265 CN202903932U (en) | 2012-11-23 | 2012-11-23 | Anti-interference three-state input detection circuit with low power consumption |
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Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN103018588A (en) * | 2012-11-23 | 2013-04-03 | 无锡中星微电子有限公司 | Low-power-consumption anti-interference three-state input detection circuit |
| CN104808561A (en) * | 2015-04-25 | 2015-07-29 | 航天科技控股集团股份有限公司 | Multi-state switch state collection device and method |
-
2012
- 2012-11-23 CN CN 201220628265 patent/CN202903932U/en not_active Expired - Fee Related
Cited By (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN103018588A (en) * | 2012-11-23 | 2013-04-03 | 无锡中星微电子有限公司 | Low-power-consumption anti-interference three-state input detection circuit |
| CN103018588B (en) * | 2012-11-23 | 2015-03-18 | 无锡中星微电子有限公司 | Low-power-consumption anti-interference three-state input detection circuit |
| CN104808561A (en) * | 2015-04-25 | 2015-07-29 | 航天科技控股集团股份有限公司 | Multi-state switch state collection device and method |
| CN104808561B (en) * | 2015-04-25 | 2017-06-20 | 航天科技控股集团股份有限公司 | Multistate switch state collecting device and method |
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Granted publication date: 20130424 Termination date: 20151123 |