CN103094933A - Battery equalization circuit and metal oxide semiconductor (MOS) tube switching circuit - Google Patents
Battery equalization circuit and metal oxide semiconductor (MOS) tube switching circuit Download PDFInfo
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- CN103094933A CN103094933A CN2011103357089A CN201110335708A CN103094933A CN 103094933 A CN103094933 A CN 103094933A CN 2011103357089 A CN2011103357089 A CN 2011103357089A CN 201110335708 A CN201110335708 A CN 201110335708A CN 103094933 A CN103094933 A CN 103094933A
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Abstract
The invention discloses a battery equalization circuit which comprises a first capacitor, a second capacitor, a first metal oxide semiconductor (MOS) tube, a first resistor, a second MOS tube, a second resistor and a third capacitor, wherein a first end of the first capacitor receives a first voltage control signal, a first end of the second capacitor receives a second voltage control signal, a first end of the first MOS tube is connected with a second end of the first capacitor, a first end of the first resistor is connected with a first end of the first MOS tube, a second end of the first resistor is connected with a third end of the first MOS tube, a first end of the second MOS tube is connected with a second end of the second capacitor, a second end of the second MOS tube is connected with a second end of the first MOS tube, a first end of the second resistor is connected with a first end of the second MOS tube, a second end of the second resistor is connected with a third end of the second MOS tube, a first end of the third capacitor is connected with the first end of the first MOS tube, and a second end of the third capacitor is connected with a third end of the first MOS tube. The invention further provides an MOS tube switching circuit. Through the above way, circuit stability can be effectively improved by the battery equalization circuit and the MOS tube switching circuit.
Description
Technical field
The present invention relates to a kind of battery equalizing circuit, particularly relate to a kind of battery equalizing circuit and metal-oxide-semiconductor switching circuit that electric weight in the battery of series connection use is carried out equilibrium.
Background technology
In the use procedure of battery, battery is satisfied by output voltage and the larger power capacity that series connection is used to provide higher the demand that load drives usually.Yet, no matter be lithium rechargeable batteries, plumbic acid rechargeable battery or nickel-hydrogen chargeable cell, due to the restriction of its process conditions, cause may having certain difference between battery cell.Although can solve by the mode of combo the difference problem between battery cell, but after charge and discharge cycles repeatedly, still can produce larger voltage difference between battery cell, make the available capacity of series battery reduce, and then affect serviceability and the life-span of battery pack.
Therefore, need to provide a kind of battery equalizing circuit, to solve the difference problem between the battery cell that in prior art, series connection is used.
Summary of the invention
The technical problem that the present invention mainly solves is to provide a kind of battery equalizing circuit and metal-oxide-semiconductor switching circuit, to improve circuit stability.
For solving the problems of the technologies described above, the technical scheme that the present invention adopts is: a kind of battery equalizing circuit is provided, comprises: the first electric capacity, and the first end of the first electric capacity receives the first voltage control signal; The second electric capacity, the first end of the second electric capacity receives the second voltage control signal; The first metal-oxide-semiconductor, the first end of the first metal-oxide-semiconductor connects the second end of the first electric capacity; The first resistance, the first end of the first resistance connects the first end of the first metal-oxide-semiconductor, and the second end of the first resistance connects the 3rd end of the first metal-oxide-semiconductor, so that the selectivity conducting under the effect of the first voltage control signal of the second end of the first metal-oxide-semiconductor and the 3rd end; The second metal-oxide-semiconductor, the first end of the second metal-oxide-semiconductor connects the second end of the second electric capacity, and the second end of the second metal-oxide-semiconductor connects the second end of the first metal-oxide-semiconductor; The second resistance, the first end of the second resistance connects the first end of the second metal-oxide-semiconductor, and the second end of the second resistance connects the 3rd end of the second metal-oxide-semiconductor, so that the selectivity conducting under the effect of second voltage control signal of the second end of the second metal-oxide-semiconductor and the 3rd end; The 3rd electric capacity, the first end of the 3rd electric capacity connects the first end of the first metal-oxide-semiconductor, and the second end of the 3rd electric capacity connects the 3rd end of the first metal-oxide-semiconductor.
According to one preferred embodiment of the present invention, the 3rd end of the first metal-oxide-semiconductor connects the positive pole of the first battery, and the 3rd end of the second metal-oxide-semiconductor connects the negative pole of the second battery, and the negative pole of the first battery is connected with the positive pole of the second battery.
According to one preferred embodiment of the present invention, battery equalizing circuit further comprises: inductance, the first end of inductance is connected between the positive pole of the negative pole of the first battery and the second battery, and the second end of inductance is connected between the second end of the second end of the first metal-oxide-semiconductor and the second metal-oxide-semiconductor.
According to one preferred embodiment of the present invention, battery equalizing circuit further comprises: the first diode, and the positive pole of the first diode connects the second end of inductance, and the negative pole of the first diode connects the positive pole of the first battery; The second diode, the negative pole of the second diode connects the second end of inductance, and the positive pole of the second diode connects the negative pole of the second battery.
According to one preferred embodiment of the present invention, the first metal-oxide-semiconductor is P type metal-oxide-semiconductor, and the first end of the first metal-oxide-semiconductor, the second end and the 3rd end are respectively grid, drain electrode and the source electrode of P type metal-oxide-semiconductor.
According to one preferred embodiment of the present invention, the second metal-oxide-semiconductor is the N-type metal-oxide-semiconductor, and the first end of the second metal-oxide-semiconductor, the second end and the 3rd end are respectively grid, drain electrode and the source electrode of N-type metal-oxide-semiconductor.
For solving the problems of the technologies described above, another technical solution used in the present invention is: a kind of metal-oxide-semiconductor switching circuit is provided, comprises: the first electric capacity, and the first end of the first electric capacity receives the first voltage control signal; The second electric capacity, the first end of the second electric capacity receives the second voltage control signal; The first metal-oxide-semiconductor, the first end of the first metal-oxide-semiconductor connects the second end of the first electric capacity; The first resistance, the first end of the first resistance connects the first end of the first metal-oxide-semiconductor, and the second end of the first resistance connects the 3rd end of the first metal-oxide-semiconductor, so that the selectivity conducting under the effect of the first voltage control signal of the second end of the first metal-oxide-semiconductor and the 3rd end; The second metal-oxide-semiconductor, the first end of the second metal-oxide-semiconductor connects the second end of the second electric capacity, and the second end of the second metal-oxide-semiconductor connects the second end of the first metal-oxide-semiconductor; The second resistance, the first end of the second resistance connects the first end of the second metal-oxide-semiconductor, and the second end of the second resistance connects the 3rd end of the second metal-oxide-semiconductor, so that the selectivity conducting under the effect of second voltage control signal of the second end of the second metal-oxide-semiconductor and the 3rd end; The 3rd electric capacity, the first end of the 3rd electric capacity connects the first end of the first metal-oxide-semiconductor, and the second end of the 3rd electric capacity connects the 3rd end of the first metal-oxide-semiconductor.
According to one preferred embodiment of the present invention, the 3rd end of the first metal-oxide-semiconductor connects the positive pole of the first battery, and the 3rd end of the second metal-oxide-semiconductor connects the negative pole of the second battery, and the negative pole of the first battery is connected with the positive pole of the second battery.
According to one preferred embodiment of the present invention, the first metal-oxide-semiconductor is P type metal-oxide-semiconductor, and the first end of the first metal-oxide-semiconductor, the second end and the 3rd end are respectively grid, drain electrode and the source electrode of P type metal-oxide-semiconductor.
According to one preferred embodiment of the present invention, the second metal-oxide-semiconductor is the N-type metal-oxide-semiconductor, and the first end of the second metal-oxide-semiconductor, the second end and the 3rd end are respectively grid, drain electrode and the source electrode of N-type metal-oxide-semiconductor.
The invention has the beneficial effects as follows: be different from the situation of prior art, battery equalizing circuit provided by the invention and metal-oxide-semiconductor switching circuit can improve circuit stability effectively.
Description of drawings
Fig. 1 is the circuit diagram according to the battery equalizing circuit of first embodiment of the invention;
Fig. 2 is the circuit diagram according to the battery equalizing circuit of second embodiment of the invention;
Fig. 3 is the circuit diagram according to the battery equalizing circuit of third embodiment of the invention;
Fig. 4 is the circuit diagram according to the battery equalizing circuit of fourth embodiment of the invention;
Fig. 5 is the circuit diagram according to the battery equalizing circuit of fifth embodiment of the invention;
Fig. 6 is the oscillogram according to the battery equalizing circuit of third embodiment of the invention and the 5th embodiment;
Fig. 7 is another oscillogram according to the battery equalizing circuit of third embodiment of the invention and the 5th embodiment.
Embodiment
See also Fig. 1, Fig. 1 is according to the circuit diagram of the battery equalizing circuit of first embodiment of the invention.In the present embodiment, battery BT1, BT2 are connected in series.Specifically, the negative pole of battery BT1 is connected with the positive pole of battery BT2.The battery equalizing circuit of the present embodiment comprises K switch 1, K2, inductance L 1 and diode D1, D2.
In the present embodiment, K switch 1 comprises first end, the second end and the 3rd end.The first end of K switch 1 is used for receiving the first control signal CTL1, so that the selectivity conducting under the effect of the first control signal CTL1 of the second end of K switch 1 and the 3rd end.The 3rd end of K switch 1 further is connected with the positive pole of battery BT1.
In the present embodiment, K switch 2 comprises first end, the second end and the 3rd end equally.The first end of K switch 2 is used for receiving the second control signal CTL2, so that the selectivity conducting under the effect of the second control signal CTL2 of the second end of K switch 2 and the 3rd end.The second end of K switch 2 further is connected with the second end of K switch 1, and the 3rd end of K switch 2 further is connected with the negative pole of battery BT2.
In the present embodiment, the first end of inductance L 1 is connected between the positive pole of the negative pole of battery BT1 and battery BT2, and the second end of inductance L 1 is connected between the second end of the second end of K switch 1 and K switch 2.
In the present embodiment, the positive pole of diode D1 connects the second end of inductance L 1, and the negative pole of diode D1 connects the positive pole of battery BT1.The negative pole of diode D2 connects the second end of inductance L 1, and the positive pole of diode D2 connects the negative pole of battery BT2.
In use, when the voltage of the voltage that battery BT1 detected higher than battery BT2, in the time of the electric weight of battery BT1 need to being transferred to battery BT2, make the second end and the conducting under the effect of the first control signal CTL1 of the 3rd end of K switch 1 by controlling the first control signal CTL1, battery BT1 charges to inductance L 1, and then the electric weight of battery BT1 is stored in inductance L 1.Subsequently, make the second end of K switch 1 and the 3rd end disconnect under the effect of the first control signal CTL1 by controlling the first control signal CTL1.At this moment, the electric weight of inductance L 1 storage is transferred to battery BT2 through diode D2.Otherwise, when the voltage of the voltage that battery BT2 detected higher than battery BT1, in the time of the electric weight of battery BT2 need to being transferred to battery BT1, make the second end and the conducting under the effect of the second control signal CTL2 of the 3rd end of K switch 2 by controlling the second control signal CTL2, battery BT2 charges to inductance L 1, and then the electric weight of battery BT2 is stored in inductance L 1.Subsequently, make the second end of K switch 2 and the 3rd end disconnect under the effect of the second control signal CTL2 by controlling the second control signal CTL2.At this moment, the electric weight of inductance L 1 storage is transferred to battery BT1 through diode D1.
In the present embodiment, diode D1, D2 can be general-purpose diode, Schottky diode, Transient Suppression Diode (TVS), voltage stabilizing didoe or other one-way conduction elements.
See also Fig. 2, Fig. 2 is the circuit diagram according to the battery equalizing circuit of second embodiment of the invention.In the present embodiment, battery BT1, BT2 are connected in series.Specifically, the negative pole of battery BT1 is connected with the positive pole of battery BT2.The battery equalizing circuit of the present embodiment comprises K switch 1, K2, inductance L 1, diode D1, D2 and capacitor C 1, C2.The difference part of the present embodiment and the first embodiment shown in Figure 1 is: the battery equalizing circuit of the present embodiment further comprises capacitor C 1, C2, and wherein capacitor C 1 is in parallel with battery BT1, and capacitor C 2 is in parallel with battery BT2.The effect of capacitor C 1, C2 is at 1 couple of battery BT1 of inductance L, plays certain cushioning effect when BT2 charges, and improves the charging effect of battery BT1, BT2.
See also Fig. 3, Fig. 3 is the circuit diagram according to the battery equalizing circuit of third embodiment of the invention.In the present embodiment, battery BT1, BT2 are connected in series.Specifically, the negative pole of battery BT1 is connected with the positive pole of battery BT2.The battery equalizing circuit of the present embodiment comprises capacitor C 1, C2, metal-oxide-semiconductor Q1, Q2, resistance R 1, R2, inductance L 1 and diode D1, D2.
In the present embodiment, the first end of capacitor C 1 receives the first control signal CTL1, and the first end of metal-oxide-semiconductor Q1 connects the second end of capacitor C 1.In the present embodiment, the first control signal CTL1 is specially the first voltage control signal CTL1.The 3rd end of metal-oxide-semiconductor Q1 further is connected with the positive pole of battery BT1.The first end of resistance R 1 connects the first end of metal-oxide-semiconductor Q1, and the second end of resistance R 1 connects the 3rd end of metal-oxide-semiconductor Q1.Thus, the second end of metal-oxide-semiconductor Q1 and the 3rd end can selectivity conductings under the effect of the first voltage control signal CTL1.In the present embodiment, metal-oxide-semiconductor Q1 is P type metal-oxide-semiconductor, and the first end of metal-oxide-semiconductor Q1, the second end and the 3rd end are respectively grid, drain electrode and the source electrode of P type metal-oxide-semiconductor.
In the present embodiment, the first end of capacitor C 2 receives the second control signal CTL2, and the first end of metal-oxide-semiconductor Q2 connects the second end of capacitor C 2.In the present embodiment, the second control signal CTL2 is specially second voltage control signal CTL2.The second end of metal-oxide-semiconductor Q2 further is connected with the second end of metal-oxide-semiconductor Q1, and the 3rd end of metal-oxide-semiconductor Q2 further is connected with the negative pole of battery BT2.The second end of inductance L 1 is connected between the second end of the second end of metal-oxide-semiconductor Q1 and metal-oxide-semiconductor Q2.The first end of resistance R 2 connects the first end of metal-oxide-semiconductor Q2, and the second end of resistance R 2 connects the 3rd end of metal-oxide-semiconductor Q2.Thus, the second end of metal-oxide-semiconductor Q2 and the 3rd end can selectivity conductings under the effect of second voltage control signal CTL2.In the present embodiment, metal-oxide-semiconductor Q2 is the N-type metal-oxide-semiconductor, and the first end of metal-oxide-semiconductor Q2, the second end and the 3rd end are respectively grid, drain electrode and the source electrode of N-type metal-oxide-semiconductor.
Can find from the comparative result of Fig. 1 and Fig. 3, the capacitor C 1 in the 3rd embodiment, metal-oxide-semiconductor Q1 and resistance R 1 play the effect of the K switch 1 of the first embodiment, and capacitor C 2, metal-oxide-semiconductor Q2 and resistance R 2 play the effect of the K switch 2 of the first embodiment.Certainly, those skilled in the art can expect utilizing other switches well known in the art to realize the effect of K switch 1, K2 fully, for example triode switch or relay switch.
See also Fig. 4, Fig. 4 is according to the circuit diagram of the battery equalizing circuit of fourth embodiment of the invention.In the present embodiment, battery BT1, BT2 are connected in series.Specifically, the negative pole of battery BT1 is connected with the positive pole of battery BT2.The battery equalizing circuit of the present embodiment comprises capacitor C 1, C2, C3, metal-oxide-semiconductor Q1, Q2, resistance R 1, R2, inductance L 1 and diode D1, D2.The difference part of the present embodiment and the 3rd embodiment shown in Figure 3 is: the battery equalizing circuit of the present embodiment further arranges capacitor C 3, and wherein the first end of capacitor C 3 connects the first end of metal-oxide-semiconductor Q1, and the second end of capacitor C 3 connects the 3rd end of metal-oxide-semiconductor Q1.
Further describe the function of capacitor C 3 below in conjunction with Fig. 3 and Fig. 4.See also Fig. 3, in the 3rd embodiment shown in Figure 3, when driven MOS pipe Q2 worked, second voltage control signal CTL2 produced the pulse signal of certain frequency at the first end of metal-oxide-semiconductor Q2 by capacitor C 2, and then controlled conducting and the disconnection of metal-oxide-semiconductor Q2.The pulse signal that can cause producing at the second end of metal-oxide-semiconductor Q2 same frequency due to the conducting of metal-oxide-semiconductor Q2 and disconnection.Simultaneously, because the second end of metal-oxide-semiconductor Q2 is connected with the second end of metal-oxide-semiconductor Q1, and there is junction capacitance between the first end of metal-oxide-semiconductor Q1 and the second end and first end and the 3rd end, therefore will produce the effect of capacitance partial pressure, the pulse voltage division signal of a same frequency of appearance between the first end that makes metal-oxide-semiconductor Q1 and the 3rd end.When the electric current of the metal-oxide-semiconductor Q2 that flows through was enough large, the amplitude of the pulse voltage division signal between the first end of metal-oxide-semiconductor Q1 and the 3rd end was enough to metal-oxide-semiconductor Q1 is opened, and makes the second end and the 3rd end conducting of metal-oxide-semiconductor Q1.At this moment, because metal-oxide-semiconductor Q1, Q2 open simultaneously, cause short circuit, therefore can burn out metal-oxide-semiconductor Q1, Q2.
In the present embodiment, the first end of capacitor C 3 connects the first end of metal-oxide-semiconductor Q1, the second end of capacitor C 3 connects the 3rd end of metal-oxide-semiconductor Q1, is equivalent to the first end of metal-oxide-semiconductor Q1 in parallelly with capacitor C 3 with the junction capacitance between the 3rd end, causes the capacitance increase after parallel connection.According to principle of capacitive divider, capacitance partial pressure and capacitance are inversely proportional to, and therefore make the first end of metal-oxide-semiconductor Q1 and the amplitude of the pulse voltage division signal between the 3rd end diminish, and then guarantee to open metal-oxide-semiconductor Q1, have improved the stability of battery equalizing circuit.
In like manner, in the 4th embodiment shown in Figure 4, when driven MOS pipe Q1 works, the pulse voltage division signal of a same frequency can appear also between the first end of metal-oxide-semiconductor Q2 and the 3rd end.Therefore, can reduce the first end of metal-oxide-semiconductor Q2 and the capacitance partial pressure between the 3rd end at a same electric capacity in parallel between the first end of metal-oxide-semiconductor Q2 and the 3rd end, and then the stability of raising battery equalizing circuit.
See also Fig. 5, Fig. 5 is the circuit diagram according to the battery equalizing circuit of fifth embodiment of the invention.In the present embodiment, battery BT1, BT2 are connected in series.Specifically, the negative pole of battery BT1 is connected with the positive pole of battery BT2.The battery equalizing circuit of the present embodiment comprises capacitor C 1, C2, metal-oxide-semiconductor Q1, Q2, resistance R 1, R2, inductance L 1 and diode D1, D2, D3, D4.The difference part of the present embodiment and the 3rd embodiment shown in Figure 3 is: the battery equalizing circuit of the present embodiment further arranges diode D3, D4, wherein the positive pole of diode D3 connects the grid of metal-oxide-semiconductor Q1, the negative pole of diode D3 connects the source electrode of metal-oxide-semiconductor Q1, the negative pole of diode D4 connects the grid of metal-oxide-semiconductor Q2, and the positive pole of diode D4 connects the source electrode of metal-oxide-semiconductor Q2.
Further describe the function of diode D3, D4 below in conjunction with Fig. 3,5-7.See also Fig. 6-7, as shown in the waveform 4 of the waveform 1 of Fig. 6 and Fig. 7, in battery equalizing circuit shown in Figure 3, the first voltage control signal CTL1 and second voltage control signal CTL2 that capacitor C 1, C2 receive are respectively the pulse signal that comprises high level signal (5V) and low level signal (0V).Wherein, when the first voltage control signal CTL1 is low level signal, the second end of metal-oxide-semiconductor Q1 and the 3rd end conducting, when the first voltage control signal CTL1 was high level signal, the second end of metal-oxide-semiconductor Q1 and the 3rd end disconnected.When second voltage control signal CTL2 is high level signal, the second end of metal-oxide-semiconductor Q2 and the 3rd end conducting, when second voltage control signal CTL2 was low level signal, the second end of metal-oxide-semiconductor Q2 and the 3rd end disconnected.
Specifically, as shown in the waveform 1 and waveform 2 of Fig. 6, when metal-oxide-semiconductor Q1 does not work, the high level signal of the first voltage control signal CTL1 that capacitor C 1 receives for continuing.At this moment, the grid voltage of metal-oxide-semiconductor Q1 equals the source voltage Vs1 of metal-oxide-semiconductor Q1, metal-oxide-semiconductor Q1 cut-off.When needs were opened metal-oxide-semiconductor Q1, the first voltage control signal CTL1 that capacitor C 1 receives jumped to low level signal from the high level signal that continues, and the grid voltage of metal-oxide-semiconductor Q1 is from the Vs1 instantaneous abrupt change to Vs1-5V.At this moment, the source voltage Vs1 of metal-oxide-semiconductor Q1 makes metal-oxide-semiconductor Q1 open higher than the grid voltage of metal-oxide-semiconductor Q1, and then the drain electrode conducting of the source electrode of metal-oxide-semiconductor Q1 and metal-oxide-semiconductor Q1.Meanwhile, capacitor C 1 is charged by resistance R 1, makes the grid voltage of metal-oxide-semiconductor Q1 slowly raise from Vs1-5V.When needs were closed metal-oxide-semiconductor Q1, the first voltage control signal CTL1 that capacitor C 1 receives jumped to high level signal from low level signal, the grid voltage of the metal-oxide-semiconductor Q1 saltus step 5V that makes progress.At this moment, the voltage difference between the grid voltage of the source voltage of metal-oxide-semiconductor Q1 and metal-oxide-semiconductor Q1 is not enough to open metal-oxide-semiconductor Q1, make metal-oxide-semiconductor Q1 cut-off, and then the drain electrode of the source electrode of metal-oxide-semiconductor Q1 and metal-oxide-semiconductor Q1 disconnects.Meanwhile, capacitor C 1 is discharged by resistance R 1, makes the grid voltage slow decreasing of metal-oxide-semiconductor Q1.Yet, by as shown in the waveform 2 of Fig. 6, when the effective duty cycle of the first voltage control signal CTL1 constantly increases (surpassing 50%), due to the discharge time greater than capacitor C 1 charging interval of capacitor C 1, cause the grid voltage of metal-oxide-semiconductor Q1 to continue to raise, to such an extent as to when the first voltage control signal CTL1 was low level signal, the voltage difference between the source voltage of the grid voltage of metal-oxide-semiconductor Q1 and metal-oxide-semiconductor Q1 also can't normally be opened metal-oxide-semiconductor Q1, caused metal-oxide-semiconductor Q1 to work.
In like manner, as shown in the waveform 4 and waveform 5 of Fig. 7, when metal-oxide-semiconductor Q2 does not work, the low level signal of the second voltage control signal CTL2 that capacitor C 2 receives for continuing.At this moment, the grid voltage of metal-oxide-semiconductor Q2 equals the source voltage Vs2 of metal-oxide-semiconductor Q2, metal-oxide-semiconductor Q2 cut-off.When needs were opened metal-oxide-semiconductor Q2, the second voltage control signal CTL2 that capacitor C 2 receives jumped to high level signal from the low level signal that continues, and the grid voltage of metal-oxide-semiconductor Q2 jumps to Vs2+5V from Vs2.At this moment, the source voltage of metal-oxide-semiconductor Q2 makes metal-oxide-semiconductor Q2 open lower than the grid voltage of metal-oxide-semiconductor Q2, and then the drain electrode conducting of the source electrode of metal-oxide-semiconductor Q2 and metal-oxide-semiconductor Q2.With this simultaneously, capacitor C 2 is charged by resistance R 2, makes the grid voltage of metal-oxide-semiconductor Q2 slowly reduce from Vs2+5V.When needs are closed metal-oxide-semiconductor Q2, when the second voltage control signal CTL2 that capacitor C 2 receives jumps to low level signal from high level signal, the downward saltus step 5V of the grid voltage of metal-oxide-semiconductor Q2.At this moment, between the source voltage of the grid voltage of metal-oxide-semiconductor Q2 and metal-oxide-semiconductor Q2, voltage difference is not enough to open metal-oxide-semiconductor Q2, metal-oxide-semiconductor Q2 cut-off, and then the drain electrode of the source electrode of metal-oxide-semiconductor Q2 and metal-oxide-semiconductor Q2 disconnects.Meanwhile, capacitor C 2 is discharged by resistance R 2, makes the grid voltage of metal-oxide-semiconductor Q2 slowly raise.Yet, by as shown in the waveform 5 of Fig. 7, when the effective duty cycle of second voltage control signal CTL2 constantly increases (surpassing 50%), due to the discharge time greater than capacitor C 2 charging interval of capacitor C 2, cause the grid voltage of metal-oxide-semiconductor Q2 to continue to reduce, to such an extent as to when second voltage control signal CTL2 was high level signal, the voltage difference between the source voltage of the grid voltage of metal-oxide-semiconductor Q2 and metal-oxide-semiconductor Q2 also can't be opened metal-oxide-semiconductor Q2, caused metal-oxide-semiconductor Q2 to work.
As shown in Figure 5, in the present embodiment, the positive pole of diode D3 connects the grid of metal-oxide-semiconductor Q1, and the negative pole of diode D3 connects the source electrode of metal-oxide-semiconductor Q1.At this moment, as shown in the waveform 3 of Fig. 6, when the first voltage control signal CTL1 jumps to low level signal from high level signal, due to the grid voltage of the metal-oxide-semiconductor Q1 source voltage lower than metal-oxide-semiconductor Q1, make diode D3 cut-off disconnect, capacitor C 1 is slowly charged by resistance R 1.When the first voltage control signal CTL1 jumps to high level signal from low level signal, due to the grid voltage of the metal-oxide-semiconductor Q1 source voltage greater than metal-oxide-semiconductor Q1, make diode D3 conducting.At this moment, capacitor C 1 is discharged rapidly by diode D3, with the source voltage of the quick clamper of the grid voltage of metal-oxide-semiconductor Q1 to metal-oxide-semiconductor Q1.Specifically, when voltage difference between the source voltage of the grid voltage of metal-oxide-semiconductor Q1 and metal-oxide-semiconductor Q1 during greater than the conducting voltage of diode D3, diode D3 conducting, capacitor C 1 is discharged rapidly by diode D3.When voltage difference between the source voltage of the grid voltage of metal-oxide-semiconductor Q1 and metal-oxide-semiconductor Q1 equals and during less than the conducting voltage of diode D3, diode D3 ends disconnection, capacitor C 1 is slowly discharged by resistance R 1.
In like manner, as shown in Figure 5, in the present embodiment, the negative pole of diode D4 connects the grid of metal-oxide-semiconductor Q2, and the positive pole of diode D4 connects the source electrode of metal-oxide-semiconductor Q2.At this moment, as shown in the waveform 6 of Fig. 7, when second voltage control signal CTL2 jumps to high level signal from low level signal, due to the grid voltage of the metal-oxide-semiconductor Q2 source voltage higher than metal-oxide-semiconductor Q2, make diode D4 cut-off disconnect, capacitor C 4 is slowly charged by resistance R 2.When second voltage control signal CTL2 jumps to low level signal from high level signal, due to the source voltage of the metal-oxide-semiconductor Q2 grid voltage greater than metal-oxide-semiconductor Q2, make diode D4 conducting.At this moment, capacitor C 2 is discharged rapidly by diode D4, with the source voltage of the quick clamper of the grid voltage of metal-oxide-semiconductor Q2 to metal-oxide-semiconductor Q2.Specifically, when voltage difference between the grid voltage of the source voltage of metal-oxide-semiconductor Q2 and metal-oxide-semiconductor Q2 during greater than the conducting voltage of diode D4, diode D4 conducting, capacitor C 2 is discharged rapidly by diode D4.When voltage difference between the source voltage of the grid voltage of metal-oxide-semiconductor Q2 and metal-oxide-semiconductor Q2 equals and during less than the conducting voltage of diode D3, diode D3 ends disconnection, capacitor C 2 is slowly discharged by resistance R 2.
By the way, utilize the clamping action of diode D3, D4, avoided to work because effective duty cycle increases the capacitor C 1, insufficient metal-oxide-semiconductor Q1, the Q2 that causes of C2 discharge that produce.
In the present embodiment, diode D3, D4 can be general-purpose diode, Schottky diode, Transient Suppression Diode (TVS), voltage stabilizing didoe or other one-way conduction elements.
At preferred embodiment, diode D3 adopts voltage stabilizing didoe.The further effect of this voltage stabilizing didoe is: when source electrode moment of metal-oxide-semiconductor Q1 powered on, the voltage stabilizing didoe reverse-conducting was with the grid voltage clamper of the metal-oxide-semiconductor Q1 source voltage to metal-oxide-semiconductor Q1.At this moment, less than the source electrode of metal-oxide-semiconductor Q1 and the withstand voltage between grid, therefore avoided when moment powers on source electrode and the grid of the metal-oxide-semiconductor Q1 that causes greater than withstand voltage due to voltage difference between the source electrode of metal-oxide-semiconductor Q1 and grid breakdown due to the voltage difference at voltage stabilizing didoe two ends.
In other embodiments, voltage stabilizing didoe also can be realized by other clamper elements, for example unidirectional TVS, two-way TVS or piezo-resistance, only need guarantee when source electrode moment of metal-oxide-semiconductor Q1 powers on clamper element can conducting and during conducting the voltage difference at clamper element two ends get final product less than the source electrode of metal-oxide-semiconductor Q1 and the withstand voltage between grid.It should be noted that and to realize the repid discharge to capacitor C 1 as described above in the situation that adopt separately piezo-resistance, therefore can realize simultaneously above-mentioned two effects with piezo-resistance is in parallel with general-purpose diode.
After reading foregoing, those skilled in the art can expect above-described embodiment is carried out combination fully, or are converted on other similar metal-oxide-semiconductor switching circuits.
By with upper type, battery equalizing circuit of the present invention is the balancing battery electric weight effectively, thereby improves the life-span of battery pack.In addition, this battery equalizing circuit and metal-oxide-semiconductor switching circuit improve the job stability of circuit.
These are only embodiments of the invention; not thereby limit the scope of the claims of the present invention; every equivalent structure or equivalent flow process conversion that utilizes specification of the present invention and accompanying drawing content to do; or directly or indirectly be used in other relevant technical fields, all in like manner be included in scope of patent protection of the present invention.
Claims (10)
1. a battery equalizing circuit, is characterized in that, comprising:
The first electric capacity, the first end of described the first electric capacity receives the first voltage control signal;
The second electric capacity, the first end of described the second electric capacity receives the second voltage control signal;
The first metal-oxide-semiconductor, the first end of described the first metal-oxide-semiconductor connects the second end of described the first electric capacity;
The first resistance, the first end of described the first resistance connects the first end of described the first metal-oxide-semiconductor, the second end of described the first resistance connects the 3rd end of described the first metal-oxide-semiconductor, so that the selectivity conducting under the effect of described the first voltage control signal of the second end of described the first metal-oxide-semiconductor and the 3rd end;
The second metal-oxide-semiconductor, the first end of described the second metal-oxide-semiconductor connects the second end of described the second electric capacity, and the second end of described the second metal-oxide-semiconductor connects the second end of described the first metal-oxide-semiconductor;
The second resistance, the first end of described the second resistance connects the first end of described the second metal-oxide-semiconductor, the second end of described the second resistance connects the 3rd end of described the second metal-oxide-semiconductor, so that the selectivity conducting under the effect of described second voltage control signal of the second end of described the second metal-oxide-semiconductor and the 3rd end;
The 3rd electric capacity, the first end of described the 3rd electric capacity connects the first end of described the first metal-oxide-semiconductor, and the second end of described the 3rd electric capacity connects the 3rd end of described the first metal-oxide-semiconductor.
2. battery equalizing circuit according to claim 1, it is characterized in that, the 3rd end of described the first metal-oxide-semiconductor connects the positive pole of the first battery, and the 3rd end of described the second metal-oxide-semiconductor connects the negative pole of described the second battery, and the negative pole of described the first battery is connected with the positive pole of described the second battery.
3. battery equalizing circuit according to claim 2, is characterized in that, described battery equalizing circuit further comprises:
Inductance, the first end of described inductance are connected between the positive pole of the negative pole of described the first battery and described the second battery, and the second end of described inductance is connected between the second end of the second end of described the first metal-oxide-semiconductor and described the second metal-oxide-semiconductor.
4. battery equalizing circuit according to claim 3, is characterized in that, described battery equalizing circuit further comprises:
The first diode, the positive pole of described the first diode connects the second end of described inductance, and the negative pole of described the first diode connects the positive pole of described the first battery;
The second diode, the negative pole of described the second diode connects the second end of described inductance, and the positive pole of described the second diode connects the negative pole of described the second battery.
5. battery equalizing circuit according to claim 1, is characterized in that, described the first metal-oxide-semiconductor is P type metal-oxide-semiconductor, and the first end of described the first metal-oxide-semiconductor, the second end and the 3rd end are respectively grid, drain electrode and the source electrode of described P type metal-oxide-semiconductor.
6. battery equalizing circuit according to claim 5, is characterized in that, described the second metal-oxide-semiconductor is the N-type metal-oxide-semiconductor, and the first end of described the second metal-oxide-semiconductor, the second end and the 3rd end are respectively grid, drain electrode and the source electrode of described N-type metal-oxide-semiconductor.
7. a metal-oxide-semiconductor switching circuit, is characterized in that, comprising:
The first electric capacity, the first end of described the first electric capacity receives the first voltage control signal;
The second electric capacity, the first end of described the second electric capacity receives the second voltage control signal;
The first metal-oxide-semiconductor, the first end of described the first metal-oxide-semiconductor connects the second end of described the first electric capacity;
The first resistance, the first end of described the first resistance connects the first end of described the first metal-oxide-semiconductor, the second end of described the first resistance connects the 3rd end of described the first metal-oxide-semiconductor, so that the selectivity conducting under the effect of described the first voltage control signal of the second end of described the first metal-oxide-semiconductor and the 3rd end;
The second metal-oxide-semiconductor, the first end of described the second metal-oxide-semiconductor connects the second end of described the second electric capacity, and the second end of described the second metal-oxide-semiconductor connects the second end of described the first metal-oxide-semiconductor;
The second resistance, the first end of described the second resistance connects the first end of described the second metal-oxide-semiconductor, the second end of described the second resistance connects the 3rd end of described the second metal-oxide-semiconductor, so that the selectivity conducting under the effect of described second voltage control signal of the second end of described the second metal-oxide-semiconductor and the 3rd end;
The 3rd electric capacity, the first end of described the 3rd electric capacity connects the first end of described the first metal-oxide-semiconductor, and the second end of described the 3rd electric capacity connects the 3rd end of described the first metal-oxide-semiconductor.
8. metal-oxide-semiconductor switching circuit according to claim 7, it is characterized in that, the 3rd end of described the first metal-oxide-semiconductor connects the positive pole of the first battery, and the 3rd end of described the second metal-oxide-semiconductor connects the negative pole of described the second battery, and the negative pole of described the first battery is connected with the positive pole of described the second battery.
9. metal-oxide-semiconductor switching circuit according to claim 7, is characterized in that, described the first metal-oxide-semiconductor is P type metal-oxide-semiconductor, and the first end of described the first metal-oxide-semiconductor, the second end and the 3rd end are respectively grid, drain electrode and the source electrode of described P type metal-oxide-semiconductor.
10. metal-oxide-semiconductor switching circuit according to claim 9, is characterized in that, described the second metal-oxide-semiconductor is the N-type metal-oxide-semiconductor, and the first end of described the second metal-oxide-semiconductor, the second end and the 3rd end are respectively grid, drain electrode and the source electrode of described N-type metal-oxide-semiconductor.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
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| CN2011103357089A CN103094933A (en) | 2011-10-28 | 2011-10-28 | Battery equalization circuit and metal oxide semiconductor (MOS) tube switching circuit |
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| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN2011103357089A CN103094933A (en) | 2011-10-28 | 2011-10-28 | Battery equalization circuit and metal oxide semiconductor (MOS) tube switching circuit |
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| CN103094933A true CN103094933A (en) | 2013-05-08 |
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| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN2011103357089A Pending CN103094933A (en) | 2011-10-28 | 2011-10-28 | Battery equalization circuit and metal oxide semiconductor (MOS) tube switching circuit |
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| CN (1) | CN103094933A (en) |
Cited By (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN103259298A (en) * | 2012-02-17 | 2013-08-21 | 东莞钜威新能源有限公司 | Battery equalization circuit and MOS transistor switching circuit |
| CN105140992A (en) * | 2015-08-31 | 2015-12-09 | 卢小明 | Battery electric quantity equalization system |
| CN107785961A (en) * | 2017-10-27 | 2018-03-09 | 努比亚技术有限公司 | A kind of series-connected cell charging method, mobile terminal and computer-readable medium |
| CN111342152A (en) * | 2020-03-06 | 2020-06-26 | 温州大学 | Composite battery pack equalization circuit |
Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2008017605A (en) * | 2006-07-05 | 2008-01-24 | Fdk Corp | Voltage balancing correction circuit of series cell |
| CN102157972A (en) * | 2011-05-18 | 2011-08-17 | 上海恒动汽车电池有限公司 | Lithium-ion battery pack equilibrium system and equilibrium method thereof |
| CN202363919U (en) * | 2011-10-28 | 2012-08-01 | 东莞钜威新能源有限公司 | Battery equalization circuit and MOS (metal oxide semiconductor) tube switching circuit |
-
2011
- 2011-10-28 CN CN2011103357089A patent/CN103094933A/en active Pending
Patent Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2008017605A (en) * | 2006-07-05 | 2008-01-24 | Fdk Corp | Voltage balancing correction circuit of series cell |
| CN102157972A (en) * | 2011-05-18 | 2011-08-17 | 上海恒动汽车电池有限公司 | Lithium-ion battery pack equilibrium system and equilibrium method thereof |
| CN202363919U (en) * | 2011-10-28 | 2012-08-01 | 东莞钜威新能源有限公司 | Battery equalization circuit and MOS (metal oxide semiconductor) tube switching circuit |
Non-Patent Citations (1)
| Title |
|---|
| 连孝藩: ""浅谈光耦ACPL_332J在变频器中的应用"", 《仪表技术》, no. 2, 28 February 2010 (2010-02-28) * |
Cited By (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN103259298A (en) * | 2012-02-17 | 2013-08-21 | 东莞钜威新能源有限公司 | Battery equalization circuit and MOS transistor switching circuit |
| CN105140992A (en) * | 2015-08-31 | 2015-12-09 | 卢小明 | Battery electric quantity equalization system |
| CN107785961A (en) * | 2017-10-27 | 2018-03-09 | 努比亚技术有限公司 | A kind of series-connected cell charging method, mobile terminal and computer-readable medium |
| CN107785961B (en) * | 2017-10-27 | 2021-11-02 | 努比亚技术有限公司 | Series battery charging method, mobile terminal and computer readable medium |
| CN111342152A (en) * | 2020-03-06 | 2020-06-26 | 温州大学 | Composite battery pack equalization circuit |
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Application publication date: 20130508 |