CN202564975U - Battery equalization circuit and MOS tube switching circuit - Google Patents
Battery equalization circuit and MOS tube switching circuit Download PDFInfo
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- CN202564975U CN202564975U CN2012200541121U CN201220054112U CN202564975U CN 202564975 U CN202564975 U CN 202564975U CN 2012200541121 U CN2012200541121 U CN 2012200541121U CN 201220054112 U CN201220054112 U CN 201220054112U CN 202564975 U CN202564975 U CN 202564975U
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Abstract
The utility model discloses a battery equalization circuit comprising a capacitance, an MOS tube, a resistance and a clamping element, wherein the first end of the capacitance receives a voltage control signal; the first end of the MOS tube is connected with the second end of the capacitance; the first end of the resistance is connected with the first end of the MOS tube; the second end of the resistance is connected with the third end of the MOS tube; the first end of the clamping element is connected with the first end of the MOS tube; the second end of the clamping element is connected with the third end of the MOS tube; the clamping element is communicated on the third end of the MOS tube; and the voltage difference of two ends of the clamping element is less than the withstand voltage between the first end and the third end of the MOS tube when the clamping element is communicated. The utility model further provides a MOS tube switching circuit. Through the above mode, the battery equalization circuit and the MOS tube switching circuit can effectively improve the reliability of the circuit.
Description
Technical field
The utility model relates to a kind of battery equalizing circuit, particularly relates to a kind of battery equalizing circuit and MOS switching circuit that electric weight in the battery of series connection use is carried out equilibrium.
Background technology
In the use of battery, battery is used the demand to provide higher output voltage and bigger power capacity to satisfy load driving by series connection usually.Yet, no matter be lithium rechargeable batteries, plumbic acid rechargeable battery or nickel-hydrogen chargeable cell, because the restriction of its process conditions causes possibly having certain difference between the battery cell.Though can solve the difference problem between the battery cell through the mode of combo; But after charge and discharge cycles repeatedly; Still can produce bigger voltage difference between the battery cell, make the available capacity of series battery reduce, and then influence the serviceability and the life-span of battery pack.
Therefore, a kind of battery equalizing circuit need be provided, to solve the difference problem between the battery cell that series connection is used in the prior art.
The utility model content
The technical problem that the utility model mainly solves provides a kind of battery equalizing circuit and metal-oxide-semiconductor switching circuit, to improve circuit stability effectively.
For solving the problems of the technologies described above, the technical scheme that the utility model adopts is: a kind of battery equalizing circuit is provided, comprises: electric capacity, and first termination of electric capacity is received voltage control signal; Metal-oxide-semiconductor, first end of metal-oxide-semiconductor connects second end of electric capacity; Resistance, first end of resistance connects first end of metal-oxide-semiconductor, and second end of resistance connects the 3rd end of metal-oxide-semiconductor; The clamper element; First end of clamper element connects first end of metal-oxide-semiconductor; Second end of clamper element connects the 3rd end of metal-oxide-semiconductor; Conducting when the clamper element powers at the 3rd end of metal-oxide-semiconductor, and during the clamper element conductive voltage difference at two ends less than first end of metal-oxide-semiconductor and the withstand voltage between the 3rd end.
According to the utility model one preferred embodiment, the clamper element is voltage stabilizing didoe or unidirectional TVS.
According to the utility model one preferred embodiment; Metal-oxide-semiconductor is a P type metal-oxide-semiconductor; First end of metal-oxide-semiconductor, second end and the 3rd end are respectively grid, drain electrode and the source electrode of P type metal-oxide-semiconductor; The positive pole of voltage stabilizing didoe or unidirectional TVS connects first end of metal-oxide-semiconductor, and the negative pole of voltage stabilizing didoe or unidirectional TVS connects the 3rd end of metal-oxide-semiconductor.
According to the utility model one preferred embodiment, the clamper element is two-way TVS or piezo-resistance.
For solving the problems of the technologies described above, another technical scheme that the utility model adopts is: a kind of metal-oxide-semiconductor switching circuit is provided, comprises: electric capacity, and first termination of electric capacity is received voltage control signal; Metal-oxide-semiconductor, first end of metal-oxide-semiconductor connects second end of electric capacity; Resistance, first end of resistance connects first end of metal-oxide-semiconductor, and second end of resistance connects the 3rd end of metal-oxide-semiconductor; The clamper element; First end of clamper element connects first end of metal-oxide-semiconductor; Second end of clamper element connects the 3rd end of metal-oxide-semiconductor; Conducting when the clamper element powers at the 3rd end of metal-oxide-semiconductor, and during the clamper element conductive voltage difference at two ends less than first end of metal-oxide-semiconductor and the withstand voltage between the 3rd end.
According to the utility model one preferred embodiment, the clamper element is voltage stabilizing didoe or unidirectional TVS.
According to the utility model one preferred embodiment; Metal-oxide-semiconductor is a P type metal-oxide-semiconductor; First end of metal-oxide-semiconductor, second end and the 3rd end are respectively grid, drain electrode and the source electrode of P type metal-oxide-semiconductor; The positive pole of voltage stabilizing didoe or unidirectional TVS connects first end of metal-oxide-semiconductor, and the negative pole of voltage stabilizing didoe or unidirectional TVS connects the 3rd end of metal-oxide-semiconductor.
According to the utility model one preferred embodiment, the clamper element is two-way TVS or piezo-resistance.
The beneficial effect of the utility model is: be different from the situation of prior art, battery equalizing circuit that the utility model provides and metal-oxide-semiconductor switching circuit can improve circuit reliability effectively.
Description of drawings
Fig. 1 is the circuit diagram according to the battery equalizing circuit of the utility model first embodiment;
Fig. 2 is the circuit diagram according to the battery equalizing circuit of the utility model second embodiment;
Fig. 3 is the circuit diagram according to the battery equalizing circuit of the utility model the 3rd embodiment;
Fig. 4 is the circuit diagram according to the battery equalizing circuit of the utility model the 4th embodiment;
Fig. 5 is the circuit diagram according to the battery equalizing circuit of the utility model the 5th embodiment;
Fig. 6 is the oscillogram according to the battery equalizing circuit of the utility model the 3rd embodiment and the 5th embodiment;
Fig. 7 is another oscillogram according to the battery equalizing circuit of the utility model the 3rd embodiment and the 5th embodiment.
Embodiment
See also Fig. 1, Fig. 1 is according to the circuit diagram of the battery equalizing circuit of the utility model first embodiment.In the present embodiment, battery BT1, BT2 are connected in series.Specifically, the negative pole of battery BT1 is connected with the positive pole of battery BT2.The battery equalizing circuit of present embodiment comprises K switch 1, K2, inductance L 1 and diode D1, D2.
In the present embodiment, K switch 1 comprises first end, second end and the 3rd end.First end of K switch 1 is used to receive the first control signal CTL1, so that the selectivity conducting under the effect of the first control signal CTL1 of second end of K switch 1 and the 3rd end.The 3rd end of K switch 1 further is connected with the positive pole of battery BT1.
In the present embodiment, K switch 2 comprises first end, second end and the 3rd end equally.First end of K switch 2 is used to receive the second control signal CTL2, so that the selectivity conducting under the effect of the second control signal CTL2 of second end of K switch 2 and the 3rd end.Second end of K switch 2 further is connected with second end of K switch 1, and the 3rd end of K switch 2 further is connected with the negative pole of battery BT2.
In the present embodiment, first end of inductance L 1 is connected between the positive pole of negative pole and battery BT2 of battery BT1, and second end of inductance L 1 is connected between second end of second end and K switch 2 of K switch 1.
In the present embodiment, the positive pole of diode D1 connects second end of inductance L 1, and the negative pole of diode D1 connects the positive pole of battery BT1.The negative pole of diode D2 connects second end of inductance L 1, and the positive pole of diode D2 connects the negative pole of battery BT2.
In use; The voltage that is higher than battery BT2 when the voltage that detects battery BT1; In the time of need the electric weight of battery BT1 being transferred to battery BT2; Make second end and the conducting under the effect of the first control signal CTL1 of the 3rd end of K switch 1 through controlling the first control signal CTL1, battery BT1 charges to inductance L 1, and then the electric weight of battery BT1 is stored in the inductance L 1.Subsequently, make second end of K switch 1 and the 3rd end under the effect of the first control signal CTL1, break off through controlling the first control signal CTL1.At this moment, the electric weight of inductance L 1 storage is transferred to battery BT2 through diode D2.Otherwise; The voltage that is higher than battery BT1 when the voltage that detects battery BT2; In the time of need the electric weight of battery BT2 being transferred to battery BT1; Make second end and the conducting under the effect of the second control signal CTL2 of the 3rd end of K switch 2 through controlling the second control signal CTL2, battery BT2 charges to inductance L 1, and then the electric weight of battery BT2 is stored in the inductance L 1.Subsequently, make second end of K switch 2 and the 3rd end under the effect of the second control signal CTL2, break off through controlling the second control signal CTL2.At this moment, the electric weight of inductance L 1 storage is transferred to battery BT1 through diode D1.
In the present embodiment, diode D1, D2 can be general-purpose diode, Schottky diode, Transient Suppression Diode (TVS), voltage stabilizing didoe or other unidirectional breakover elements.
See also Fig. 2, Fig. 2 is the circuit diagram according to the battery equalizing circuit of the utility model second embodiment.In the present embodiment, battery BT1, BT2 are connected in series.Specifically, the negative pole of battery BT1 is connected with the positive pole of battery BT2.The battery equalizing circuit of present embodiment comprises K switch 1, K2, inductance L 1, diode D1, D2 and capacitor C 1, C2.The difference part of the present embodiment and first embodiment shown in Figure 1 is: the battery equalizing circuit of present embodiment further comprises capacitor C 1, C2, and wherein capacitor C 1 is parallelly connected with battery BT1, and capacitor C 2 is parallelly connected with battery BT2.The effect of capacitor C 1, C2 is at 1 couple of battery BT1 of inductance L, plays certain cushioning effect when BT2 charges, and improves the charging effect of battery BT1, BT2.
See also Fig. 3, Fig. 3 is the circuit diagram according to the battery equalizing circuit of the utility model the 3rd embodiment.In the present embodiment, battery BT1, BT2 are connected in series.Specifically, the negative pole of battery BT1 is connected with the positive pole of battery BT2.The battery equalizing circuit of present embodiment comprises capacitor C 1, C2, metal-oxide-semiconductor Q1, Q2, resistance R 1, R2, inductance L 1 and diode D1, D2.
In the present embodiment, first termination of capacitor C 1 is received the first control signal CTL1, and first end of metal-oxide-semiconductor Q1 connects second end of capacitor C 1.In the present embodiment, the first control signal CTL1 is specially the first voltage control signal CTL1.The 3rd end of metal-oxide-semiconductor Q1 further is connected with the positive pole of battery BT1.First end of resistance R 1 connects first end of metal-oxide-semiconductor Q1, and second end of resistance R 1 connects the 3rd end of metal-oxide-semiconductor Q1.Thus, second end of metal-oxide-semiconductor Q1 and the 3rd end can selectivity conductings under the effect of the first voltage control signal CTL1.In the present embodiment, metal-oxide-semiconductor Q1 is a P type metal-oxide-semiconductor, and first end of metal-oxide-semiconductor Q1, second end and the 3rd end are respectively grid, drain electrode and the source electrode of P type metal-oxide-semiconductor.
In the present embodiment, first termination of capacitor C 2 is received the second control signal CTL2, and first end of metal-oxide-semiconductor Q2 connects second end of capacitor C 2.In the present embodiment, the second control signal CTL2 is specially the second voltage control signal CTL2.Second end of metal-oxide-semiconductor Q2 further is connected with second end of metal-oxide-semiconductor Q1, and the 3rd end of metal-oxide-semiconductor Q2 further is connected with the negative pole of battery BT2.Second end of inductance L 1 is connected between second end of second end and metal-oxide-semiconductor Q2 of metal-oxide-semiconductor Q1.First end of resistance R 2 connects first end of metal-oxide-semiconductor Q2, and second end of resistance R 2 connects the 3rd end of metal-oxide-semiconductor Q2.Thus, second end of metal-oxide-semiconductor Q2 and the 3rd end can selectivity conductings under the effect of the second voltage control signal CTL2.In the present embodiment, metal-oxide-semiconductor Q2 is a N type metal-oxide-semiconductor, and first end of metal-oxide-semiconductor Q2, second end and the 3rd end are respectively grid, drain electrode and the source electrode of N type metal-oxide-semiconductor.
Can find that from the comparative result of Fig. 1 and Fig. 3 the capacitor C 1 among the 3rd embodiment, metal-oxide-semiconductor Q1 and resistance R 1 play the effect of the K switch 1 of first embodiment, capacitor C 2, metal-oxide-semiconductor Q2 and resistance R 2 play the effect of the K switch 2 of first embodiment.Certainly, those skilled in the art can expect utilizing other switches well known in the art to realize the effect of K switch 1, K2 fully, for example triode switch or relay switch.
See also Fig. 4, Fig. 4 is according to the circuit diagram of the battery equalizing circuit of the utility model the 4th embodiment.In the present embodiment, battery BT1, BT2 are connected in series.Specifically, the negative pole of battery BT1 is connected with the positive pole of battery BT2.The battery equalizing circuit of present embodiment comprises capacitor C 1, C2, C3, metal-oxide-semiconductor Q1, Q2, resistance R 1, R2, inductance L 1 and diode D1, D2.The difference part of present embodiment and the 3rd embodiment shown in Figure 3 is: the battery equalizing circuit of present embodiment further is provided with capacitor C 3, and wherein first end of capacitor C 3 connects first end of metal-oxide-semiconductor Q1, and second end of capacitor C 3 connects the 3rd end of metal-oxide-semiconductor Q1.
To combine Fig. 3 and Fig. 4 to further describe the function of capacitor C 3 below.See also Fig. 3, in the 3rd embodiment shown in Figure 3, when driven MOS pipe Q2 worked, the second voltage control signal CTL2 produced the pulse signal of certain frequency through capacitor C 2 at first end of metal-oxide-semiconductor Q2, and then controlled conducting and the disconnection of metal-oxide-semiconductor Q2.Because the conducting of metal-oxide-semiconductor Q2 and disconnection can cause producing at second end of metal-oxide-semiconductor Q2 the pulse signal of same frequency.Simultaneously; Because second end of metal-oxide-semiconductor Q2 is connected with second end of metal-oxide-semiconductor Q1; And there is junction capacitance between first end of metal-oxide-semiconductor Q1 and second end and first end and the 3rd end; Therefore will produce the effect of capacitance partial pressure, make the pulse voltage division signal of a same frequency of appearance between first end and the 3rd end of metal-oxide-semiconductor Q1.When the metal-oxide-semiconductor Q2 second terminal voltage amplitude of variation was enough big, first end of metal-oxide-semiconductor Q1 and the amplitude of the pulse voltage division signal between the 3rd end were enough to metal-oxide-semiconductor Q1 is opened, and made second end and the 3rd end conducting of metal-oxide-semiconductor Q1.At this moment,, cause short circuit, therefore can burn out metal-oxide-semiconductor Q1, Q2 owing to metal-oxide-semiconductor Q1, Q2 open simultaneously.
In the present embodiment; First end of capacitor C 3 connects first end of metal-oxide-semiconductor Q1; Second end of capacitor C 3 connects the 3rd end of metal-oxide-semiconductor Q1, is equivalent to first end of metal-oxide-semiconductor Q1 parallelly connectedly with capacitor C 3 with the junction capacitance between the 3rd end, causes the capacitance increase after the parallel connection.According to the capacitance partial pressure principle, capacitance partial pressure and capacitance are inversely proportional to, and therefore make first end of metal-oxide-semiconductor Q1 and the amplitude of the pulse voltage division signal between the 3rd end diminish, and then guarantee to open metal-oxide-semiconductor Q1, have improved the reliability of battery equalizing circuit.
In like manner, in the 4th embodiment shown in Figure 4, when driven MOS pipe Q1 works, the pulse voltage division signal of a same frequency can appear also between first end of metal-oxide-semiconductor Q2 and the 3rd end.Therefore, can reduce first end of metal-oxide-semiconductor Q2 and the capacitance partial pressure between the 3rd end at a same parallelly connected electric capacity between first end of metal-oxide-semiconductor Q2 and the 3rd end, and then the reliability of raising battery equalizing circuit.
See also Fig. 5, Fig. 5 is the circuit diagram according to the battery equalizing circuit of the utility model the 5th embodiment.In the present embodiment, battery BT1, BT2 are connected in series.Specifically, the negative pole of battery BT1 is connected with the positive pole of battery BT2.The battery equalizing circuit of present embodiment comprises capacitor C 1, C2, metal-oxide-semiconductor Q1, Q2, resistance R 1, R2, inductance L 1 and diode D1, D2, D3, D4.The difference part of present embodiment and the 3rd embodiment shown in Figure 3 is: the battery equalizing circuit of present embodiment further is provided with diode D3, D4; Wherein the positive pole of diode D3 connects the grid of metal-oxide-semiconductor Q1; The negative pole of diode D3 connects the source electrode of metal-oxide-semiconductor Q1; The negative pole of diode D4 connects the grid of metal-oxide-semiconductor Q2, and the positive pole of diode D4 connects the source electrode of metal-oxide-semiconductor Q2.
To combine Fig. 3,5-7 to further describe the function of diode D3, D4 below.See also Fig. 6-7; Shown in the waveform 4 of the waveform of Fig. 61 and Fig. 7; In battery equalizing circuit shown in Figure 3, the first voltage control signal CTL1 and the second voltage control signal CTL2 that capacitor C 1, C2 receive are respectively the pulse signal that comprises high level signal (5V) and low level signal (OV).Wherein, when the first voltage control signal CTL1 is low level signal, second end of metal-oxide-semiconductor Q1 and the 3rd end conducting, when the first voltage control signal CTL1 was high level signal, second end of metal-oxide-semiconductor Q1 and the 3rd end broke off.When the second voltage control signal CTL2 is high level signal, second end of metal-oxide-semiconductor Q2 and the 3rd end conducting, when the second voltage control signal CTL2 was low level signal, second end of metal-oxide-semiconductor Q2 and the 3rd end broke off.
Specifically, with shown in the waveform 2, when metal-oxide-semiconductor Q1 did not work, the first voltage control signal CTL1 that capacitor C 1 received was lasting high level signal like the waveform 1 of Fig. 6.At this moment, the grid voltage of metal-oxide-semiconductor Q1 equals the source voltage Vs1 of metal-oxide-semiconductor Q1, and metal-oxide-semiconductor Q1 ends.When needs were opened metal-oxide-semiconductor Q1, the first voltage control signal CTL1 that capacitor C 1 is received jumped to low level signal from the high level signal that continues, and the grid voltage of metal-oxide-semiconductor Q1 jumps to Vs1-5V from Vs1 moment.At this moment, the source voltage Vs1 of metal-oxide-semiconductor Q1 is higher than the grid voltage of metal-oxide-semiconductor Q1, makes metal-oxide-semiconductor Q1 open, and then the drain electrode conducting of the source electrode of metal-oxide-semiconductor Q1 and metal-oxide-semiconductor Q1.Meanwhile, because capacitor C 1 is charged through resistance R 1, make the grid voltage of metal-oxide-semiconductor Q1 slowly raise from Vs1-5V.When needs were closed metal-oxide-semiconductor Q1, the first voltage control signal CTL1 that capacitor C 1 is received jumped to high level signal from low level signal, the grid voltage of the metal-oxide-semiconductor Q1 saltus step 5V that makes progress.At this moment, the voltage difference between the grid voltage of the source voltage of metal-oxide-semiconductor Q1 and metal-oxide-semiconductor Q1 is not enough to open metal-oxide-semiconductor Q1, makes metal-oxide-semiconductor Q1 end, and then the drain electrode of the source electrode of metal-oxide-semiconductor Q1 and metal-oxide-semiconductor Q1 is broken off.Meanwhile, because capacitor C 1 is discharged through resistance R 1, make the grid voltage of metal-oxide-semiconductor Q1 slowly descend.Yet; By shown in the waveform 2 of Fig. 6, when effective duty ratio of the first voltage control signal CTL1 constantly increases (surpassing 50%), because the charging interval of capacitor C 1 is greater than the discharge time of capacitor C 1; Cause the grid voltage of metal-oxide-semiconductor Q1 to continue to raise; To such an extent as to when the first voltage control signal CTL1 was low level signal, the voltage difference between the source voltage of the grid voltage of metal-oxide-semiconductor Q1 and metal-oxide-semiconductor Q1 also can't normally be opened metal-oxide-semiconductor Q1, cause the metal-oxide-semiconductor Q1 can't operate as normal.
In like manner, with shown in the waveform 5, when metal-oxide-semiconductor Q2 did not work, the second voltage control signal CTL2 that capacitor C 2 received was lasting low level signal like the waveform 4 of Fig. 7.At this moment, the grid voltage of metal-oxide-semiconductor Q2 equals the source voltage Vs2 of metal-oxide-semiconductor Q2, and metal-oxide-semiconductor Q2 ends.When needs were opened metal-oxide-semiconductor Q2, the second voltage control signal CTL2 that capacitor C 2 is received jumped to high level signal from the low level signal that continues, and the grid voltage of metal-oxide-semiconductor Q2 jumps to Vs2+5V from Vs2.At this moment, the source voltage of metal-oxide-semiconductor Q2 is lower than the grid voltage of metal-oxide-semiconductor Q2, makes metal-oxide-semiconductor Q2 open, and then the drain electrode conducting of the source electrode of metal-oxide-semiconductor Q2 and metal-oxide-semiconductor Q2.With this simultaneously, because capacitor C 2 is charged through resistance R 2, make the grid voltage of metal-oxide-semiconductor Q2 slowly reduce from Vs2+5V.When needs are closed metal-oxide-semiconductor Q2, the second voltage control signal CTL2 that capacitor C 2 is received when high level signal jumps to low level signal, the downward saltus step 5V of the grid voltage of metal-oxide-semiconductor Q2.At this moment, voltage difference is not enough to open metal-oxide-semiconductor Q2 between the source voltage of the grid voltage of metal-oxide-semiconductor Q2 and metal-oxide-semiconductor Q2, and metal-oxide-semiconductor Q2 ends, and then the drain electrode of the source electrode of metal-oxide-semiconductor Q2 and metal-oxide-semiconductor Q2 is broken off.Meanwhile, because capacitor C 2 is discharged through resistance R 2, make the grid voltage of metal-oxide-semiconductor Q2 slowly raise.Yet; By shown in the waveform 5 of Fig. 7, when effective duty ratio of the second voltage control signal CTL2 constantly increases (surpassing 50%), because the charging interval of capacitor C 2 is greater than the discharge time of capacitor C 2; Cause the grid voltage of metal-oxide-semiconductor Q2 to continue to reduce; To such an extent as to when the second voltage control signal CTL2 was high level signal, the voltage difference between the source voltage of the grid voltage of metal-oxide-semiconductor Q2 and metal-oxide-semiconductor Q2 also can't be opened metal-oxide-semiconductor Q2, cause the metal-oxide-semiconductor Q2 can't operate as normal.
As shown in Figure 5, in the present embodiment, the positive pole of diode D3 connects the grid of metal-oxide-semiconductor Q1, and the negative pole of diode D3 connects the source electrode of metal-oxide-semiconductor Q1.At this moment; Shown in the waveform 3 of Fig. 6, when the first voltage control signal CTL1 when high level signal jumps to low level signal, because the grid voltage of metal-oxide-semiconductor Q1 is lower than the source voltage of metal-oxide-semiconductor Q1; Make diode D3 by breaking off, capacitor C 1 is slowly charged through resistance R 1.When the first voltage control signal CTL1 when low level signal jumps to high level signal, because the grid voltage of metal-oxide-semiconductor Q1, makes diode D3 conducting greater than the source voltage of metal-oxide-semiconductor Q1.At this moment, capacitor C 1 is discharged rapidly through diode D3, with the source voltage of the quick clamper of the grid voltage of metal-oxide-semiconductor Q1 to metal-oxide-semiconductor Q1.Specifically, when voltage difference between the source voltage of the grid voltage of metal-oxide-semiconductor Q1 and metal-oxide-semiconductor Q1 during greater than the conducting voltage of diode D3, diode D3 conducting, capacitor C 1 is discharged rapidly through diode D3.When voltage difference between the source voltage of the grid voltage of metal-oxide-semiconductor Q1 and metal-oxide-semiconductor Q1 equals and during less than the conducting voltage of diode D3, diode D3 is by breaking off, capacitor C 1 is slowly discharged through resistance R 1.
In like manner, as shown in Figure 5, in the present embodiment, the negative pole of diode D4 connects the grid of metal-oxide-semiconductor Q2, and the positive pole of diode D4 connects the source electrode of metal-oxide-semiconductor Q2.At this moment; Shown in the waveform 6 of Fig. 7, when the second voltage control signal CTL2 when low level signal jumps to high level signal, because the grid voltage of metal-oxide-semiconductor Q2 is higher than the source voltage of metal-oxide-semiconductor Q2; Make diode D4 by breaking off, capacitor C 4 is slowly charged through resistance R 2.When the second voltage control signal CTL2 when high level signal jumps to low level signal, because the source voltage of metal-oxide-semiconductor Q2, makes diode D4 conducting greater than the grid voltage of metal-oxide-semiconductor Q2.At this moment, capacitor C 2 is discharged rapidly through diode D4, with the source voltage of the quick clamper of the grid voltage of metal-oxide-semiconductor Q2 to metal-oxide-semiconductor Q2.Specifically, when voltage difference between the grid voltage of the source voltage of metal-oxide-semiconductor Q2 and metal-oxide-semiconductor Q2 during greater than the conducting voltage of diode D4, diode D4 conducting, capacitor C 2 is discharged rapidly through diode D4.When voltage difference between the source voltage of the grid voltage of metal-oxide-semiconductor Q2 and metal-oxide-semiconductor Q2 equals and during less than the conducting voltage of diode D3, diode D3 is by breaking off, capacitor C 2 is slowly discharged through resistance R 2.
By the way, utilize the clamping action of diode D3, D4, avoided owing to effectively duty ratio increases the capacitor C 1 of generation, the insufficient metal-oxide-semiconductor Q1 that causes of C2 discharge, Q2 can't operate as normal.
In the present embodiment, diode D3, D4 can be general-purpose diode, Schottky diode, Transient Suppression Diode (TVS), voltage stabilizing didoe or other unidirectional breakover elements.
At preferred embodiment, diode D3 adopts voltage stabilizing didoe.The further effect of this voltage stabilizing didoe is: when source electrode moment of metal-oxide-semiconductor Q1 powered on, the voltage stabilizing didoe reverse-conducting was with the grid voltage clamper of the metal-oxide-semiconductor Q1 source voltage to metal-oxide-semiconductor Q1.At this moment; Because source electrode and the grid of the metal-oxide-semiconductor Q1 that the voltage difference at voltage stabilizing didoe two ends less than the source electrode of metal-oxide-semiconductor Q1 and the withstand voltage between the grid, has therefore been avoided when moment powers on causing greater than withstand voltage owing to voltage difference between the source electrode of metal-oxide-semiconductor Q1 and the grid are breakdown.
In other embodiments; Voltage stabilizing didoe also can be realized by other clamper elements; For example unidirectional TVS, two-way TVS or piezo-resistance, only need guarantee when source electrode moment of metal-oxide-semiconductor Q1 powers on clamper element can conducting and during conducting the voltage difference at clamper element two ends get final product less than the source electrode of metal-oxide-semiconductor Q1 and the withstand voltage between the grid.It should be noted that adopting under the situation of piezo-resistance separately, can't realize the described repid discharge of preceding text, therefore can realize above-mentioned two effects simultaneously with piezo-resistance is parallelly connected with general-purpose diode capacitor C 1.
After reading foregoing, those skilled in the art can expect the foregoing description is combined fully, or on other similar metal-oxide-semiconductor switching circuits of migrating.
Through with upper type, the battery equalizing circuit of the utility model is the balancing battery electric weight effectively, thereby improves the life-span of battery pack.In addition, this battery equalizing circuit and metal-oxide-semiconductor switching circuit improve the job stability and the reliability of circuit.
More than be merely the embodiment of the utility model; Be not thus the restriction the utility model claim; Every equivalent structure or equivalent flow process conversion that utilizes the utility model specification and accompanying drawing content to be done; Or directly or indirectly be used in other relevant technical fields, all in like manner be included in the scope of patent protection of the utility model.
Claims (8)
1. a power supply equalization circuit is characterized in that, comprising:
Electric capacity, first termination of said electric capacity is received voltage control signal;
Metal-oxide-semiconductor, first end of said metal-oxide-semiconductor connects second end of said electric capacity;
Resistance, first end of said resistance connects first end of said metal-oxide-semiconductor, and second end of said resistance connects the 3rd end of said metal-oxide-semiconductor;
The clamper element; First end of said clamper element connects first end of said metal-oxide-semiconductor; Second end of said clamper element connects the 3rd end of said metal-oxide-semiconductor; Conducting when said clamper element powers at the 3rd end of said metal-oxide-semiconductor, and during said clamper element conductive the voltage difference at two ends less than first end of said metal-oxide-semiconductor and the withstand voltage between the 3rd end.
2. power supply equalization circuit according to claim 1 is characterized in that, said clamper element is voltage stabilizing didoe or unidirectional TVS.
3. power supply equalization circuit according to claim 2; It is characterized in that; Said metal-oxide-semiconductor is a P type metal-oxide-semiconductor; First end of said metal-oxide-semiconductor, second end and the 3rd end are respectively grid, drain electrode and the source electrode of said P type metal-oxide-semiconductor, and the positive pole of said voltage stabilizing didoe or unidirectional TVS connects first end of said metal-oxide-semiconductor, and the negative pole of said voltage stabilizing didoe or unidirectional TVS connects the 3rd end of said metal-oxide-semiconductor.
4. power supply equalization circuit according to claim 1 is characterized in that, said clamper element is two-way TVS or piezo-resistance.
5. a metal-oxide-semiconductor switching circuit is characterized in that, comprising:
Electric capacity, first termination of said electric capacity is received voltage control signal;
Metal-oxide-semiconductor, first end of said metal-oxide-semiconductor connects second end of said electric capacity;
Resistance, first end of said resistance connects first end of said metal-oxide-semiconductor, and second end of said resistance connects the 3rd end of said metal-oxide-semiconductor;
The clamper element; First end of said clamper element connects first end of said metal-oxide-semiconductor; Second end of said clamper element connects the 3rd end of said metal-oxide-semiconductor; Conducting when said clamper element powers at the 3rd end of said metal-oxide-semiconductor, and during said clamper element conductive the voltage difference at two ends less than first end of said metal-oxide-semiconductor and the withstand voltage between the 3rd end.
6. metal-oxide-semiconductor switching circuit according to claim 5 is characterized in that, said clamper element is voltage stabilizing didoe or unidirectional TVS.
7. metal-oxide-semiconductor switching circuit according to claim 6; It is characterized in that; Said metal-oxide-semiconductor is a P type metal-oxide-semiconductor; First end of said metal-oxide-semiconductor, second end and the 3rd end are respectively grid, drain electrode and the source electrode of said P type metal-oxide-semiconductor, and the positive pole of said voltage stabilizing didoe or unidirectional TVS connects first end of said metal-oxide-semiconductor, and the negative pole of said voltage stabilizing didoe or unidirectional TVS connects the 3rd end of said metal-oxide-semiconductor.
8. metal-oxide-semiconductor switching circuit according to claim 5 is characterized in that, said clamper element is two-way TVS or piezo-resistance.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN2012200541121U CN202564975U (en) | 2012-02-17 | 2012-02-17 | Battery equalization circuit and MOS tube switching circuit |
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| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN2012200541121U CN202564975U (en) | 2012-02-17 | 2012-02-17 | Battery equalization circuit and MOS tube switching circuit |
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| Publication Number | Publication Date |
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| CN202564975U true CN202564975U (en) | 2012-11-28 |
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| Application Number | Title | Priority Date | Filing Date |
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| CN2012200541121U Expired - Fee Related CN202564975U (en) | 2012-02-17 | 2012-02-17 | Battery equalization circuit and MOS tube switching circuit |
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Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN103259298A (en) * | 2012-02-17 | 2013-08-21 | 东莞钜威新能源有限公司 | Battery equalization circuit and MOS transistor switching circuit |
| CN106707896A (en) * | 2017-03-02 | 2017-05-24 | 南京富岛信息工程有限公司 | Intelligent brake shoe capable of transmitting switching state, and transmitting method |
| CN115987266A (en) * | 2023-01-16 | 2023-04-18 | 深圳市思远半导体有限公司 | Switching circuit, control method and chip of NMOS (N-channel metal oxide semiconductor) switching tube |
-
2012
- 2012-02-17 CN CN2012200541121U patent/CN202564975U/en not_active Expired - Fee Related
Cited By (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN103259298A (en) * | 2012-02-17 | 2013-08-21 | 东莞钜威新能源有限公司 | Battery equalization circuit and MOS transistor switching circuit |
| CN106707896A (en) * | 2017-03-02 | 2017-05-24 | 南京富岛信息工程有限公司 | Intelligent brake shoe capable of transmitting switching state, and transmitting method |
| CN106707896B (en) * | 2017-03-02 | 2018-12-18 | 南京富岛信息工程有限公司 | A kind of Intelligent iron shoe and sending method of transmittable on-off state |
| CN115987266A (en) * | 2023-01-16 | 2023-04-18 | 深圳市思远半导体有限公司 | Switching circuit, control method and chip of NMOS (N-channel metal oxide semiconductor) switching tube |
| CN115987266B (en) * | 2023-01-16 | 2023-11-28 | 深圳市思远半导体有限公司 | Switching circuit, control method and chip of NMOS switching tube |
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Effective date of registration: 20160324 Address after: 523808, Guangdong District, Songshan hi tech Industrial Development Zone, Dongguan, seven industrial North Road, 1 force science and technology center, 3 floor, B District Patentee after: Dongguan Powerwise Technology Co., Ltd. Address before: 523808 productivity building, Songshan science and Technology Industrial Park, Guangdong, Dongguan Province, room 401-403 Patentee before: Dongguan PowerWise New Energy Co., Ltd. |
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Granted publication date: 20121128 Termination date: 20200217 |