CN103092740A - Method of realizing hardware status indication - Google Patents
Method of realizing hardware status indication Download PDFInfo
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- CN103092740A CN103092740A CN 201310022875 CN201310022875A CN103092740A CN 103092740 A CN103092740 A CN 103092740A CN 201310022875 CN201310022875 CN 201310022875 CN 201310022875 A CN201310022875 A CN 201310022875A CN 103092740 A CN103092740 A CN 103092740A
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Abstract
The invention provides a method of realizing hardware status indication. The structure comprises a complex programmable logic device (CPLD) and a seven-segment nixie tube, wherein one end of the CPLD is connected with status indication signals on a mainboard, the CPLD finishes collecting the induction signals on the mainboard and classify and settle the collected signals, coherent signals are encoded according to priority levels and sequential relationships, and the seven-segment nixie tube is used for receiving correlative coding and display the correlative coding. Compared with the prior art, the method of realizing the hardware status indication reduces overheads of status indication circuits in circuit designs, reduces overheads of layouts and routing resources in hardware designs, and reduces device cost at the same time.
Description
Technical field
The present invention relates to state pointing technology field, specifically a kind of method of utilizing seven segment digital tubes to realize the hardware state indication.
Background technology
In the circuit hardware design, we can encounter a lot of states needs indication, such as voltage status, and time sequence status etc.
The indicating means of conventional is all to utilize LED light.This requirement needs corresponding LED light for each state.Along with the development of technology, the hardware system that present computer realm has is more and more huger, and its required instructed voltage, sequential various monitor states are also more and more, and needed LED light also can get more and more.Pilot lamp is shared that area and interconnection resource also can get more and more.This can bring a lot of troubles for compact and extremely multi-mode integrated circuit board design.
Summary of the invention
Technical assignment of the present invention is to solve the deficiencies in the prior art, and a kind of method of utilizing seven segment digital tubes to realize the hardware state indication is provided.
Technical scheme of the present invention realizes in the following manner, a kind of this method that realizes the hardware state indication, and its structure comprises CPLD and seven segment digital tubes, wherein:
The end of CPLD connects the condition indicative signal on mainboard, and then this CPLD completes the indicator signal of collecting on mainboard, and the signal of collecting is carried out classified finishing, according to priority and sequential relationship, coherent signal is encoded;
Seven segment digital tubes is used for receiving correlative coding and shows.
Indicator signal on described mainboard comprises state, the time sequence status of voltage.
Described CPLD comprises four parts: time sequence status register, monitor state register, state encoding device, and seven segment code compiler.
Described time sequence status register and monitor state register are respectively used to record time sequence status and the monitor state of inputting on mainboard, and real-time with related information transmission to the state encoding device; When the value in register changed, it will be by signal notify status scrambler, and then the waiting status scrambler reads related data.
The function of described state encoding device is that the various data that time sequence status register and monitor state register transfer are come are resolved coding: at first, after the signal that receives corresponding registers, scrambler will read the numerical value of corresponding registers, convert thereof into corresponding coding according to the cryptoprinciple that sets in advance, then give the seven segment code compiler according to priority orders.
Described signal refers to control signal trag signal.
The function of described seven segment code compiler is to convert the numerical value that the state encoding device sends to seven segment code, then sends the seven segment digital tubes to the CPLD outside, drives its demonstration.
The information demonstration of described charactron is divided into time sequence status stage and mainboard monitor state.
The time sequence status stage comprises: with serial number form display timing generator running status; Show the problem sequential stage with strobe mode.
Described mainboard monitor state refers to that the operation health status of mainboard various device monitors, and shows in real time for the problem that occurs.
The beneficial effect that the present invention compared with prior art produces is:
A kind of this method that realizes that hardware state is indicated of method that realizes that hardware state is indicated of the present invention utilizes CPLD and seven segment digital tubes to realize the hardware state indication, reduce the expense of condition indication circuit in circuit design, reduce the expense of layout, interconnection resource in hardware design, also can reduce device cost simultaneously.
Description of drawings
Accompanying drawing 1 is hardware block diagram of the present invention.
Accompanying drawing 2 is CPLD inner structure schematic block diagrams of the present invention.
Embodiment
Below in conjunction with accompanying drawing, a kind of method that realizes that hardware state is indicated of the present invention is described in detail below.
The present invention proposes a kind ofly to realize based on CPLD and seven segment digital tubes the method that these states show.This is because all can use the sequential logic control that CPLD does system at present in hardware system.So this method can reduce the expense of layout in hardware design, interconnection resource on the one hand greatly, also can reduce device cost simultaneously.A kind of this method that realizes the hardware state indication, its structure mainly is comprised of a CPLD and a seven segment digital tubes as shown in Figure 1.The end of CPLD is connected with each condition indicative signal on mainboard, receiving status information.CPLD will do respective handling to each status information, and the driving signal that converts thereof into seven segment digital tubes sends seven segment digital tubes, is responsible for demonstration by it.
For the functional block diagram of CPLD internal work as shown in Figure 2, mainly formed by four parts, the time sequence status register, the monitor state register, the state encoding device, and the seven segment code compiler forms.
Time sequence status register and monitor state register are respectively used to record time sequence status and the monitor state of inputting on mainboard, and real-time with related information transmission to the state encoding device.When the value in register changed, it will be by Trag signal notify status scrambler, and then the waiting status scrambler reads related data.
The function of state encoding device is that the various data that time sequence status register and monitor state register transfer are come are resolved coding.At first, after the Trag signal that receives corresponding registers, scrambler will read the numerical value of corresponding registers, convert thereof into corresponding coding according to the cryptoprinciple that sets in advance.Then give the seven segment code compiler according to priority orders.
The function of seven segment code compiler is to convert the numerical value that the state encoding device sends to seven segment code, then sends the seven segment digital tubes to the CPLD outside, drives its demonstration.
Information demonstration for seven segment digital tubes is divided into time sequence status stage and mainboard monitor state.
Time sequence status stage major function: 1, with serial number form display timing generator running status.2, show the problem sequential stage with strobe mode.
The mainboard monitor state is mainly that the operation health status of mainboard various device is monitored.Show in real time for the problem that occurs.
Except the described technical characterictic of instructions, be the known technology of those skilled in the art.
Claims (10)
1. method that realizes hardware state indication, it is characterized in that: its structure comprises CPLD and seven segment digital tubes, wherein:
The end of CPLD connects the condition indicative signal on mainboard, and then this CPLD completes the indicator signal of collecting on mainboard, and the signal of collecting is carried out classified finishing, according to priority and sequential relationship, coherent signal is encoded;
Seven segment digital tubes is used for receiving correlative coding and shows.
2. a kind of method that realizes hardware state indication according to claim 1, it is characterized in that: the indicator signal on described mainboard comprises state, the time sequence status of voltage.
3. a kind of method that realizes hardware state indication according to claim 1, it is characterized in that: described CPLD comprises four parts: time sequence status register, monitor state register, state encoding device and seven segment code compiler.
4. a kind of method that realizes hardware state indication according to claim 3, it is characterized in that: described time sequence status register and monitor state register are respectively used to record time sequence status and the monitor state of inputting on mainboard, and real-time with related information transmission to the state encoding device; When the value in register changed, it will be by signal notify status scrambler, and then the waiting status scrambler reads related data.
5. arbitrary a kind of described method that realizes the hardware state indication according to claim 4, it is characterized in that: the function of described state encoding device is that the various data that time sequence status register and monitor state register transfer are come are resolved coding: at first, after the signal that receives corresponding registers, scrambler will read the numerical value of corresponding registers, convert thereof into corresponding coding according to the cryptoprinciple that sets in advance, then give the seven segment code compiler according to priority orders.
6. according to claim 4 or 5 a kind of described methods that realize hardware state indication, it is characterized in that: described signal refers to control signal trag signal.
7. a kind of method that realizes hardware state indication according to claim 1, it is characterized in that: described seven segment code compiler is to convert the numerical value that the state encoding device sends to seven segment code, then send the seven segment digital tubes to the CPLD outside, drive its demonstration.
8. a kind of method that realizes hardware state indication according to claim 7 is characterized in that: the information of described charactron shows and is divided into time sequence status stage and mainboard monitor state.
9. a kind of method that realizes hardware state indication according to claim 8, it is characterized in that: the time sequence status stage comprises: with serial number form display timing generator running status; Show the problem sequential stage with strobe mode.
10. a kind of method that realizes hardware state indication according to claim 8 is characterized in that: described mainboard monitor state refers to that the operation health status of mainboard various device monitors, and shows in real time for the problem that occurs.
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| Application Number | Priority Date | Filing Date | Title |
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| CN 201310022875 CN103092740A (en) | 2013-01-22 | 2013-01-22 | Method of realizing hardware status indication |
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| CN 201310022875 CN103092740A (en) | 2013-01-22 | 2013-01-22 | Method of realizing hardware status indication |
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Cited By (7)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN104375908A (en) * | 2014-08-04 | 2015-02-25 | 浪潮(北京)电子信息产业有限公司 | Method and equipment for detecting electric leakage of server |
| CN104978243A (en) * | 2015-06-24 | 2015-10-14 | 浪潮电子信息产业股份有限公司 | Quick light path diagnosis method for server |
| CN107122278A (en) * | 2017-05-17 | 2017-09-01 | 郑州云海信息技术有限公司 | A kind of system and method for controlling startup self-detection presentation of information |
| CN108318831A (en) * | 2018-01-18 | 2018-07-24 | 郑州云海信息技术有限公司 | A method of passing through Debug card debugging server power supply |
| CN108614753A (en) * | 2018-05-15 | 2018-10-02 | 郑州云海信息技术有限公司 | A kind of method and device acquiring mainboard information by mainboard CPLD |
| CN108919090A (en) * | 2018-06-13 | 2018-11-30 | 苏州佳世达电通有限公司 | Circuit board and booting adjustment method for the debugging that is switched on |
| CN108984373A (en) * | 2018-07-11 | 2018-12-11 | 郑州云海信息技术有限公司 | Solve the method, apparatus and instruction system that network indicator light is always on extremely |
-
2013
- 2013-01-22 CN CN 201310022875 patent/CN103092740A/en active Pending
Cited By (7)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN104375908A (en) * | 2014-08-04 | 2015-02-25 | 浪潮(北京)电子信息产业有限公司 | Method and equipment for detecting electric leakage of server |
| CN104978243A (en) * | 2015-06-24 | 2015-10-14 | 浪潮电子信息产业股份有限公司 | Quick light path diagnosis method for server |
| CN107122278A (en) * | 2017-05-17 | 2017-09-01 | 郑州云海信息技术有限公司 | A kind of system and method for controlling startup self-detection presentation of information |
| CN108318831A (en) * | 2018-01-18 | 2018-07-24 | 郑州云海信息技术有限公司 | A method of passing through Debug card debugging server power supply |
| CN108614753A (en) * | 2018-05-15 | 2018-10-02 | 郑州云海信息技术有限公司 | A kind of method and device acquiring mainboard information by mainboard CPLD |
| CN108919090A (en) * | 2018-06-13 | 2018-11-30 | 苏州佳世达电通有限公司 | Circuit board and booting adjustment method for the debugging that is switched on |
| CN108984373A (en) * | 2018-07-11 | 2018-12-11 | 郑州云海信息技术有限公司 | Solve the method, apparatus and instruction system that network indicator light is always on extremely |
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Application publication date: 20130508 |