CN103035724B - Radio frequency horizontal dual pervasion field effect transistor and manufacture method thereof - Google Patents
Radio frequency horizontal dual pervasion field effect transistor and manufacture method thereof Download PDFInfo
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- CN103035724B CN103035724B CN201210432273.4A CN201210432273A CN103035724B CN 103035724 B CN103035724 B CN 103035724B CN 201210432273 A CN201210432273 A CN 201210432273A CN 103035724 B CN103035724 B CN 103035724B
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- 238000000034 method Methods 0.000 title claims abstract description 43
- 230000009977 dual effect Effects 0.000 title claims abstract description 12
- 230000005669 field effect Effects 0.000 title claims abstract description 12
- 238000004519 manufacturing process Methods 0.000 title claims description 12
- 229910021420 polycrystalline silicon Inorganic materials 0.000 claims abstract description 78
- 229920005591 polysilicon Polymers 0.000 claims abstract description 77
- 229910052751 metal Inorganic materials 0.000 claims abstract description 22
- 239000002184 metal Substances 0.000 claims abstract description 22
- 150000002500 ions Chemical class 0.000 claims description 14
- 238000000206 photolithography Methods 0.000 claims description 14
- 239000000758 substrate Substances 0.000 claims description 13
- 239000012535 impurity Substances 0.000 claims description 12
- 238000000151 deposition Methods 0.000 claims description 8
- OAICVXFJPJFONN-UHFFFAOYSA-N Phosphorus Chemical compound [P] OAICVXFJPJFONN-UHFFFAOYSA-N 0.000 claims description 7
- ZOXJGFHDIHLPTG-UHFFFAOYSA-N Boron Chemical compound [B] ZOXJGFHDIHLPTG-UHFFFAOYSA-N 0.000 claims description 6
- 229910052785 arsenic Inorganic materials 0.000 claims description 6
- RQNWIZPPADIBDY-UHFFFAOYSA-N arsenic atom Chemical compound [As] RQNWIZPPADIBDY-UHFFFAOYSA-N 0.000 claims description 6
- QVGXLLKOCUKJST-UHFFFAOYSA-N atomic oxygen Chemical compound [O] QVGXLLKOCUKJST-UHFFFAOYSA-N 0.000 claims description 6
- 229910052796 boron Inorganic materials 0.000 claims description 6
- 229910052760 oxygen Inorganic materials 0.000 claims description 6
- 239000001301 oxygen Substances 0.000 claims description 6
- 229910052698 phosphorus Inorganic materials 0.000 claims description 6
- 239000011574 phosphorus Substances 0.000 claims description 6
- 230000015572 biosynthetic process Effects 0.000 claims description 4
- WFAQWTGDFGIPHO-UHFFFAOYSA-L [B+2].[Cl-].[Cl-] Chemical compound [B+2].[Cl-].[Cl-] WFAQWTGDFGIPHO-UHFFFAOYSA-L 0.000 claims 1
- 230000015556 catabolic process Effects 0.000 abstract description 10
- 230000000694 effects Effects 0.000 abstract description 4
- 238000005516 engineering process Methods 0.000 abstract description 4
- 230000002708 enhancing effect Effects 0.000 abstract description 3
- 238000005530 etching Methods 0.000 abstract description 3
- 238000001465 metallisation Methods 0.000 abstract description 3
- 230000003647 oxidation Effects 0.000 abstract description 3
- 238000007254 oxidation reaction Methods 0.000 abstract description 3
- 238000002360 preparation method Methods 0.000 abstract description 3
- 230000005684 electric field Effects 0.000 description 7
- 238000010586 diagram Methods 0.000 description 5
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 3
- 229910052710 silicon Inorganic materials 0.000 description 3
- 239000010703 silicon Substances 0.000 description 3
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 description 2
- 238000009792 diffusion process Methods 0.000 description 2
- OKZIUSOJQLYFSE-UHFFFAOYSA-N difluoroboron Chemical compound F[B]F OKZIUSOJQLYFSE-UHFFFAOYSA-N 0.000 description 2
- 229920002120 photoresistant polymer Polymers 0.000 description 2
- ALKWEXBKAHPJAQ-NAKRPEOUSA-N Asn-Leu-Asp-Asp Chemical compound NC(=O)C[C@H](N)C(=O)N[C@@H](CC(C)C)C(=O)N[C@@H](CC(O)=O)C(=O)N[C@@H](CC(O)=O)C(O)=O ALKWEXBKAHPJAQ-NAKRPEOUSA-N 0.000 description 1
- 229910001218 Gallium arsenide Inorganic materials 0.000 description 1
- 230000003321 amplification Effects 0.000 description 1
- 238000004891 communication Methods 0.000 description 1
- 230000002349 favourable effect Effects 0.000 description 1
- 238000003199 nucleic acid amplification method Methods 0.000 description 1
- 239000004065 semiconductor Substances 0.000 description 1
- 229910021332 silicide Inorganic materials 0.000 description 1
- FVBUAEGBCNSCDD-UHFFFAOYSA-N silicide(4-) Chemical compound [Si-4] FVBUAEGBCNSCDD-UHFFFAOYSA-N 0.000 description 1
- 239000000377 silicon dioxide Substances 0.000 description 1
- 239000002210 silicon-based material Substances 0.000 description 1
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/76—Unipolar devices, e.g. field effect transistors
- H01L29/772—Field effect transistors
- H01L29/78—Field effect transistors with field effect produced by an insulated gate
- H01L29/7833—Field effect transistors with field effect produced by an insulated gate with lightly doped drain or source extension, e.g. LDD MOSFET's; DDD MOSFET's
- H01L29/7835—Field effect transistors with field effect produced by an insulated gate with lightly doped drain or source extension, e.g. LDD MOSFET's; DDD MOSFET's with asymmetrical source and drain regions, e.g. lateral high-voltage MISFETs with drain offset region, extended drain MISFETs
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/40—Electrodes ; Multistep manufacturing processes therefor
- H01L29/402—Field plates
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
- H01L29/06—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
- H01L29/10—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions with semiconductor regions connected to an electrode not carrying current to be rectified, amplified or switched and such electrode being part of a semiconductor device which comprises three or more electrodes
- H01L29/1025—Channel region of field-effect devices
- H01L29/1029—Channel region of field-effect devices of field-effect transistors
- H01L29/1033—Channel region of field-effect devices of field-effect transistors with insulated gate, e.g. characterised by the length, the width, the geometric contour or the doping structure
- H01L29/1041—Channel region of field-effect devices of field-effect transistors with insulated gate, e.g. characterised by the length, the width, the geometric contour or the doping structure with a non-uniform doping structure in the channel region surface
- H01L29/1045—Channel region of field-effect devices of field-effect transistors with insulated gate, e.g. characterised by the length, the width, the geometric contour or the doping structure with a non-uniform doping structure in the channel region surface the doping structure being parallel to the channel length, e.g. DMOS like
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Abstract
The invention discloses a kind of radio frequency horizontal dual pervasion field effect transistor, including polysilicon gate and faraday shield layer, described faraday shield layer is polysilicon faraday shield layer. Radio frequency horizontal dual pervasion field effect transistor of the present invention adopts the structure of polysilicon faraday shield layer, with traditional prepare Faraday shield layer process compared with, this preparation technology is simple, only increase a thermal oxidation process, decrease oxide layer deposit and Metal deposition and etching process below a faraday shield layer, the quality of the oxide layer below faraday shield layer prepared by the method to be got well by what the mode deposited grew relative to common faraday shield layer, thus enhancing the ruggedness of device; And the device of the present invention covers layer device relative to common metal Faraday, there is the characteristics such as identical breakdown voltage, conducting resistance. Step grid structure prepared by the method simultaneously, also can play the effect suppressing hot carrier in jection (HCI).
Description
Technical field
The present invention relates to a kind of semiconductor integrated circuit, particularly relate to a kind of radio frequency horizontal dual pervasion field effect transistor, the invention still further relates to the manufacture method of this transistor.
Background technology
Along with the arrival in 3G epoch, communication field more and more requires the exploitation of more powerful radio frequency (RF) device. Radio frequency horizontal dual pervasion field effect transistor (RFLDMOS), owing to it has very high output, has just been widely used in the amplification of hand-held radio base station power as far back as the nineties in last century, and its applying frequency is 900MHz-3.8GHz. RFLDMOS, compared with traditional silica-based bipolar transistor, has the better linearity, higher power and gain. Nowadays, RFLDMOS is than bipolar tube, and GaAs device is more favourable.
The structure of current RFLDMOS is as shown in Figure 1, adopt the substrate mixing high concentration p type impurity, i.e. P type substrate 11, different according to the requirement that device is pressure, in described P type substrate 11, the P type epitaxial layer 12 of growth different-thickness and doping content, is defined by photolithography plate, carries out ion implanting and form light doped drift region 18; With one layer of grid oxic horizon 17 of after heat oxide growth; Depositing polysilicon, photolithography plate defines and etches polysilicon gate 15; Ion implanting and diffusion technique is utilized to form p-well 14, P+ region 19, N+ source region 110 and N+ drain region 111 respectively; Oxide layer below deposit faraday shield layer, then deposit metal or metal silicide, etch faraday shield layer 16. Finally carry out subsequent technique, form RFLDMOS.
At present generally, below faraday shield layer prepared by this method, oxide layer is to be grown by the mode deposited, and its quality is generally poor, and the quality of its quality directly can have influence on the assessment of the reliability of device.
Summary of the invention
The technical problem to be solved is to provide a kind of radio frequency horizontal dual pervasion field effect transistor, and including polysilicon gate and faraday shield layer, described faraday shield layer is polysilicon faraday shield layer.
Further, described polysilicon gate is stepped ramp type.
Further, also including oxide layer below polysilicon, the structure of described oxide layer is stepped ramp type, and namely the oxide layer below described polysilicon gate is thinner than the oxide layer below described polysilicon faraday shield layer.
Further, the thickness of the oxide layer below described polysilicon faraday shield layer is 0.1 micron-1 micron, and the thickness of the oxide layer below described polysilicon gate is 0.005 micron-0.1 micron.
A kind of manufacture method of radio frequency horizontal dual pervasion field effect transistor, including:
Step 1, in P type substrate growing P-type epitaxial layer; Define light doped drift region by photolithography plate, carry out ion implanting.
Step 2, carry out the oxide layer that hot oxide growth is a layer thicker, then pass through photolithography plate definition and the oxide layer below source and grid is removed in whole or in part, then carry out once hot oxygen process, the oxide layer of growth layer again, make the oxide layer structure of step.
Step 3, depositing polysilicon, photolithography plate defines and etches polysilicon gate and faraday shield layer. Making below polysilicon gate is thin oxide layer, is thick oxide layer below polysilicon faraday shield layer.
Step 4, p-well generation type, by self aligned technique after polysilicon gate is formed, increase temperature propelling formed.
Step 5, source and drain end heavily doped region generation type, defined source N+ region, drain terminal N+ region and P+ region by reticle respectively successively, carry out ion implanting respectively.
The formation of step 6, polysilicon plug or metal closures, goes out position and the size of polysilicon plug or metal closures, depositing polysilicon or metal closures by template definition.
Step 7, carry out subsequent technique, form RFLDMOS.
Further, ion described in step 1 is phosphorus or arsenic.
Further, ion implanting described in step 1, its energy is 10keV-500keV, and dosage is 1011-1013cm-2��
Further, the thickness of the relatively thick oxide layer described in step 2 is 0.1 micron-1 micron; The thickness of described relatively thin oxide layer is 0.005 micron-0.1 micron.
Further, the impurity of p-well described in step 4 is boron, and energy is 30-80keV, and dosage is 2e12-2e14cm-2��
Further, the impurity in source N+ region described in step 5 and drain terminal N+ region is phosphorus or arsenic, and energy is 0keV-200keV, and dosage is 1013-1016cm-2��
Further, the impurity of P+ region described in step 5 is boron or boron difluoride, and its energy is 0keV-100keV, and dosage is 1013-1016cm-2��
Radio frequency horizontal dual pervasion field effect transistor of the present invention adopts the structure of polysilicon faraday shield layer, with traditional prepare Faraday shield layer process compared with, this preparation technology is simple, its polysilicon faraday shield layer makes together with polysilicon gate, this method grows the oxide layer below faraday shield layer by the mode of hot oxygen, only increase a thermal oxidation process, decrease oxide layer deposit and Metal deposition and etching process below a faraday shield layer, the quality of the oxide layer below faraday shield layer prepared by the method to be got well by what the mode deposited grew relative to common faraday shield layer, thus enhancing the ruggedness of device, and the device of the present invention covers layer device relative to common metal Faraday, there is the characteristics such as identical breakdown voltage, conducting resistance.
Accompanying drawing explanation
Below in conjunction with the drawings and specific embodiments, the present invention is further detailed explanation:
Fig. 1 is the structural representation of existing RFLDMOS device;
Fig. 2 is RFLDMOS device first embodiment structural representation of the present invention;
Fig. 3 is RFLDMOS device of the present invention second example structure schematic diagram;
Fig. 4 is RFLDMOS device of the present invention with existing RFLDMOS device when puncturing, to the electric field strength profile comparison diagram of light doped region silicon face below polysilicon gate;
Fig. 5 is the breakdown voltage curve chart of RFLDMOS device of the present invention and existing RFLDMOS device;
Fig. 6 a-6h is RFLDMOS device making method step schematic diagram of the present invention.
Primary structure description of symbols:
P type substrate 11P type epitaxial layer 12
P-type polysilicon plug or metal closures 13P trap 14
Polysilicon gate 15 faraday shield layer 16
The lightly doped drift region 18 of oxide layer 17
N+ region, source region, P+ region 19 110
N+ region, drain region 111
P type substrate 21P type epitaxial layer 22
P-type polysilicon plug or metal closures 23P trap 24
Polysilicon gate 25 oxide layer 26
The lightly doped drift region 28 of faraday shield layer 27
N+ region, source region, P+ region 29 210
N+ region, drain region 211
P type substrate 31P type epitaxial layer 32
P-type polysilicon plug or metal closures 33P trap 34
Polysilicon gate 35 oxide layer 36
The lightly doped drift region 38 of faraday shield layer 37
N+ region, source region, P+ region 39 310
N+ region, drain region 311
P type substrate 401P type epitaxial layer 402
Light doped drift region 403 photoresist 404
The oxide layer 406 that thicker oxide layer 405 is relatively thin
Polysilicon gate 407 faraday shield layer 408
P-well 409P+ region 410
Drain terminal N+ region, source N+ region 411 412
Polysilicon plug or metal closures 413
Detailed description of the invention
For enabling your auditor that the purpose of the present invention, feature and effect to be had a better understanding and awareness, below coordinate accompanying drawing describe in detail as after.
As in figure 2 it is shown, be RFLDMOS device first embodiment structural representation of the present invention, wherein adopt the substrate mixing high concentration p type impurity, i.e. P+ substrate 21, different according to the requirement that device is pressure, on described P+ type substrate 21, the P type epitaxial layer 12 of growth different-thickness and doping content, defined by photolithography plate, carry out ion implanting and form light doped drift region 28, with the oxide layer that after heat oxide growth is a layer thicker, then pass through photolithography plate definition and the oxide layer below source and grid is removed in whole or in part, then carry out once hot oxygen process, the oxide layer of growth layer again, make the oxide layer 26 of step, depositing polysilicon, photolithography plate defines and etches polysilicon gate 25 and polysilicon faraday shield layer 27, ion implanting and diffusion technique is utilized to form p-well 24, P+ region 29, N+ source region 210 and N+ drain region 211, finally carry out subsequent technique, form RFLDMOS. wherein, the structure of oxide layer 26 is thicker in the part near drain terminal, and relatively thin near the part of source, forms the polysilicon gate 25 with thin oxide layer, and has the polysilicon faraday shield layer 27 of relatively thick oxide layer. radio frequency horizontal dual pervasion field effect transistor of the present invention adopts the structure of polysilicon faraday shield layer, with traditional prepare Faraday shield layer process compared with, this preparation technology is simple, its polysilicon faraday shield layer makes together with polysilicon gate, this method grows the oxide layer below faraday shield layer by the mode of hot oxygen, only increase a thermal oxidation process, decrease oxide layer deposit and Metal deposition and etching process below a faraday shield layer, the quality of the oxide layer below faraday shield layer prepared by the method to be got well by what the mode deposited grew relative to common faraday shield layer, thus enhancing the ruggedness of device. and the device of the present invention covers layer device relative to common metal Faraday, there is the characteristics such as identical breakdown voltage, conducting resistance.
As shown in Figure 3, for RFLDMOS device of the present invention second example structure schematic diagram, wherein said faraday shield layer 37 is polycrystalline silicon material, adopts polysilicon faraday shield layer, cover layer device relative to common metal Faraday, there is identical breakdown voltage, conducting resistance etc.Described polysilicon gate 35 is the structure of stepped ramp type polysilicon gate, oxide layer is the structure that thin one side is thick on one side below, wherein thick below the polysilicon gate 35 of drain terminal oxide layer, its thickness is the same with the oxidated layer thickness below polysilicon faraday shield layer 37, the effect reducing polysilicon gate lower edge electric field intensity can be played, thus suppressing hot carrier in jection, improve the reliability of device.
If Fig. 4 is RFLDMOS device of the present invention with existing RFLDMOS device when puncturing, to the electric field strength profile comparison diagram of light doped region silicon face below polysilicon gate; Fig. 4 respectively illustrates existing metal Faraday and covers the RFLDMOS of layer, common polysilicon gate and polysilicon faraday shield layer and notch cuttype polysilicon gate and polysilicon faraday shield layer when puncturing, to the electric field strength profile figure of light doped drift region silicon face below polysilicon gate, the area of figure surrounded between this curve and coordinate is the breakdown voltage value of device, figure 4, it is seen that the breakdown voltage of three substantially close to. And this curve chart has two stronger electric field intensity value peaks, first peak is caused by polysilicon gate lower edge, and its size is directly connected to the quality of HCI, and latter one peak is the electric field intensity value of faraday shield layer lower edge. Fig. 4 shows, RFLDMOS containing polysilicon faraday shield layer can cover layer with common metal Faraday and serve the same role, if making the polysilicon gate of notch cuttype, then thick below the polysilicon gate of drain terminal oxide layer, may also operate as the effect reducing polysilicon gate lower edge electric field intensity, thus suppressing HCI.
As it is shown in figure 5, be the breakdown voltage curve chart of RFLDMOS device of the present invention and existing RFLDMOS device; Respectively illustrating existing metal Faraday in Fig. 5 and cover the RFLDMOS breakdown voltage of layer, common polysilicon gate and polysilicon faraday shield layer and notch cuttype polysilicon gate and polysilicon faraday shield layer, as can be seen from Figure 5 three's breakdown voltage is essentially the same.
The manufacture method of radio frequency horizontal dual pervasion field effect transistor of the present invention, its step includes:
Step 1, in P type substrate 401 growing P-type epitaxial layer 402; Defining light doped drift region (NLDD) 403 by photolithography plate, carry out ion implanting, its impurity is phosphorus or arsenic, and its energy is 10keV-500keV, and dosage is 1011-1013cm-2; As shown in Figure 6 a.
Photoresist 404 is removed after being formed in step 2, light doped drift region 403, carry out the oxide layer 405 that hot oxide growth is a layer thicker, thickness is 0.1 micron-1 micron, then passes through photolithography plate definition and the oxide layer below source and grid is removed in whole or in part, such as Fig. 6 b. Then carrying out once hot oxygen process again, the oxide layer of growth layer, the oxide layer 406 of growth layer, thickness is 0.005 micron-0.1 micron, such as Fig. 6 c, makes the oxide layer structure of step.
Step 3, depositing polysilicon, photolithography plate defines and etches polysilicon gate 407 and faraday shield layer 408, forms the polysilicon gate 407 with thin oxide layer, and has the polysilicon faraday shield layer 408 of relatively thick oxide layer, such as Fig. 6 d. Wherein, polysilicon gate 407 can also be stepped ramp type, such as Fig. 6 e.
Step 4, p-well 409 generation type, polysilicon gate 407 formed after by self aligned technique, increase temperature propelling formation. Described p-well impurity is boron, and energy is 30-80keV, and dosage is 1012-1014cm-2, such as Fig. 6 f.
Step 5, source and drain end heavily doped region generation type, defined source N+ region 411, drain terminal N+ region 412 and P+ region 410 by reticle respectively successively, carry out ion implanting respectively. Injecting the N+ of source and drain end, impurity is phosphorus or arsenic, and energy is 0keV-200keV, and dosage is 1013-1016cm-2. Injecting P+, impurity is boron or boron difluoride, and its energy is 0keV-100keV, and dosage is 1013-1016cm-2; As shown in 6g.
The formation of step 6, polysilicon plug or metal closures 413, goes out position and the size of polysilicon plug or metal closures 413, depositing polysilicon or metal closures by template definition. As shown in 6h.
Step 7, carry out subsequent technique, form RFLDMOS.
Above by specific embodiment, the present invention is described in detail, but these have not been construed as limiting the invention. Without departing from the principles of the present invention, those skilled in the art it may also be made that many deformation and improvement, and these also should be regarded as protection scope of the present invention.
Claims (7)
1. the manufacture method of a radio frequency horizontal dual pervasion field effect transistor, it is characterised in that including:
Step 1, in P type substrate growing P-type epitaxial layer; Define light doped drift region by photolithography plate, carry out ion implanting;
Step 2, it is made directly, at P type epitaxial layer, the oxide layer that hot oxide growth is a layer thicker, then pass through photolithography plate definition and the oxide layer below source and grid is removed in whole or in part, then hot oxygen process is carried out once again, the oxide layer of growth layer, makes the oxide layer structure of step;
Step 3, depositing polysilicon, photolithography plate defines and etches polysilicon gate and faraday shield layer;
Step 4, p-well generation type, by self aligned technique after polysilicon gate is formed, increase temperature propelling formed;
Step 5, source and drain end heavily doped region generation type, defined source N+ region, drain terminal N+ region and P+ region by reticle respectively successively, carry out ion implanting respectively;
The formation of step 6, polysilicon plug or metal closures, goes out position and the size of polysilicon plug or metal closures, depositing polysilicon or metal closures by template definition;
Step 7, carry out subsequent technique, form RFLDMOS.
2. manufacture method as claimed in claim 1, it is characterised in that ion described in step 1 is phosphorus or arsenic.
3. manufacture method as claimed in claim 1, it is characterised in that ion implanting described in step 1, its energy is 10keV-500keV, and dosage is 1011-1013cm-2��
4. manufacture method as claimed in claim 1, it is characterised in that the thickness of the relatively thick oxide layer described in step 2 is 0.1 micron-1 micron; The thickness of described relatively thin oxide layer is 0.005 micron-0.1 micron.
5. manufacture method as claimed in claim 1, it is characterised in that the impurity of p-well described in step 4 is boron, and energy is 30-80keV, and dosage is 1012-1014cm-2��
6. manufacture method as claimed in claim 1, it is characterised in that the impurity in source N+ region described in step 5 and drain terminal N+ region is phosphorus or arsenic, and energy is 0kev-200kev, and dosage is 1013-1016cm-2��
7. manufacture method as claimed in claim 1, it is characterised in that the impurity of P+ region described in step 5 is boron or dichloride boron, and its energy is 0kev-100kev, and dosage is 1013-1016cm-2��
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| CN104282762B (en) * | 2014-09-15 | 2017-06-06 | 上海华虹宏力半导体制造有限公司 | Radio frequency horizontal dual pervasion field effect transistor and preparation method thereof |
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| GB0107405D0 (en) * | 2001-03-23 | 2001-05-16 | Koninkl Philips Electronics Nv | Field effect transistor structure and method of manufacture |
| US7005703B2 (en) * | 2003-10-17 | 2006-02-28 | Agere Systems Inc. | Metal-oxide-semiconductor device having improved performance and reliability |
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| US7262476B2 (en) * | 2004-11-30 | 2007-08-28 | Agere Systems Inc. | Semiconductor device having improved power density |
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| CN103035724A (en) | 2013-04-10 |
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