CN103035396A - Lamination type inductance manufacturing process - Google Patents

Lamination type inductance manufacturing process Download PDF

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Publication number
CN103035396A
CN103035396A CN2011103049995A CN201110304999A CN103035396A CN 103035396 A CN103035396 A CN 103035396A CN 2011103049995 A CN2011103049995 A CN 2011103049995A CN 201110304999 A CN201110304999 A CN 201110304999A CN 103035396 A CN103035396 A CN 103035396A
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China
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layer unit
conductive layer
insulation division
section
insulating barrier
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CN2011103049995A
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Chinese (zh)
Inventor
黄其集
林毓政
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MAX ECHO Tech CORP
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MAX ECHO Tech CORP
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Priority to CN2011103049995A priority Critical patent/CN103035396A/en
Publication of CN103035396A publication Critical patent/CN103035396A/en
Pending legal-status Critical Current

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Abstract

The invention relates to a lamination type inductance manufacturing process, which comprises the following steps that (A) an insulating lower base plate is prepared, and a lower conductive layer unit is prepared on the lower base plate; (B) a plurality of middle conductive layer units which are overlapped and positioned above the lower conductive layer unit are prepared in sequence; (C) an upper conductive layer unit is prepared on the top middle conductive layer unit in the middle conductive layer units; (D) an insulating upper base plate is prepared on the upper conductive layer unit, and the upper base plate, the lower base plate, the upper conductive layer unit, the middle conductive layer units and the lower conductive layer unit are formed into a body to be processed; (E) the body is longitudinally cut into a plurality of single bodies; and (F) two conductive ends are sintered on each single body. Through the layer-by-layer preparation process, inductance can be manufactured without perfect alignment, and the manufacturing difficulty and cost are greatly reduced.

Description

Lamination type inductance processing procedure
Technical field
The present invention relates to a kind of inductance processing procedure, particularly relate to a kind of lamination type inductance processing procedure.
Background technology
In " utilizing composite material to realize that miniaturization half lump type low-temp ceramics burns filter altogether ", the Master's thesis of TaiWan, China success university mentioned a kind of LTCC (Low Temperature Co-fired Ceramic) processing procedure.This kind processing procedure is to add other material in glass-ceramic, and forms a tridimensional structure behind Multi-stacking compaction, and this kind structure namely can be used as element or substrate uses.The main step of this kind processing procedure is that the action of first carrying out the filling perforation wiring at a plurality of ceramic green embryos becomes ceramic substrate, then more described ceramic substrate is aimed at and stacking, cuts at last, burns altogether, back-end process finishes finished product.Yet this kind processing procedure but has following shortcoming:
Aim at and stacking process in, essential position that will the described ceramic substrate of very accurate adjustment, otherwise will cause the precisely each other conducting of described ceramic substrate.Because this kind processing procedure requires quite high precision, has caused the degree of difficulty on using this process, has significantly increased production cost.
Summary of the invention
The object of the present invention is to provide a kind of lamination type inductance processing procedure that is easy to produce inductance.
Lamination type inductance processing procedure of the present invention, it is characterized in that comprising the following step: (A) infrabasal plate of an insulation of preparation, lower conductiving layer unit of preparation on this infrabasal plate, this lower conductiving layer unit has a lower insulating barrier and a plurality of lower wire section that is arranged on this time insulating barrier, (B) sequentially prepare a plurality of conductive layer unit that are stacked and are arranged in this top, lower conductiving layer unit, the conductive layer unit has a middle insulating barrier in each, and a plurality of middle conducting line segments that engage with insulating barrier in this, the manufacturing process of conductive layer unit is first an insulating material to be excavated a plurality of perforation in being somebody's turn to do, then a plurality of electric conducting materials are arranged on this insulating material and also extend into respectively in the described perforation, at last described electric conducting material is removed respectively part, make described electric conducting material all present non-looping state, this insulating material and described electric conducting material form respectively insulating barrier and described middle conducting line segment in this, the middle conducting line segment of described middle conductive layer unit is electrically connected along longitudinal direction each other and forms a plurality of middle wires that extend along longitudinal direction, described middle wire is electrically connected with described lower wire section respectively, (C) conductive layer unit in one of the one preparation of the top of described middle conductive layer unit, should have a upper insulating barrier and a plurality of upper conductor section that is arranged at insulating barrier on this in upper conductive layer unit, described upper conductor section is electrically connected with described middle wire respectively, (D) on this on conductive layer unit the preparation insulation upper substrate, this upper substrate, this infrabasal plate, be somebody's turn to do upper conductive layer unit, described middle conductive layer unit, this lower conductiving layer unit forms a body to be processed, (E) this body is cut into a plurality of monomers along longitudinal direction, (F) two conducting end of sintering on each monomer make respectively upper with described monomer of described conducting end, the lower wire section is electrically connected.
Lamination type inductance processing procedure of the present invention, at this step (A), (B), (C), and (D), with a mode of printing prepare this infrabasal plate, this lower conductiving layer unit, described middle conductive layer unit, conductive layer unit this on, reach this upper substrate.
Lamination type inductance processing procedure of the present invention after this step (E), also has a step (E1), in this step (E1), described burden-fluxing sinter is made described monomer crystallization.
Lamination type inductance processing procedure of the present invention, at this step (A), (B), (C), and (D), this mode of printing is screen painting.
Lamination type inductance processing procedure of the present invention, in this step (B), described electric conducting material is when not yet being removed part, and described electric conducting material is respectively a loop kenel.
Lamination type inductance processing procedure of the present invention after this step (F), also has a step (G), in this step (G), electroplates with a described conducting end of metal pair.
Lamination type inductance processing procedure of the present invention, in this step (E), on being somebody's turn to do, lower insulating barrier be cut into respectively a plurality of on, lower insulation division, described middle insulating barrier is cut into respectively a plurality of middle insulation divisions, on being somebody's turn to do, infrabasal plate be cut into respectively a plurality of on, infrabasal plate section, each monomer has an infrabasal plate section, a lower insulation division that is positioned in this infrabasal plate section, a lower wire section that is engaged on this time insulation division, a plurality of middle insulation divisions that are stacked on this time insulation division, a middle wire that extends described middle insulation division, a top upper insulation division of one that is arranged in described insulation division the top, a upper conductor section that is engaged in insulation division on this reaches one and is positioned at the upper substrate section on the insulation division on this.
Lamination type inductance processing procedure of the present invention, at this step (A), (B), (C), (D), and (F), this upper and lower insulating barrier and this upper and lower substrate are made with glass ceramics, described upper and lower conducting line segment and described conducting end are made with silver, this insulating material is glass ceramics, and described electric conducting material is silver.
Lamination type inductance processing procedure of the present invention in this step (B), removes operation with laser to described electric conducting material, with laser this insulating material is excavated described perforation.
Lamination type inductance processing procedure of the present invention, (A) the infrabasal plate section of an insulation of preparation, and in this infrabasal plate section a preparation lower insulation division and lower wire section that is arranged on this time insulation division, (B) sequentially prepare a plurality of insulation division and a plurality of conducting line segments that engage with this insulating barrier respectively that are stacked and are arranged in this time insulation division top, insulation division all is an insulating material to be excavated one bore a hole and form in each, conducting line segment all is to be arranged at an electric conducting material on this insulating material and to extend in this perforation in each, again this electric conducting material is removed part, make described electric conducting material all present non-looping state and form, described middle conducting line segment is electrically connected along longitudinal direction each other and forms a middle wire that extends along longitudinal direction, should be electrically connected with this lower wire section by middle wire, (C) insulation division and a upper conductor section that is arranged at insulating barrier on this in one of the one preparation of the top of described middle insulation division, described upper conductor section is electrically connected with described middle wire respectively, (D) on this, cover the upper substrate section of an insulation on insulation division and this upper conductor section, on being somebody's turn to do, infrabasal plate section, on being somebody's turn to do, lower insulation division, on being somebody's turn to do, the lower wire section, described middle insulation division, should form a monomer by middle wire, (E) two conducting end of sintering on this monomer make respectively upper with this monomer of described conducting end, the lower wire section is electrically connected.
Beneficial effect of the present invention is: see through successively sequentially preparation, can aim at easily each layer and make each layer photograph design conducting, do not need quite high-accuracy technique of alignment, can significantly reduce production costs by this.
Description of drawings
Fig. 1 is a flow chart of the first preferred embodiment of lamination type inductance processing procedure of the present invention;
Fig. 2 is another flow chart of this first preferred embodiment;
Fig. 3 is a stereogram of this first preferred embodiment, and the state of an infrabasal plate of preparation and a lower conductive unit is described;
Fig. 4 is the view that is similar to Fig. 3, illustrates at this time conductive unit to prepare an insulating material and dig out the state of a plurality of perforation;
Fig. 5 is the view that is similar to Fig. 4, illustrates at a plurality of states that extend to respectively the electric conducting material of described perforation of this insulating material preparation;
Fig. 6 is the view that is similar to Fig. 5, and the state that described electric conducting material is removed operation with laser is described;
Fig. 7 is the view that is similar to Fig. 6, and the state of conductive unit on a plurality of middle conductive layers prepare is described;
Fig. 8 is the view that is similar to Fig. 7, illustrates to prepare a upper substrate on the conductive unit to finish the state of a body on this;
Fig. 9 is the view that is similar to Fig. 8, and explanation cuts into this body the state of a plurality of monomers;
Figure 10 is a perspective exploded view of any monomer;
Figure 11 is the view that is similar to Figure 10, and the state that a plurality of conducting end are electrically connected with this monomer is described;
Figure 12 is the three-dimensional combination schematic diagram of this monomer and described conducting end one;
Figure 13 is a flow chart of second preferred embodiment of lamination type inductance processing procedure of the present invention.
Embodiment
The present invention is described in detail below in conjunction with drawings and Examples:
Consult Fig. 1 and Fig. 2, the first preferred embodiment of lamination type inductance processing procedure of the present invention comprises the following step 100-800.
Consult Fig. 1,3, in step 100, the infrabasal plate 1 of an insulation of preparation, and on this infrabasal plate 1, prepare a lower conductiving layer unit 2, this lower conductiving layer unit 2 has a lower insulating barrier 21 and a plurality of lower wire section 22 that is arranged on this time insulating barrier 21.The material of this infrabasal plate 1 and this time insulating barrier 21 is glass ceramics, and the material of described lower wire section 22 is silver.
Consult Fig. 1,4,5,6, in step 200, sequentially prepare a plurality of conductive layer unit 3 that are arranged in these 2 tops, lower conductiving layer unit and are stacked, conductive layer unit 3 has a middle insulating barrier 33 in each, and a plurality of middle conducting line segment 34 that engages with insulating barrier 33 in this.
The manufacturing process of conductive layer unit 3 is first an insulating material 31 to be excavated a plurality of perforation 311 with laser in being somebody's turn to do, then a plurality of electric conducting materials 32 are prepared in and also present respectively a loop kenel on this insulating material 31, and described electric conducting material 32 extends into respectively in the described perforation 311, at last described electric conducting material 32 is removed part with laser respectively, make described electric conducting material 32 all present the non-looping state with a breach 321, insulating barrier 33 and described middle conducting line segment 34 during this insulating material 31 and described electric conducting material 32 form respectively and be somebody's turn to do, the middle conducting line segment 34 of described middle conductive layer unit 3 is electrically connected along longitudinal direction each other and forms a plurality of middle wires 35 (seeing Figure 10) that extend along longitudinal direction, and described middle wire 35 is electrically connected with described lower wire section 22 respectively.This insulating material 31 is glass ceramics, and this electric conducting material 32 is silver.
Because in the present embodiment, be to prepare first electric conducting material 32 to remove part with laser again, therefore can easily described electric conducting material 32 be made the in advance form of design, make described electric conducting material 32 form described middle conducting line segment 34.
Consult Fig. 1,7, in step 300, conductive layer unit 4 on the one of 3 the tops, described middle conductive layer unit prepares one, should have a upper insulating barrier 41 and a plurality of upper conductor section 42 that is arranged at insulating barrier 41 on this in upper conductive layer unit 4, described upper conductor section 42 is electrically connected with described middle wire 35 respectively.Upward the material of insulating barrier 41 is glass ceramics, and the material of described upper conductor section 42 is silver.
Consult Fig. 1,8, in step 400, upper substrate 5 of an insulation of preparation on conductive layer unit 4 on this, this upper substrate 5, this infrabasal plate 1, conductive layer unit 4, described middle conductive layer unit 3, body to be processed 6 of these lower conductiving layer unit 2 compositions on this.In the present embodiment, the material of this upper substrate 5 is glass ceramics.
In the present embodiment, in step 100-400, be that the mode that sees through screen painting prepares this infrabasal plate 1, this lower conductiving layer unit 2, described middle conductive layer unit 3, conductive layer unit 4 this on, reach this upper substrate 5.
Consult Fig. 2,9,10, in step 500, this body 6 is cut into a plurality of monomers 61 along longitudinal direction.On being somebody's turn to do, lower insulating barrier 41,21 be cut into respectively a plurality of on, lower insulation division 411,211, described middle insulating barrier 33 is cut into respectively a plurality of middle insulation divisions 331, on being somebody's turn to do, infrabasal plate 5,1 be cut into respectively a plurality of on, infrabasal plate section 51,11, each monomer 61 has an infrabasal plate section 11, a lower insulation division 211 that is positioned in this infrabasal plate section 11, a lower wire section 22 that is engaged on this time insulation division 211, a plurality of middle insulation divisions 331 that are stacked on this time insulation division 211, a middle wire 35 that extends described middle insulation division 331, a top upper insulation division 411 of one that is arranged in described insulation division 331 the tops, a upper conductor section 42 that is engaged in insulation division 411 on this reaches one and is positioned at the upper substrate section 51 on the insulation division 411 on this.
In step 600, described monomer 61 sintering are made described monomer 61 crystallizations.
Consult Fig. 2,11 in step 700, two conducting end 7 of sintering on each monomer 61 are electrically connected respectively described conducting end 7 with the upper and lower conducting line segment 22 of described monomer 61.The material of described conducting end 7 is silver.
In step 800, to electroplate with a described conducting end 7 of metal pair, this monomer 61 forms an inductance 8 with this conducting end 7.This metal is tin in the present embodiment.
Be to see through successively printing to make this body 6 in the present embodiment, again this body cut into described monomer 61, by this, can produce easily resistance.
Consult Figure 11,13, second preferred embodiment of lamination type inductance processing procedure of the present invention comprises the following step 101-501.
In step 101, the infrabasal plate section 11 of an insulation of preparation, and in this infrabasal plate section 11, prepare a lower insulation division 211 and a lower wire section 22 that is arranged on this time insulation division 211.
In step 201, sequentially prepare a plurality of insulation division 331 and a plurality of conducting line segments 34 that engage with this insulation division 331 respectively that are stacked and are arranged in this time insulation division 211 tops, insulation division 331 all is that an insulating material 31 is excavated a perforation 311 and form in each, conducting line segment 34 all is to be arranged at an electric conducting material 32 on this insulating material 31 and to extend in this perforation 311 in each, again this electric conducting material 32 is removed part, make described electric conducting material 32 all present non-looping state and form, described middle conducting line segment 34 is electrically connected along longitudinal direction each other and forms a middle wire 35 that extends along longitudinal direction, and wire 35 is electrically connected with this lower wire section 22 in this.
In step 301, insulation division 411 and a upper conductor section 42 that is arranged at insulation division 411 on this on the one of described middle insulation division 331 the tops prepares one, described upper conductor section 42 is electrically connected with described middle wire 35 respectively.
In step 401, on this, cover the upper substrate section 51 of an insulation on insulation division 411 and this upper conductor section 42, this upper and lower baseplate part 51,11, this upper and lower insulation division 411,211, this upper and lower conducting line segment 42,22, described middle insulation division 331, monomer 61 of wire 35 compositions in this.
In step 501, two conducting end 7 of sintering on this monomer 61 are electrically connected respectively described conducting end 7 with the upper and lower conducting line segment 22 of this monomer 61.
Be to form this monomer 61 by successively preparation in the present embodiment, so, second preferred embodiment also can reach the effect identical with this first embodiment.
In sum, the mode that sees through successively preparation is made inductance, can avoid carrying out high precision as one of known techniques and aim at operation, and the degree of difficulty that can significantly lower by this production is saved production cost, so really can reach the present invention's purpose.

Claims (10)

1. lamination type inductance processing procedure, it is characterized in that comprising the following step: (A) infrabasal plate of an insulation of preparation, lower conductiving layer unit of preparation on this infrabasal plate, this lower conductiving layer unit has a lower insulating barrier and a plurality of lower wire section that is arranged on this time insulating barrier, (B) sequentially prepare a plurality of conductive layer unit that are stacked and are arranged in this top, lower conductiving layer unit, the conductive layer unit has a middle insulating barrier in each, and a plurality of middle conducting line segments that engage with insulating barrier in this, the manufacturing process of conductive layer unit is first an insulating material to be excavated a plurality of perforation in being somebody's turn to do, then a plurality of electric conducting materials are arranged on this insulating material and also extend into respectively in the described perforation, at last described electric conducting material is removed respectively part, make described electric conducting material all present non-looping state, this insulating material and described electric conducting material form respectively insulating barrier and described middle conducting line segment in this, the middle conducting line segment of described middle conductive layer unit is electrically connected along longitudinal direction each other and forms a plurality of middle wires that extend along longitudinal direction, described middle wire is electrically connected with described lower wire section respectively, (C) conductive layer unit in one of the one preparation of the top of described middle conductive layer unit, should have a upper insulating barrier and a plurality of upper conductor section that is arranged at insulating barrier on this in upper conductive layer unit, described upper conductor section is electrically connected with described middle wire respectively, (D) on this on conductive layer unit the preparation insulation upper substrate, this upper substrate, this infrabasal plate, be somebody's turn to do upper conductive layer unit, described middle conductive layer unit, this lower conductiving layer unit forms a body to be processed, (E) this body is cut into a plurality of monomers along longitudinal direction, (F) two conducting end of sintering on each monomer make respectively upper with described monomer of described conducting end, the lower wire section is electrically connected.
2. lamination type inductance processing procedure according to claim 1, it is characterized in that: at this step (A), (B), (C), and (D), with a mode of printing prepare this infrabasal plate, this lower conductiving layer unit, described middle conductive layer unit, conductive layer unit on this, and this upper substrate.
3. lamination type inductance processing procedure according to claim 2 is characterized in that: after this step (E), also have a step (E1), in this step (E1), described burden-fluxing sinter is made described monomer crystallization.
4. lamination type inductance processing procedure according to claim 2 is characterized in that: at this step (A), (B), (C), and (D), this mode of printing is screen painting.
5. lamination type inductance processing procedure according to claim 2, it is characterized in that: in this step (B), described electric conducting material is when not yet being removed part, and described electric conducting material is respectively a loop kenel.
6. lamination type inductance processing procedure according to claim 2 is characterized in that: after this step (F), also have a step (G), in this step (G), electroplate with a described conducting end of metal pair.
7. lamination type inductance processing procedure according to claim 2, it is characterized in that: in this step (E), on being somebody's turn to do, lower insulating barrier be cut into respectively a plurality of on, lower insulation division, described middle insulating barrier is cut into respectively a plurality of middle insulation divisions, on being somebody's turn to do, infrabasal plate be cut into respectively a plurality of on, infrabasal plate section, each monomer has an infrabasal plate section, a lower insulation division that is positioned in this infrabasal plate section, a lower wire section that is engaged on this time insulation division, a plurality of middle insulation divisions that are stacked on this time insulation division, a middle wire that extends described middle insulation division, a top upper insulation division of one that is arranged in described insulation division the top, a upper conductor section that is engaged in insulation division on this reaches one and is positioned at the upper substrate section on the insulation division on this.
8. lamination type inductance processing procedure according to claim 2, it is characterized in that: at this step (A), (B), (C), (D), and (F), this upper and lower insulating barrier and this upper and lower substrate are made with glass ceramics, described upper and lower conducting line segment and described conducting end are made with silver, this insulating material is glass ceramics, and described electric conducting material is silver.
9. lamination type inductance processing procedure according to claim 2 is characterized in that: in this step (B), with laser described electric conducting material is removed operation, with laser this insulating material is excavated described perforation.
10. lamination type inductance processing procedure, it is characterized in that comprising the following step: (A) the infrabasal plate section of an insulation of preparation, and in this infrabasal plate section a preparation lower insulation division and lower wire section that is arranged on this time insulation division, (B) sequentially prepare a plurality of insulation division and a plurality of conducting line segments that engage with this insulating barrier respectively that are stacked and are arranged in this time insulation division top, insulation division all is an insulating material to be excavated one bore a hole and form in each, conducting line segment all is to be arranged at an electric conducting material on this insulating material and to extend in this perforation in each, again this electric conducting material is removed part, make described electric conducting material all present non-looping state and form, described middle conducting line segment is electrically connected along longitudinal direction each other and forms a middle wire that extends along longitudinal direction, should be electrically connected with this lower wire section by middle wire, (C) insulation division and a upper conductor section that is arranged at insulating barrier on this in one of the one preparation of the top of described middle insulation division, described upper conductor section is electrically connected with described middle wire respectively, (D) on this, cover the upper substrate section of an insulation on insulation division and this upper conductor section, on being somebody's turn to do, infrabasal plate section, on being somebody's turn to do, lower insulation division, on being somebody's turn to do, the lower wire section, described middle insulation division, should form a monomer by middle wire, (E) two conducting end of sintering on this monomer make respectively upper with this monomer of described conducting end, the lower wire section is electrically connected.
CN2011103049995A 2011-09-30 2011-09-30 Lamination type inductance manufacturing process Pending CN103035396A (en)

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Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP3097569B2 (en) * 1996-09-17 2000-10-10 株式会社村田製作所 Manufacturing method of multilayer chip inductor
TW527613B (en) * 2000-12-19 2003-04-11 Murata Manufacturing Co Laminated coil component and its manufacturing method
US20090154052A1 (en) * 2005-09-07 2009-06-18 Naotsugu Yoneda Composite electronic device
CN201285697Y (en) * 2008-08-29 2009-08-05 深圳振华富电子有限公司 Inducer
TW200943329A (en) * 2008-03-18 2009-10-16 Murata Manufacturing Co A laminated electronic part and its manufacturing method

Patent Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP3097569B2 (en) * 1996-09-17 2000-10-10 株式会社村田製作所 Manufacturing method of multilayer chip inductor
TW527613B (en) * 2000-12-19 2003-04-11 Murata Manufacturing Co Laminated coil component and its manufacturing method
US20090154052A1 (en) * 2005-09-07 2009-06-18 Naotsugu Yoneda Composite electronic device
TW200943329A (en) * 2008-03-18 2009-10-16 Murata Manufacturing Co A laminated electronic part and its manufacturing method
CN201285697Y (en) * 2008-08-29 2009-08-05 深圳振华富电子有限公司 Inducer

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Application publication date: 20130410