CN103034619B - A kind of implementation method of FFT no-coherence cumulating and device - Google Patents
A kind of implementation method of FFT no-coherence cumulating and device Download PDFInfo
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- CN103034619B CN103034619B CN201210538841.9A CN201210538841A CN103034619B CN 103034619 B CN103034619 B CN 103034619B CN 201210538841 A CN201210538841 A CN 201210538841A CN 103034619 B CN103034619 B CN 103034619B
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Abstract
The invention discloses a kind of implementation method and device of FFT no-coherence cumulating, comprising: carry out FFT computing to input signal, each frame obtains N number of data, asks mould to each data; No-coherence cumulating is carried out to the mode of each the data acquisition shift LD asked after mould; Peakvalue's checking is carried out to the data after no-coherence cumulating: the maximum frequency value detecting each frame data, and the frequency of its correspondence.The present invention utilizes FFT order to go out several features, and adopt shift LD mode to carry out non-coherent accumulation, logic is simple, do not need extra control, take resource few, sequential control operation that need not be loaded down with trivial details, processing speed wants fast, obviously than dual port RAM or FIFO simple to operate.
Description
Technical field
The present invention relates to digital signal processing technique field, particularly relate to a kind of FFT(FastFourierTransform, Fast Fourier Transform (FFT)) implementation method of no-coherence cumulating and device.
Background technology
Fft algorithm, is widely used in the fields such as radar system, image procossing, communication system, Aero-Space.It is the one fast and effeciently algorithm in order to reduce discrete Fourier transformation calculation times.
Discrete Fourier transformation (DiscreteFourierTransform, DFT) be a kind of important algorithm in digital signal processing, the conversion that continuous function is formed at time domain, frequency domain sampling can be regarded as, but because its calculated amount is large, operation time long shortcoming make its usable range limited.Nineteen sixty-five, Cooley and Tukey proposes fft algorithm, utilize periodicity and the symmetry of twiddle factor, the DFT of long sequence is decomposed into the DFT of more small point, thus reduce multiplication number of times, improve counting yield, this algorithm just obtains very big concern once appearance, rapidly, there is a lot of relevant algorithm in development.
Fourier transform, just had been found that and knows that frequency-domain analysis is usually more superior than time-domain analysis already, not only simply, and being easy to Analysis of Complex signal before more than 100 years.Such as we receive one section of gps signal, if carry out despreading (but not adding up) to it, do not consider the impact of yard Doppler effect and noise etc., one section of sine wave signal (residual frequency difference) can be obtained, spectrum analysis (such as carrying out FFT conversion) is carried out to it, just can obtain peak value spectral line; Again because signal bandwidth now reduces, just can reduce its sampling rate by cumulative way, and then carry out spectrum analysis.
Signal obtains the information of its frequency domain after FFT computing, there will be the peak value of frequency.If the signal to noise ratio (S/N ratio) of signal is very low, then must improve accordingly fft algorithm, take effective measures before carrying out peakvalue's checking judgement and improve signal to noise ratio (S/N ratio).The method of conventional improvement signal to noise ratio (S/N ratio) has coherent accumulation and no-coherence cumulating two kinds of methods.Coherent accumulation, is directly added the correlated results of adjacent periods exactly, utilizes the correlativity of signal in integral time, the energy accumulation of signal is got up, and noise does not have coherence within integral time, cumulative process is equivalent to be averaged noise, can significantly improve signal to noise ratio (S/N ratio) like this.And no-coherence cumulating, be then add up again after correlated results being asked mould square, compared with coherent accumulation, eliminate phase information, only remain amplitude information, so noise power also corresponding growth, need to increase accumulative frequency, just can obtain comparatively satisfactory SN ratio.
When carrying out no-coherence cumulating, RAM module carries out the storage of data, is very common storage mode, fairly simple, but need the read-write of control RAM enable, read address, write address, read data and write data, could the read-write of control data.FIFO(FirstInFirstOut, First Input First Output), be a kind of traditional data buffer, the instruction be introduced into first completes and retires from office, and and then just performs Article 2 instruction.FIFO is generally used for the data transmission between different clock-domains, and synchronization fifo is read clock and write clock is same clock, at clock along read-write operation occurring temporarily simultaneously.Asynchronous FIFO read-write clock is inconsistent, independent mutually.General in massive store unit, in order to make storage speed and reading speed match, adopt FIFO.
Summary of the invention
The technical problem to be solved in the present invention is a kind of implementation method and device of FFT no-coherence cumulating, adopts dual port RAM or FIFO to carry out the problem of no-coherence cumulating complicated operation in order to solve prior art.
For solving the problems of the technologies described above, on the one hand, the invention provides a kind of implementation method of FFT no-coherence cumulating, comprising:
Carry out FFT computing to input signal, each frame obtains N number of data, asks mould to each data;
No-coherence cumulating is carried out to the mode of each the data acquisition shift LD asked after mould;
Peakvalue's checking is carried out to the data after no-coherence cumulating: the maximum frequency value detecting each frame data, and the frequency of its correspondence.
Further, ask mould to refer to each data and modulus value square is asked to each data.
Further, adopt the mode of shift LD to carry out no-coherence cumulating specifically to comprise:
Each data are once deposited at each clock, when next number according to stored in time, the data entirety stored in register is shifted to the right, if the register being positioned at low order end has data to shift out, then by these data with current will stored in data be added, stored in the register of high order end; If the register being positioned at low order end does not have data to shift out, then by current will stored in data stored in the register of high order end.
Further, the number of register is with to obtain data amount check after each frame FFT computing identical.
On the other hand, the present invention also provides a kind of implement device of FFT no-coherence cumulating, comprising:
Ask mould module, for carrying out FFT computing to input signal, each frame obtains N number of data, asks mould to each data;
No-coherence cumulating module, for carrying out no-coherence cumulating to the mode of each the data acquisition shift LD asked after mould;
Peak detection block, for carrying out peakvalue's checking to the data after no-coherence cumulating: the maximum frequency value detecting each frame data, and the frequency of its correspondence.
Further, ask mould module to ask mould to refer to each data described in and modulus value square is asked to each data.
Further, no-coherence cumulating module specifically for:
Each data are once deposited at each clock, when next number according to stored in time, the data entirety stored in register is shifted to the right, if the register being positioned at low order end has data to shift out, then by these data with current will stored in data be added, stored in the register of high order end; If the register being positioned at low order end does not have data to shift out, then by current will stored in data stored in the register of high order end.
Further, the number of register is with to obtain data amount check after each frame FFT computing identical.
Beneficial effect of the present invention is as follows:
The present invention utilizes FFT order to go out several features, and adopt shift LD mode to carry out non-coherent accumulation, logic is simple, do not need extra control, take resource few, sequential control operation that need not be loaded down with trivial details, processing speed wants fast, obviously than dual port RAM or FIFO simple to operate.
Accompanying drawing explanation
Fig. 1 is the process flow diagram of the implementation method of a kind of FFT no-coherence cumulating in the embodiment of the present invention;
Fig. 2 is a kind of FFT no-coherence cumulating hardware implementing figure in the embodiment of the present invention.
Embodiment
Below in conjunction with accompanying drawing and embodiment, the present invention is further elaborated.Should be appreciated that specific embodiment described herein only in order to explain the present invention, do not limit the present invention.
The present invention adopts the mode of no-coherence cumulating that the FFT result of varying input signal is added up, detection peak.The present invention realizes the difference of FFT result no-coherence cumulating, and the storage mode being mainly reflected in accumulation result is different, and traditional mode can control it with dual port RAM or FIFO.
As shown in Figure 1, the embodiment of the present invention relates to a kind of implementation method of FFT no-coherence cumulating, comprising:
Step S101, carries out FFT computing to input signal, and each frame FFT result obtains N number of data, asks mould to each data.
The embodiment of the present invention obtains 256 data instances with the FFT computing of each frame and is described; But not can only limit and count, N value can be other numerical value for this reason.
Carry out FFT computing to input signal, the base 2-FFT computing of 256 that what the embodiment of the present invention was carried out is, after given input signal, through FFT computing, each frame FFT result obtained is 256 of its frequency domain values frequently.
Ask mould to be to 256 of FFT result values frequently, carry out asking modular arithmetic.Consider during hardware implementing that the application condition of evolution is large, so the embodiment of the present invention onlys demand modulus value square, be convenient to computing.
Step S102, carries out no-coherence cumulating to asking the mode of the data acquisition shift LD after mould: be add up to the FFT result of each frame, when reseting port sets high (low effectively), adds up and carries out always, when reseting port sets low, do not add up.Reseting port controls by controlling side, and such as, when carrying out no-coherence cumulating, then set high by reseting port, when no-coherence cumulating is complete, reseting port sets low.
Accumulation result stores: the embodiment of the present invention adopts the mode of shift LD, stores FFT end value.The number of register is with to obtain data amount check after each frame FFT computing identical.Reg0, reg1, reg2 ...., reg255 be arrange 256 registers, to 256 frequency values carry out displacement storage.Each data are once deposited at each clock, when next number according to stored in time, the data entirety stored in register is shifted to the right, if the register being positioned at low order end has data to shift out, then by these data with current will stored in data be added, stored in the register of high order end; If the register being positioned at low order end does not have data to shift out, then by current will stored in data stored in the register of high order end.Such as, when depositing first data in the first frame, existed in register reg0; When depositing the second data, first by the data in register reg0 stored in reg1, then, by second data stored in register reg0, by that analogy, until by 256 data completely all stored in 256 registers; When first data stored in the second frame, first by register reg0, reg1, reg2 ..., data in reg255 are shifted to the right, successively after in reg255, data shift out, stored in register reg0 after being added with first data of the second frame, by that analogy, until all data have been deposited.That is frame data have 256 altogether, and each data needs to carry out successively asking mould, no-coherence cumulating, shift LD, and after living through 256 clocks, the data of this frame have all been stored in 256 registers; After next frame data come, then after carrying out 256 clocks, accumulated value is just present in these 256 registers, but now peakvalue's checking is the testing result of carrying out the previous frame data accumulated value of frame data in the past (or and).
Step S103, carries out peakvalue's checking to the data after no-coherence cumulating: detect each frame data, detects its maximum frequency value, and the frequency of its correspondence, is analyzed by frequency spectrum.But be now the result of delay one frame, what detect specifically is the maximal value of upper frame data and the former accumulated value of frame data.The embodiment of the present invention only relates to the detection of maximum frequency value, does not relate to spectrum analysis, therefore, no longer describes about spectrum analysis.
In addition, the invention still further relates to a kind of implement device realizing the FFT no-coherence cumulating of said method, comprising:
Ask mould module, for carrying out FFT computing to input signal, each frame obtains N number of data, asks mould to each data;
No-coherence cumulating module, for carrying out no-coherence cumulating to the mode of each the data acquisition shift LD asked after mould;
Peak detection block, for carrying out peakvalue's checking to the data after no-coherence cumulating: the maximum frequency value detecting each frame data, and the frequency of its correspondence.
Wherein, ask mould module to ask mould to refer to each data described in and modulus value square is asked to each data.
Wherein, no-coherence cumulating module specifically for:
Each data are once deposited at each clock, when next number according to stored in time, the data entirety stored in register is shifted to the right, if the register being positioned at low order end has data to shift out, then by these data with current will stored in data be added, stored in the register of high order end; If the register being positioned at low order end does not have data to shift out, then by current will stored in data stored in the register of high order end.
Wherein, the number of register is with to obtain data amount check after each frame FFT computing identical.As can be seen from the above-described embodiment, the present invention utilizes FFT order to go out several features, shift LD mode is adopted to carry out non-coherent accumulation, logic is simple, do not need extra control, take resource few, sequential control operation that need not be loaded down with trivial details, processing speed wants fast, obviously than dual port RAM or FIFO simple to operate.
Although be example object, disclose the preferred embodiments of the present invention, it is also possible for those skilled in the art will recognize various improvement, increase and replacement, and therefore, scope of the present invention should be not limited to above-described embodiment.
Claims (6)
1. an implementation method for FFT no-coherence cumulating, is characterized in that, comprising:
Carry out FFT computing to input signal, each frame obtains N number of data, asks mould to each data;
No-coherence cumulating is carried out to the mode of each the data acquisition shift LD asked after mould; Wherein, adopt the mode of shift LD to carry out no-coherence cumulating specifically to comprise: each data are once deposited at each clock, when next number according to stored in time, data entirety stored in register is shifted to the right, if the register being positioned at low order end has data to shift out, then by these data with current will stored in data be added, stored in the register of high order end; If the register being positioned at low order end does not have data to shift out, then by current will stored in data stored in the register of high order end;
Peakvalue's checking is carried out to the data after no-coherence cumulating: the maximum frequency value detecting each frame data, and the frequency of its correspondence.
2. the implementation method of FFT no-coherence cumulating as claimed in claim 1, is characterized in that, ask mould to refer to ask modulus value square to each data to each data.
3. the implementation method of FFT no-coherence cumulating as claimed in claim 1, is characterized in that, the number of register is with to obtain data amount check after each frame FFT computing identical.
4. an implement device for FFT no-coherence cumulating, is characterized in that, comprising:
Ask mould module, for carrying out FFT computing to input signal, each frame obtains N number of data, asks mould to each data;
No-coherence cumulating module, for carrying out no-coherence cumulating to the mode of each the data acquisition shift LD asked after mould; Each data are once deposited at each clock, when next number according to stored in time, the data entirety stored in register is shifted to the right, if the register being positioned at low order end has data to shift out, then by these data with current will stored in data be added, stored in the register of high order end; If the register being positioned at low order end does not have data to shift out, then by current will stored in data stored in the register of high order end;
Peak detection block, for carrying out peakvalue's checking to the data after no-coherence cumulating: the maximum frequency value detecting each frame data, and the frequency of its correspondence.
5. the implement device of FFT no-coherence cumulating as claimed in claim 4, is characterized in that, described in ask mould module to ask mould to refer to each data to ask modulus value square to each data.
6. the implement device of FFT no-coherence cumulating as claimed in claim 4, is characterized in that, the number of register is with to obtain data amount check after each frame FFT computing identical.
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| CN101261318A (en) * | 2008-04-03 | 2008-09-10 | 北京航空航天大学 | High dynamic state spread-spectrum precise distance measurement receiving machine |
| CN102053250A (en) * | 2010-12-29 | 2011-05-11 | 成都国星通信有限公司 | Two-directional pseudo code parallel search system and realization method thereof |
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| CN101261318A (en) * | 2008-04-03 | 2008-09-10 | 北京航空航天大学 | High dynamic state spread-spectrum precise distance measurement receiving machine |
| CN102053250A (en) * | 2010-12-29 | 2011-05-11 | 成都国星通信有限公司 | Two-directional pseudo code parallel search system and realization method thereof |
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