CN103021464A - Memory chip programmer, setting of memory chip programmer and method for carrying out programming control on memory chip - Google Patents

Memory chip programmer, setting of memory chip programmer and method for carrying out programming control on memory chip Download PDF

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Publication number
CN103021464A
CN103021464A CN201210553347XA CN201210553347A CN103021464A CN 103021464 A CN103021464 A CN 103021464A CN 201210553347X A CN201210553347X A CN 201210553347XA CN 201210553347 A CN201210553347 A CN 201210553347A CN 103021464 A CN103021464 A CN 103021464A
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storage chip
programmable device
interface
controller
central processing
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CN201210553347XA
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莫越章
张晓成
雷红章
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Shanghai Gongjin Communication Technology Co Ltd
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Shanghai Gongjin Communication Technology Co Ltd
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Priority to CN201210553347XA priority Critical patent/CN103021464A/en
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Abstract

The invention relates to a memory chip programmer, a setting of the memory chip programmer and a method for carrying out programming control on memory chips and belongs to the technical field of computers. The memory chip programmer disclosed by the invention comprises a central processing module integrated with a plurality of different types of memory chip controllers; the central processing module is connected with the corresponding memory chips by software ports of various types of memory chips so as to realize erasing, programming and reading operations on the memory chips. After the setting of the memory chip programmer and the method for carrying out programming control on the memory chips, which are disclosed by the invention, are utilized, under the condition that an internal algorithm of the memory chips do not need to be known, the memory chip programmer can carry out erasing, programming and reading operations on the memory chips by the software ports of the memory chips so as to effectively shorten the development period, reduce development cost and simplify the user operation. Moreover, the memory chip programmer, the setting of the memory chip programmer and the method for carrying out programming control on the memory chips, which are disclosed by the invention, also have wide application ranges.

Description

Storage chip programmable device and arrange and storage chip is carried out programmable control method
Technical field
The present invention relates to field of computer technology, particularly the programmable device technical field specifically refers to a kind of storage chip programmable device and setting thereof and storage chip is carried out programmable control method.
Background technology
Society, the infotech explosive growth, various storage chips are developed, and are used as the carrier of software and data.In software development process and plant produced, all need storage chip is carried out burning.Will be with software and data programming in storage chip, need to be by programmable device or simulator.
Present existing storage chip programmable device has been skipped the software interface that storage chip carries, and in programmable device, realize the software interface of storage chip, like this when storage chip upgrades, need to restudy the storage chip algorithm, realize the storage chip software interface, cause the programmable device complicated operation, the construction cycle is long, and cost of development is higher problem also.
Summary of the invention
The objective of the invention is to have overcome above-mentioned shortcoming of the prior art, a kind of software interface that utilizes storage chip itself is provided, do not need to understand the storage chip internal algorithm, operations such as can wiping, programme and read storage chip, and the construction cycle is short, low price, the user is simple to operate, and usable range storage chip programmable device and arrange and storage chip is carried out programmable control method comparatively widely.
In order to realize above-mentioned purpose, storage chip programmable device of the present invention has following formation:
This storage chip programmable device comprises central processing module, be integrated with a plurality of dissimilar storage chip controllers in the described central processing module, described central processing module connects corresponding storage chip by the software port of all types of storage chips, in order to described storage chip is wiped, programming and read operation.
Central processing module in this storage chip programmable device comprises: kernel control module and application controls unit.The kernel control module comprises described a plurality of dissimilar storage chip controller, the driving of described each storage chip is provided, and the command interface of wiping and read and write storage chip is provided; The driving of each storage chip that the application controls unit provides according to described kernel control module and the command interface of wiping and read and write storage chip; The download and input of data order is provided; Realize the wiping of corresponding storage chip, programming and read operation by the software port of all types of storage chips.
In this storage chip programmable device, described central processing module also comprises the port controlling unit.The port controlling unit provides the connectivity port that connects described all types of storage chip controller.
In this storage chip programmable device, described this programmable device also comprises the Universal base interface, and described port controlling unit connects described storage chip by described Universal base interface.The Universal base interface can be one or more in 48 stitch bases, 56 stitch bases and the SPI Flash base.
In this storage chip programmable device, described port controlling unit comprises one or more in cable interface, USB interface and the serial line interface, and described cable interface, USB interface and serial line interface are in order to this programmable device data writing.
In this storage chip programmable device, described a plurality of dissimilar storage chip controllers comprise network interface card controller, I2C controller, USB controller, SPI controller, Nand Flash controller, Nor Flash controller and Uart controller.
In this storage chip programmable device, described programmable device is supported one or more in JFFS2 file system, UBIFS file system, CramFS file system, RamFS file system, RomFS file system, YafFS2 file system and the SquashFS file system.
The present invention also provides a kind of setting of storage chip programmable device and the method for storage chip being carried out programming Control, and the method may further comprise the steps:
(1) integrated a plurality of dissimilar storage chip controllers in the central processing module of described storage chip programmable device;
(2) described central processing module is connected to the software port of all types of storage chips;
(3) described storage chip programmable device by described software port to the storage chip of outside wipe, programming and read operation.
Adopted the storage chip programmable device of this invention, it comprises the central processing module that is integrated with a plurality of dissimilar storage chip controllers, this central processing module connects corresponding storage chip by the software port of all types of storage chips, thus realize to described storage chip wipe, programming and read operation.Utilize the setting of storage chip programmable device of the present invention and the method for storage chip being carried out programming Control, do not needing to understand in the situation of storage chip internal algorithm, the storage chip programmable device can cross by storage chip the software port to storage chip wipe, programming and read operation, thereby effectively shorten the construction cycle, reducing development cost, it is simple to operate to simplify the user, and storage chip programmable device of the present invention and arrange and that storage chip is carried out the usable range of programmable control method is also comparatively extensive.
Description of drawings
Fig. 1 is the structural representation of storage chip programmable device of the present invention.
Fig. 2 is the software architecture synoptic diagram of storage chip programmable device of the present invention.
Embodiment
In order more clearly to understand technology contents of the present invention, describe in detail especially exemplified by following examples.
See also shown in Figure 1ly, be the structural representation of storage chip programmable device of the present invention.
In one embodiment, this storage chip programmable device comprises central processing module, be integrated with a plurality of dissimilar storage chip controllers in the described central processing module, described central processing module connects corresponding storage chip by the software port of all types of storage chips, in order to described storage chip is wiped, programming and read operation.Wherein, central processing module comprises kernel control module, application controls unit and port controlling unit.The kernel control module comprises described a plurality of dissimilar storage chip controller, the driving of described each storage chip is provided, and the command interface of wiping and read and write storage chip is provided; The driving of each storage chip that the application controls unit provides according to described kernel control module and the command interface of wiping and read and write storage chip; The download and input of data order is provided; Realize the wiping of corresponding storage chip, programming and read operation by the software port of all types of storage chips.The port controlling unit provides the connectivity port that connects described all types of storage chip controller.This storage chip programmable device can be supported one or more in JFFS2 file system, UBIFS file system, CramFS file system, RamFS file system, RomFS file system, YafFS2 file system and the SquashFS file system.
In a kind of more preferably embodiment, this programmable device also comprises the Universal base interface, and described port controlling unit connects described storage chip by described Universal base interface.Described Universal base interface can be one or more in 48 stitch bases, 56 stitch bases and the SPI Flash base.
In preferred embodiment, described port controlling unit comprises one or more in cable interface, USB interface and the serial line interface, and described cable interface, USB interface and serial line interface are in order to this programmable device data writing.Described a plurality of dissimilar storage chip controller comprises network interface card controller, I2C controller, USB controller, SPI controller, Nand Flash controller, NorFlash controller and Uart controller.
The present invention also provides a kind of setting of storage chip programmable device and the method for storage chip being carried out programming Control, and its embodiment may further comprise the steps:
(1) integrated a plurality of dissimilar storage chip controllers in the central processing module of described storage chip programmable device;
(2) described central processing module is connected to the software port of all types of storage chips;
(3) described storage chip programmable device by described software port to the storage chip of outside wipe, programming and read operation.
In actual applications, storage chip programmable device of the present invention has following characteristics:
(1) as shown in Figure 1, the processor of described programmable device needs integrated network card, I2C, SPI, Nand Flash, the controllers such as Nor Flash, Uart;
(2) described programmable device installing operating system needs to possess the driving of above-mentioned controller in the operating system;
(3) by netting twine or USB line operational order and the file transfer that needs burning are arrived described programmable device;
(4) described programmable device writes storage chip by its operating system with the data that obtain.
Particularly, the software architecture of storage chip programmable device of the present invention as shown in Figure 2.And on hardware, the processor of programmable device needs integrated network card, i2c, USB, spi, Nand Flash, the controllers such as Nor Flash, Uart; Programmable device has the operating system of customization, and possesses the driving of above-mentioned controller.The file system that the operating system support is commonly used now is such as file system such as jffs2, ubifs, squash^; Operating system is also supported each large chip manufacturer storage drive, such as spansion and mxic etc.Each storage chip drives to realize and to provide wipes the functions such as read-write to chip.Software on the personal computer provides visualization interface for user operation, can Selective storage chip model; The address that writes chip can be set; Whether need can select swap byte etc.Hardware design provides compatible base interface, supports the base that 48Pin, 56Pin commonly used, spi flash etc. are commonly used, can design distinctive base or adopt existing base.Carry out data interaction by the software on USB interface or netting twine or serial ports and the programmable device, and data write storage chip the most at last.
Adopted the storage chip programmable device of this invention, it comprises the central processing module that is integrated with a plurality of dissimilar storage chip controllers, this central processing module connects corresponding storage chip by the software port of all types of storage chips, thus realize to described storage chip wipe, programming and read operation.Utilize the setting of storage chip programmable device of the present invention and the method for storage chip being carried out programming Control, do not needing to understand in the situation of storage chip internal algorithm, the storage chip programmable device can cross by storage chip the software port to storage chip wipe, programming and read operation, thereby effectively shorten the construction cycle, reducing development cost, it is simple to operate to simplify the user, and storage chip programmable device of the present invention and arrange and that storage chip is carried out the usable range of programmable control method is also comparatively extensive.
In this instructions, the present invention is described with reference to its specific embodiment.But, still can make various modifications and conversion obviously and not deviate from the spirit and scope of the present invention.Therefore, instructions and accompanying drawing are regarded in an illustrative, rather than a restrictive.

Claims (9)

1. storage chip programmable device, it is characterized in that, comprise central processing module, be integrated with a plurality of dissimilar storage chip controllers in the described central processing module, described central processing module connects corresponding storage chip by the software port of all types of storage chips, in order to described storage chip is wiped, programming and read operation.
2. storage chip programmable device according to claim 1 is characterized in that, comprises in the described central processing module:
The kernel control module comprises described a plurality of dissimilar storage chip controller, the driving of described each storage chip is provided, and the command interface of wiping and read and write storage chip is provided;
The application controls unit, the driving of each storage chip that provides according to described kernel control module and the command interface of wiping and read and write storage chip; The download and input of data order is provided; Realize the wiping of corresponding storage chip, programming and read operation by the software port of all types of storage chips.
3. storage chip programmable device according to claim 2 is characterized in that, described central processing module also comprises:
The port controlling unit provides the connectivity port that connects described all types of storage chip controller.
4. storage chip programmable device according to claim 3 is characterized in that, described storage chip programmable device also comprises the Universal base interface, and described port controlling unit connects described storage chip by described Universal base interface.
5. storage chip programmable device according to claim 4 is characterized in that, described Universal base interface is one or more in 48 stitch bases, 56 stitch bases and the SPI Flash base.
6. storage chip programmable device according to claim 3, it is characterized in that, described port controlling unit comprises one or more in cable interface, USB interface and the serial line interface, and described cable interface, USB interface and serial line interface are in order to this programmable device data writing.
7. storage chip programmable device according to claim 1, it is characterized in that described a plurality of dissimilar storage chip controllers comprise network interface card controller, I2C controller, USB controller, SPI controller, Nand Flash controller, Nor Flash controller and Uart controller.
8. storage chip programmable device according to claim 1, it is characterized in that described programmable device is supported one or more in JFFS2 file system, UBIFS file system, CramFS file system, RamFS file system, RomFS file system, YafFS2 file system and the SquashFS file system.
9. the setting of a storage chip programmable device and the method for storage chip being carried out programming Control is characterized in that described method may further comprise the steps:
(1) integrated a plurality of dissimilar storage chip controllers in the central processing module of described storage chip programmable device;
(2) described central processing module is connected to the software port of all types of storage chips;
(3) described storage chip programmable device by described software port to the storage chip of outside wipe, programming and read operation.
CN201210553347XA 2012-12-18 2012-12-18 Memory chip programmer, setting of memory chip programmer and method for carrying out programming control on memory chip Pending CN103021464A (en)

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Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN103997683A (en) * 2014-05-06 2014-08-20 四川长虹电器股份有限公司 System for using set-top-box platform to realize customizable Flash CD-ROM recorder and method thereof
CN108469963A (en) * 2018-03-28 2018-08-31 天津中德应用技术大学 The chip programmer of placement mechanism is adjusted in a kind of integrated size

Citations (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN2869988Y (en) * 2005-11-10 2007-02-14 北京兆维电子(集团)有限责任公司 Chip programming apparatus
CN101071647A (en) * 2006-05-04 2007-11-14 怀斯特尔技术有限公司 Flash programmer for programming nand flash and nor/nand combined flash
CN101281475A (en) * 2008-05-14 2008-10-08 北京泰得思达科技发展有限公司 Paralleling burning record system
US20090055562A1 (en) * 2007-08-22 2009-02-26 Takafumi Ito Semiconductor device with copyright protection function
CN101770817A (en) * 2010-01-18 2010-07-07 华东师范大学 Multi-interface memory verification system based on FPGA
CN102184741A (en) * 2011-02-28 2011-09-14 浪潮电子信息产业股份有限公司 Method for programming serial periphery interface (SPI) FLASH
CN102201267A (en) * 2010-03-26 2011-09-28 上海摩波彼克半导体有限公司 Platform system for realizing circuit verification of Nandflash flash memory controller based on FPGA (Field Programmable Gate Array) and method thereof

Patent Citations (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN2869988Y (en) * 2005-11-10 2007-02-14 北京兆维电子(集团)有限责任公司 Chip programming apparatus
CN101071647A (en) * 2006-05-04 2007-11-14 怀斯特尔技术有限公司 Flash programmer for programming nand flash and nor/nand combined flash
US20090055562A1 (en) * 2007-08-22 2009-02-26 Takafumi Ito Semiconductor device with copyright protection function
CN101281475A (en) * 2008-05-14 2008-10-08 北京泰得思达科技发展有限公司 Paralleling burning record system
CN101770817A (en) * 2010-01-18 2010-07-07 华东师范大学 Multi-interface memory verification system based on FPGA
CN102201267A (en) * 2010-03-26 2011-09-28 上海摩波彼克半导体有限公司 Platform system for realizing circuit verification of Nandflash flash memory controller based on FPGA (Field Programmable Gate Array) and method thereof
CN102184741A (en) * 2011-02-28 2011-09-14 浪潮电子信息产业股份有限公司 Method for programming serial periphery interface (SPI) FLASH

Non-Patent Citations (1)

* Cited by examiner, † Cited by third party
Title
钟慧敏: "基于FPGA的多接口存储器验证系统的设计与实现", 《中国优秀硕士学位论文全文数据库 信息科技辑》, no. 12, 15 December 2009 (2009-12-15), pages 137 - 28 *

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN103997683A (en) * 2014-05-06 2014-08-20 四川长虹电器股份有限公司 System for using set-top-box platform to realize customizable Flash CD-ROM recorder and method thereof
CN103997683B (en) * 2014-05-06 2017-03-22 四川长虹电器股份有限公司 System for using set-top-box platform to realize customizable Flash CD-ROM recorder and method thereof
CN108469963A (en) * 2018-03-28 2018-08-31 天津中德应用技术大学 The chip programmer of placement mechanism is adjusted in a kind of integrated size
CN108469963B (en) * 2018-03-28 2023-05-26 天津中德应用技术大学 Chip programmer integrating size-adjustable placement mechanism

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Application publication date: 20130403