CN102969364A - Top gate structure metallic oxide thin film transistor for improving device uniformity and manufacture method thereof - Google Patents
Top gate structure metallic oxide thin film transistor for improving device uniformity and manufacture method thereof Download PDFInfo
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Abstract
The invention discloses a top gate structure metallic oxide thin film transistor for improving device uniformity and a manufacture method thereof and relates to the field of thin film transistors. The thin film transistor comprises a substrate, an active layer auxiliary electrode, an active layer, an insulating layer, a grid electrode, a source electrode and a drain electrode, wherein the active layer auxiliary electrode is arranged on the substrate, the active layer is arranged on the active layer auxiliary electrode, the source electrode is arranged at one end of the upper side of the active layer, the drain electrode is arranged at the other end of the upper side of the active layer, the insulating layer is arranged on the middle portion of the upper side of the active layer, the grid electrode is arranged above the insulating layer, and the active layer is of a composite membrane layer structure or a mono membrane layer structure. When the active layer is of the composite membrane layer structure, an oxygen lacking type metallic oxide membrane layer and an oxygen enrichment type metallic oxide membrane layer are sequentially arranged from bottom to top, and when the active layer is of the mono membrane layer structure, a metallic oxide membrane layer is arranged. The top gate structure metallic oxide thin film transistor is specific to the active layer structure, reduces contact resistance through a method of increasing the active layer auxiliary electrode, and can effectively improve the uniformity of the thin film transistor due to the fact that the auxiliary electrode is manufactured below the active layer.
Description
Technical field
The present invention relates to field of thin film transistors, particularly relate to a kind of inhomogeneity top gate structure metal oxide thin-film transistor of device and preparation method thereof that improves.
Background technology
Metal oxide thin-film transistor is mainly used in the active driving of organic light emitting display, liquid crystal display and Electronic Paper, also can be used for integrated circuit.
In recent years, based on the thin-film transistor of metal oxide because its mobility is high, light transmission is good, membrane structure is stable, the making temperature is low and low cost and other advantages is subject to increasing attention.Particularly the oxide semiconductor TFT technology take In-Ga-Zn-O (IGZO) as representative can realize higher resolution with respect to a-Si TFT, then can improve yield, reduces cost and realize energy-saving with respect to LTPS TFT technology; In general, IGZO TFT technological synthesis superior performance has obtained a lot of breakthrough progress.
At present, though the development of IGZO technology has remarkable progress, but still the problems such as existence and stability, uniformity hinder its industrialization process.Many seminar of industrial circle and academia launch research for IGZO Film preparation technology, such as: people (the Thin Solid Films such as Takafumi Aoi, 2010,518 (11): 3004-3007) and people (the Acta Materialia such as Dong Kyu Seo, 2011,59:6743-6750) report adopts different plated film mode (DC or RF) preparation IZGO films; People (the Journal of Non-Crystalline Solids such as Hai Q. Chiang, 2008,354:2826-2830), people (the Thin Solid Films 2009 such as C.H. Jung, 517 (14): 4078 – 4081) and the people (Vacuum such as C.J. Chiu, 2011,86 (3): 246-249) then studied respectively the technology of preparing of IGZO from filming parameters such as sputtering pressure, partial pressure of oxygen, power; South China Science ﹠ Engineering University's group proposes to adopt transition zone and semiconductor layer to improve the technology (application number: 201010182715.5) of oxide TFT characteristic specially for bottom grating structure.Also have seminar to report the treatment technology that improves after the active layer preparation, such as: people (the Electrochemical and Solid-State Letters such as Seok-Jun Seo, 2010,13 (10): H357-H359), people (the Journal of Nanoscience and Nanotechnology such as Soyeon Park, 2011,11:6029-6033) and people (the Thin Solid Films such as Chur-Shyang Fuh, 2011,520 (5): 1489-1494) by changing temperature, atmosphere, the annealing conditions such as time are optimized improvement to the IGZO-TFT performance.In addition; the optimization of channel protective layer preparation and material is also very crucial; people (the Journal of Applied Physics such as Antonis Olziersky; 2010; 108; 064505) and the people such as Shou-En Liu (IEEE Electron Device Letters, 2011,32:161-163) production method and the material type by research raceway groove passivation layer.
To the research of IGZO oxide semiconductor TFT, most of device take bottom grating structure is as main.Now also there is report to adopt the top gate device can obtain better TFT characteristic; But, depositing insulating layer and electrode after the IGZO plated film, subsequent film manufacture craft need to make under vacuum or in the plasma atmosphere, and this can affect the microstructure of IGZO rete, for example crystal grain is too small or excessive, and the crystal habit structure is inhomogeneous, unreasonable between the grain boundary; Even generation defective, for example ion room.Therefore, for top gate structure, still existence and stability, homogeneity question.
Summary of the invention
One of purpose of the present invention is that the technical problem that will solve is to provide a kind of stability, uniformity good top gate structure metal oxide thin-film transistor for the uniformity of existing film transistor device with the stability deficiency.
Two of purpose of the present invention provides the transistorized manufacture method of said film.
Technical scheme of the present invention is as follows:
A kind of inhomogeneity top gate structure metal oxide thin-film transistor of device that improves, this thin-film transistor comprises substrate, active layer auxiliary electrode, active layer, insulating barrier, grid, source electrode and drain electrode; Wherein, the active layer auxiliary electrode is located on the substrate, and active layer is located on the active layer auxiliary electrode, source electrode is located at one of active layer upside end, the other end of active layer upside is located in drain electrode, and insulating barrier is located among the active layer upside, and grid is located on the insulating barrier; The active layer auxiliary electrode has two, all is located between substrate and the active layer and is connected with drain electrode with source electrode respectively; Active layer is composite film structure or individual layer film layer structure, when active layer is the composite film structure, is followed successively by from below to up oxygen deprivation type metal oxide rete, rich oxygen type metal oxide rete; When active layer is the individual layer film layer structure, be the metal oxide rete.
The aforesaid substrate material is a kind of in silicon chip, glass or the pottery.
Above-mentioned active layer auxiliary electrode can form with the glass of belt electrode layer, such as ito glass, or the metal electrode of making of sputtering method.
Above-mentioned active layer is the IGZO material, and IGZO is comprised of the English initial of indium, gallium, zinc and 4 symbols of element of oxygen; Described active layer adopts the sputtering method preparation, and uses same target in sputter procedure, and the material of target is (In
2O
3)
x(Ga
2O
3)
y(ZnO)
z, wherein 0≤x, y, z≤1, and x+y+z=1; In sputter procedure, select anaerobic or hypoxic atmosphere to obtain oxygen deprivation type metal oxide rete, select oxygen-enriched atmosphere to obtain rich oxygen type metal oxide rete.
Above-mentioned active layer is graphical with the form of perforate at source electrode and drain locations, and the active layer auxiliary electrode directly is connected with drain electrode with source electrode.
Above-mentioned insulating barrier is a kind of in insulating metal oxide, silica-based insulating material, the macromolecular material.
Above-mentioned silica-based insulating material is one or both composite materials in silicon dioxide, the insulating silicon nitride material.
The manufacture method of above-mentioned top gate structure metal oxide thin-film transistor may further comprise the steps (take ito substrate as example):
A, containing on the substrate of ITO, adopting the graphical ITO electrode of mask plate, forming the auxiliary electrode pattern of active layer;
On b, the substrate after forming auxiliary electrode, adopt sputtering method to make active layer, select anaerobic or hypoxic atmosphere to obtain oxygen deprivation type metal oxide rete, select oxygen-enriched atmosphere to obtain rich oxygen type metal oxide rete; Active layer made and graphical after, high annealing, 150 ℃～500 ℃ of annealing temperatures, annealing is carried out under atmosphere or oxygen-containing atmosphere;
C, at the active layer upside, adopt the method for sputter, chemical vapour deposition (CVD), spin coating or printing to make insulating barrier; And adopt photoetching or mask method to obtain the insulating barrier shape; After insulating barrier has been made, high annealing, 150 ℃～500 ℃ of annealing temperatures, annealing is carried out under atmosphere or oxygen-containing atmosphere;
D, make grid at insulating barrier by sputter or evaporation coating method, and adopt photoetching or mask method to obtain gate shapes;
E, at the grid upside, adopt the method for sputter, chemical vapour deposition (CVD), spin coating or printing to make passivation layer; And adopt photoetching or mask method to obtain the passivation layer shape;
F, after passivation layer pattern forms, continue to adopt the mask of passivation layer, the perforate of graphical active layer and source-drain electrode contact zone;
G, make source electrode at the source contact area upside of passivation layer by sputter or evaporation coating method, and adopt photoetching or mask method to obtain the source electrode shape; Drain contact region upside at passivation layer is made drain electrode by sputter or evaporation coating method, and adopts photoetching or mask method to obtain the shape that drains.
Annealing temperature after above-mentioned active layer has been made is 150 ℃～350 ℃, and the annealing temperature after described insulating barrier has been made is 150 ℃～350 ℃.
The electrode material of above-mentioned source electrode, drain and gate is one or more in the metal material of metal A l, Mo, Cu, Ti or other low-resistivities.
Beneficial effect of the present invention: the present invention is directed to the active layer structure, reduce contact resistance by the method that increases the active layer auxiliary electrode; Below active layer, make auxiliary electrode, but the uniformity of Effective Raise thin-film transistor; And in suitable technique, anneal, thereby obtain high performance top gate structure metal oxide thin-film transistor.
Description of drawings
Fig. 1 is metal oxide thin-film transistor structural representation of the present invention.
Fig. 2 is embodiment 1 output characteristic curve figure among the present invention.
Fig. 3 is embodiment 1 transfer characteristic curve figure among the present invention.
Fig. 4 is embodiment 2 output characteristic curve figure among the present invention.
Fig. 5 is embodiment 2 transfer characteristic curve figure among the present invention.
Fig. 6 is embodiment 3 output characteristic curve figure among the present invention.
Fig. 7 is embodiment 3 transfer characteristic curve figure among the present invention.
Embodiment
Below in conjunction with the drawings and specific embodiments invention being improved inhomogeneity top gate structure metal oxide thin-film transistor of device and preparation method thereof is described in further detail.
As shown in Figure 1, a kind of inhomogeneity this thin-film transistor of top gate structure metal oxide thin-film transistor of device that improves comprises substrate 1, active layer auxiliary electrode 2, active layer 3, insulating barrier 4, grid 5, source electrode and drain electrode 6; Wherein, active layer auxiliary electrode 2 is located on the substrate 1, and active layer 3 is located on the active layer auxiliary electrode 2, source electrode 6 is located at one of active layer 3 upsides end, the other end of active layer 3 upsides is located in drain electrode 6, and insulating barrier 4 is located among active layer 3 upsides, and grid 5 is located on the insulating barrier 4; Active layer auxiliary electrode 2 has two, all is located between substrate 1 and the active layer 3 and respectively with source electrode with drain and 6 be connected; Active layer 3 is composite film structure or individual layer film layer structure, when active layer is the composite film structure, be followed successively by from below to up oxygen deprivation type metal oxide rete 31, rich oxygen type metal oxide rete 32, when active layer 3 was the individual layer film layer structure, individual layer rete 3 was metal oxide.
Described insulating barrier 4 is insulating metal oxide or silica-based insulating material or macromolecular material.
Described active layer 3 adopts the sputtering method preparation, and uses same target in sputter procedure, and the material of target is (In
2O
3)
x(Ga
2O
3)
y(ZnO)
z, wherein 0≤x, y, z≤1, and x+y+z=1; In sputter procedure, select anaerobic or hypoxic atmosphere to obtain oxygen deprivation type metal oxide rete 31, select oxygen-enriched atmosphere to obtain rich oxygen type metal oxide rete 32.
Described substrate 1 material is silicon chip or glass or pottery; Glass substrate is preferably alkali-free glass substrate or is coated with the glass substrate of silica membrane.
In the metal material that described active layer auxiliary electrode 2 materials are metal A l, Mo, Cu, Ti or other low-resistivities one or more, here preferred ITO.
Described insulating barrier 4 is insulating metal oxide or silica-based insulating material or macromolecular material; Further, this silica-based insulating material is silicon dioxide or insulating silicon nitride material or the two composite material.
The above-mentioned manufacture method of improving the inhomogeneity top gate structure metal oxide thin-film transistor of device may further comprise the steps:
A, employing contain the substrate 1 of ITO electrode, and adopt photoetching or mask method to obtain the shape of active layer auxiliary electrode 2;
B, adopt sputtering methods to make active layers 3 at active layer auxiliary electrode 2, select anaerobic or hypoxic atmosphere to obtain oxygen deprivation type metal oxide rete 31, select oxygen-enriched atmosphere to obtain rich oxygen type metal oxide rete 32; Active layer made and graphical after, high annealing, 150 ℃～500 ℃ of annealing temperatures, annealing is carried out under atmosphere or oxygen-containing atmosphere;
C, at active layer 3 upsides, adopt the method for sputter, chemical vapour deposition (CVD), spin coating or printing to make insulating barrier 4; And adopt photoetching or mask method to obtain insulating barrier 4 shapes; After insulating barrier 4 has been made, high annealing, 150 ℃～500 ℃ of annealing temperatures, annealing is carried out under atmosphere or oxygen-containing atmosphere;
D, make grid 5 at insulating barrier 4 by sputter or evaporation coating method, and adopt photoetching or mask method to obtain grid 5 shapes.
E, at one of active layer 3 upsides ends, make source electrode 6 by sputter or evaporation coating method, and adopt photoetching or mask method to obtain source electrode 6 shapes; Make drain electrode 6 at the other end of active layer 3 upsides by sputter or evaporation coating method, and adopting photoetching or mask method 6 shapes that obtain draining;
Further, the annealing temperature after described active layer 3 has been made is preferably 150 ℃～350 ℃, and the annealing temperature after described insulating barrier 4 has been made is preferably 150 ℃～350 ℃.
The electrode material of described grid 5, source electrode and drain electrode 6 is one or more in the metal material of metal A l, Mo, Cu, Ti or other low-resistivities, here preferred Mo.
Embodiment 1
(1) on alkali-free glass, sputter 20nm oxygen-starved IGZO(one pack system Ar atmosphere is made), make of identical target sputter 5nm rich oxygen type IGZO(one pack system oxygen atmosphere again); Then wet etching, graphical IGZO;
(2) under dry oxygen ambient and 350 ℃ of temperature, annealed one hour;
(3) above compound active layer sputter 20nm silicon dioxide and 300nm silicon nitride as insulating barrier;
(4) under air and 200 ℃ of temperature, annealed one hour;
(5) sputter 100nm metal molybdenum is as gate electrode;
(6) sputter 100nm metal molybdenum is as source/drain electrode.
In addition, in this embodiment 1, output characteristic curve figure please refer to Fig. 2, and transfer characteristic curve figure please refer to Fig. 3.
In this implements, according to making thin-film transistor with the method for embodiment 1 and the similar method of condition and condition.Difference is to anneal one hour in (2) among the embodiment 1 under dry oxygen ambient and 300 ℃ of temperature.
In addition, in this embodiment 2, output characteristic curve figure please refer to Fig. 4, and transfer characteristic curve figure please refer to Fig. 5.
Embodiment 3
In this implements, according to making thin-film transistor with the method for embodiment 1 and the similar method of condition and condition.The step that difference is to increase and changes is as follows:
(1) on the alkali-free ito glass, wet etching, graphical ITO obtains the active layer auxiliary electrode;
(2) IGZO graphical after, annealing is one hour under dry oxygen ambient and 300 ℃ of temperature;
(3) in the graphical process of IGZO, active layer auxiliary electrical polar region is being arranged, IGZO carries out perforate.
In addition, in this embodiment 3, output characteristic curve figure please refer to Fig. 6, and transfer characteristic curve figure please refer to Fig. 7.
Table 1: the Character Comparison of each embodiment
As shown in Table 1, below active layer, make auxiliary electrode, but the uniformity of Effective Raise thin-film transistor; Improve yield of devices and can reach 100%; Improve the TFT characteristic: mobility can reach＞8 cm
2/ Vs, subthreshold swing obviously reduces, and on-off ratio reaches 10
9Annealing conditions after active layer graphical has a significant impact tft characteristics, and 350 ℃ of annealing can improve the mobility of thin-film transistor, reduce subthreshold swing, and the threshold voltage of device is to the forward skew obviously.Follow-uply can on the basis of embodiment 3, by process optimizations such as annealing conditions, realize better TFT characteristic.
Above content is the further description of the present invention being done in conjunction with concrete preferred implementation, can not assert that implementation of the present invention is confined to these explanations.For the general technical staff of the technical field of the invention, without departing from the inventive concept of the premise, its framework form can be flexible and changeable, can the subseries product.Just make some simple deduction or replace, all should be considered as belonging to the scope of patent protection that the present invention is determined by claims of submitting to.
Claims (10)
1. one kind is improved the inhomogeneity top gate structure metal oxide thin-film transistor of device, and it is characterized in that: this thin-film transistor comprises substrate, active layer auxiliary electrode, active layer, insulating barrier, grid, source electrode and drain electrode; Wherein, the active layer auxiliary electrode is located on the substrate, and active layer is located on the active layer auxiliary electrode, source electrode is located at one of active layer upside end, the other end of active layer upside is located in drain electrode, and insulating barrier is located among the active layer upside, and grid is located on the insulating barrier; The active layer auxiliary electrode has two, all is located between substrate and the active layer and is connected with drain electrode with source electrode respectively; Active layer is composite film structure or individual layer film layer structure, when active layer is the composite film structure, is followed successively by from below to up oxygen deprivation type metal oxide rete, rich oxygen type metal oxide rete; When active layer is the individual layer film layer structure, be the metal oxide rete.
2. top gate structure metal oxide thin-film transistor according to claim 1 is characterized in that: described baseplate material is a kind of in silicon chip, glass or the pottery.
3. top gate structure metal oxide thin-film transistor according to claim 1 is characterized in that: described active layer auxiliary electrode can form with the glass of belt electrode layer, such as ito glass, or the metal electrode of making of sputtering method.
4. top gate structure metal oxide thin-film transistor according to claim 1, it is characterized in that: described active layer is the IGZO material, IGZO is comprised of the English initial of indium, gallium, zinc and 4 symbols of element of oxygen; Described active layer adopts the sputtering method preparation, and uses same target in sputter procedure, and the material of target is (In
2O
3)
x(Ga
2O
3)
y(ZnO)
z, wherein 0≤x, y, z≤1, and x+y+z=1; In sputter procedure, select anaerobic or hypoxic atmosphere to obtain oxygen deprivation type metal oxide rete, select oxygen-enriched atmosphere to obtain rich oxygen type metal oxide rete.
5. top gate structure metal oxide thin-film transistor according to claim 1 is characterized in that: described active layer is graphical with the form of perforate at source electrode and drain locations, and the active layer auxiliary electrode directly is connected with draining with source electrode.
6. top gate structure metal oxide thin-film transistor according to claim 1 is characterized in that: described insulating barrier is a kind of in insulating metal oxide, silica-based insulating material, the macromolecular material.
7. top gate structure metal oxide thin-film transistor according to claim 6, it is characterized in that: described silica-based insulating material is one or both composite materials in silicon dioxide, the insulating silicon nitride material.
8. the manufacture method of the described top gate structure metal oxide thin-film transistor of claim 1 is characterized in that: may further comprise the steps (take ito substrate as example):
A, containing on the substrate of ITO, adopting the graphical ITO electrode of mask plate, forming the auxiliary electrode pattern of active layer;
On b, the substrate after forming auxiliary electrode, adopt sputtering method to make active layer, select anaerobic or hypoxic atmosphere to obtain oxygen deprivation type metal oxide rete, select oxygen-enriched atmosphere to obtain rich oxygen type metal oxide rete; Active layer made and graphical after, high annealing, 150 ℃～500 ℃ of annealing temperatures, annealing is carried out under atmosphere or oxygen-containing atmosphere;
C, at the active layer upside, adopt the method for sputter, chemical vapour deposition (CVD), spin coating or printing to make insulating barrier; And adopt photoetching or mask method to obtain the insulating barrier shape; After insulating barrier has been made, high annealing, 150 ℃～500 ℃ of annealing temperatures, annealing is carried out under atmosphere or oxygen-containing atmosphere;
D, make grid at insulating barrier by sputter or evaporation coating method, and adopt photoetching or mask method to obtain gate shapes;
E, at the grid upside, adopt the method for sputter, chemical vapour deposition (CVD), spin coating or printing to make passivation layer; And adopt photoetching or mask method to obtain the passivation layer shape;
F, after passivation layer pattern forms, continue to adopt the mask of passivation layer, the perforate of graphical active layer and source-drain electrode contact zone;
G, make source electrode at the source contact area upside of passivation layer by sputter or evaporation coating method, and adopt photoetching or mask method to obtain the source electrode shape; Drain contact region upside at passivation layer is made drain electrode by sputter or evaporation coating method, and adopts photoetching or mask method to obtain the shape that drains.
9. the manufacture method of described top gate structure metal oxide thin-film transistor according to claim 8, it is characterized in that: the annealing temperature after described active layer has been made is 150 ℃～350 ℃, the annealing temperature after described insulating barrier has been made is 150 ℃～350 ℃.
10. it is characterized in that according to claim 8 or the manufacture method of 9 described top gate structure metal oxide thin-film transistors: the electrode material of described source electrode, drain and gate is one or more in the metal material of metal A l, Mo, Cu, Ti or other low-resistivities.
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| CN103715269A (en) * | 2013-12-31 | 2014-04-09 | 京东方科技集团股份有限公司 | Thin film transistor, array substrate and display device |
| WO2017133145A1 (en) * | 2016-02-05 | 2017-08-10 | 深圳市华星光电技术有限公司 | Metal-oxide thin film transistor and method for manufacture thereof |
| CN110034177A (en) * | 2019-04-24 | 2019-07-19 | 深圳扑浪创新科技有限公司 | A kind of photoelectricity laminated film and application thereof |
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| CN102683423A (en) * | 2012-05-08 | 2012-09-19 | 东莞彩显有机发光科技有限公司 | Metal oxide thin film transistor with top gate structure and manufacturing method thereof |
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| CN101582453A (en) * | 2008-05-15 | 2009-11-18 | 三星电子株式会社 | Transistor, semiconductor device and method of manufacturing the same |
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| CN103715269A (en) * | 2013-12-31 | 2014-04-09 | 京东方科技集团股份有限公司 | Thin film transistor, array substrate and display device |
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