CN102955083A

CN102955083A - Interference resistance test method and device for power-on resetting circuit of central processing unit (CPU) chip

Info

Publication number: CN102955083A
Application number: CN2011102556066A
Authority: CN
Inventors: 杨利华
Original assignee: Beijing CEC Huada Electronic Design Co Ltd
Current assignee: Beijing CEC Huada Electronic Design Co Ltd
Priority date: 2011-08-31
Filing date: 2011-08-31
Publication date: 2013-03-06
Anticipated expiration: 2031-08-31

Abstract

The invention provides an interference resistance test method and device for a power-on resetting circuit of a central processing unit (CPU) chip. When a tested chip cyclically does thermal resetting action, an interference pulse wave of which the voltage abnormally drops off, the power is transiently low, and the power-on waveform is abnormal is applied to a VCC (Voltage To Current Converter) power supply of the chip; and after a period of time of interference, the interference resistance of the power-on resetting circuit of the chip can be determined by detecting data of a CPU run-fly mark of the chip.

Description

A kind of cpu chip electrify restoration circuit vulnerability to jamming method of testing and device

Technical field

The present invention relates to the vulnerability to jamming method of testing of cpu chip electrify restoration circuit and the implementation method of countermeasure set.

Background technology

The purpose of design of cpu chip electrify restoration circuit POR is: when power supply is just opened, the logic output of electrify restoration circuit POR is locked in the attitude that resets with CPU, behind the correct loading of time-delay waiting system power supply and clock stable and internal register, discharge again the RST signal by the CPU executive routine.For this reason, electrify restoration circuit POR need to consider suitable time delay, suitable POR threshold level and suitable level precision.Time delay is inadequate, may just begin CPU and moved voltage and clock are all stable, easily causes CPU to run and flies, and POR threshold level and threshold level precision be improper also can easily to be caused same CPU to run to fly phenomenon.

Whether the precision of design time-delay, threshold level and this level that how to detect electrify restoration circuit POR is suitable, is not easy to make CPU to enter mix, needs a kind of method of testing to estimate the resultant effect of electrify restoration circuit POR.

Summary of the invention

The electrify restoration circuit vulnerability to jamming method of testing that the present invention proposes is: when chip loops the hot reset action, the VCC power supply of chip is applied that a kind of electric voltage exception falls, instantaneous low electricity, unusually goes up the disturbing pulse ripple of electrical waveform, after disturbing a period of time, run Darts will data by detection chip CPU, judge the jamproof ability of chip power-on reset circuit.

Implement the software and hardware of method of testing of the present invention, comprise the waveshape generating device that unusually powers on, chip under test, with the upper equipment of chip communication.

Unusually the waveshape generating device that powers on produce to disturb the random disturbance pulsating wave of electrification reset action, and single undesired signal is made of three sections waveforms: fall unusually that district, instantaneous low electricity distinguish, district unusually slowly powers on.

Unusually the principle of waveshape generating device of powering on is: at VCC voltage and GND end, a mechanical hook-up that frequently makes VCC and the instantaneous short circuit of GND is set, produce thus random unusually fall, instantaneous low electricity, the interference waveform that unusually powers on.

This logical design is arranged: when carrying out the electrification reset action, fly if there is race, then count at specific numeration sign in the house dog program of chip under test.

Base process of test is: the waveshape generating device that will unusually power on produces falls unusually, instantaneous low electricity, the undesired signal that unusually goes up electrical waveform are received on the VCC and GND of chip under test, with CLK, the I-O of chip under test, CLK, I-O, the GND that GND connects respectively upper equipment, making chip under test not stop cycling hot resets, after test a period of time, the race of reading chip under test flies specific numeration flag data, just can obtain the number of times that the unusual race of electrification reset flies in the unit interval, and then obtain the jamproof ability of chip under test electrify restoration circuit.

Description of drawings

Fig. 1 is for after the waveshape generating device that unusually powers on powers up, the schematic diagram when direct current generator drives pointer and moves to baffle plate

Fig. 2 is the schematic diagram of direct current generator when driving pointer and touching baffle plate

Fig. 3 is after direct current generator driving pointer touches baffle plate, the schematic diagram that pointer is return

Fig. 4 is the schematic diagram of direct current generator when driving pointer and again moving to baffle plate

Fig. 5 is that electric voltage exception falls, instantaneous low electricity, unusually go up the electrical waveform schematic diagram

Fig. 6 is that the shake waveform schematic diagram that electric voltage exception falls is

The instantaneous low electrical schematic of Fig. 7

Fig. 8 is unusual upper electrical waveform schematic diagram

Fig. 9 is electrification reset disturbing pulse waveform schematic diagram

Figure 10 is that electrification reset disturbs the line schematic diagram

Embodiment

As shown in Figure 1, unusually the interference waveform production process of waveshape generating device of powering on is: the direct supply with tested smart card drives direct current generator 1, pointer 2 is installed on the wheel of direct current generator 1, pointer 2 meets VCC, connect stationary installation behind the spring 4 on the pointer 2, in the place ahead of pointer 2, a baffle plate 5 is arranged, baffle plate 5 meets GND.When power drives direct current generator 1 rotates, the pulling force that pointer 2 can overcome spring 4 rotates until touch baffle plate 5, because pointer 2 is connected with VCC, baffle plate 5 is connected with GND, when pointer 2 is run into baffle plate 5, can produce instantaneous short circuit phenomenon, simultaneously, the driving power voltage of direct current generator 1 also can instantaneously drag down, so the instantaneous driving force of direct current generator that makes weakens, pointer 2 is return under the pulling force effect of spring 4, thereby when pointer 2 left baffle plate 5, it is normal that the driving power voltage of direct current generator 1 recovers, driving direct current generator 1 this moment rotates again, realize the repeatedly process of instantaneous short circuit of VCC and GND, as VCC and GND repeatedly in the process of instantaneous short circuit, can produce unusually falling at random as shown in Figure 5, instantaneous low electricity, unusually the interference waveform that powers on.

As shown in Figure 6, producing voltage when instantaneous dragging down, to fall waveform be not a process of falling continuously, produces unusual burr waveform at random in the process of falling.

As shown in Figure 7, the instantaneous low electrical waveform that produces after instantaneous dragging down is an instantaneous process that keeps pulse low pressure burr.

As shown in Figure 8, behind the instantaneous process that keeps pulse low pressure burr, when leaving baffle plate 5 owing to pointer 2, it is normal that the driving power voltage of direct current generator 1 recovers, the process that recovery powers on is not a process that raises continuously, and the process of randomized jitter waveform and burr waveform is arranged in the process that raises.

The production process of electrical waveform disturbing pulse ripple is as follows on the continuous abnormal:

As shown in Figure 1, direct current generator 1 power supply of the waveshape generating device that unusually powers on is not as powering up, and this moment, pointer 2 was motionless, in case power up, then direct current generator 1 drives pointer 2 along arrow points diversion baffle 5.

As shown in Figure 2, when pointer 2 touches baffle plate 5, because pointer 2 meets VCC, baffle plate 5 meets GND, and this moment is because transient earthing can make direct current generator 1 power supply drag down.

As shown in Figure 3, after dc motor power voltage was dragged down, the instantaneous driving force of direct current generator that makes weakened immediately, and pointer 2 will be toward rollback under the pulling force effect of spring 4.

As shown in Figure 4, behind pointer 2 rollbacks, separate with baffle plate 5, direct current generator 1 power up normal voltage, this moment, direct current generator 1 drove pointer 2 again along arrow points diversion baffle 5.

As long as power up to direct current generator, above process will constantly repeat, the impulse disturbances waveform that produce unusually falling at random continuously as shown in Figure 9, instantaneous low electricity, unusually powers on.

Following embodiment according to intelligent card chip comes method of testing of the present invention is specifically described.

Intelligent card chip electrification reset vulnerability to jamming test macro, as shown in figure 10, comprise that the electric voltage exception that countermeasure set produces falls, instantaneous low electricity, the upper equipment unusually going up electrical waveform 3, tested smart card 2 and consisted of by APDU instruction testing software 1, PC 4, smart card reader 5.

APDU instruction testing software 1 is the upper computer software that card is carried out warm reset, is installed in the PC 4.Smart card reader 5 is connected with PC 4, by the communication between APDU instruction testing software administration smart card reader 5 and the tested smart card 2.

The tested smart card 2 inner card operating systems of downloading are test COS, the COS that test COS adopts smart card product to use, wherein design logic comprises the card electrification reset and runs and to fly monitoring code, the card electrification reset runs and flies the realization of monitoring function use house dog program, real-time inspection COS implementation status, the normal execution counted when powering on, and flies in case the CPU race occurs, also race flown counting.

The anti-interference base process of test of electrify restoration circuit is:

As shown in figure 10, with unusually falling of producing of the waveshape generating device that unusually powers on, instantaneous low electricity, unusually go up electric pulse 3 and receive on the VCC and GND of tested smart card 2, CLK, I-O, the GND of smart card reader 5 met CLK, I-O, the GND of tested smart card 2, open the APDU instruction testing software 1 on the PC 4.Make smart card reader 5 not stop cycling hot and reset, and calculate and disturb the start time.

When appearring in the test instruction sequence, continuous reset answer reports an error, can return data but can partly reply, at this moment, continue to disturb.

Return phenomenon when the continuous countless certificates of reset answer appear in the test instruction sequence, at this moment, stop to disturb the record end of interrupt time.Read normally power on enumeration data and CPU in the COS house dog program and run and fly enumeration data, just can obtain the number of times that the unusual race of electrification reset flies in the unit interval, and then obtain the jamproof ability of tested intelligent card chip CPU electrify restoration circuit.

Claims

1. method that the chip power-on reset circuit antijamming capability is tested is characterized in that:

Loop hot reset when action at chip, the power supply of chip applied the disturbing pulse ripple, disturb a period of time after, run Darts will data by detection chip CPU, judge the jamproof ability of chip power-on reset circuit.

2. the method for claim 1 is characterized in that making by employing the mode of VCC and the instantaneous short circuit of GND producing random disturbing pulse ripple.

3. device that the chip power-on reset circuit antijamming capability is tested is characterized in that: comprise the waveshape generating device that unusually powers on, chip under test, with the upper equipment of chip communication; Wherein:

Unusually the waveshape generating device that powers on produces the random disturbance pulsating wave that disturbs the electrification reset action, unusually the random disturbance pulse wave signal that the waveshape generating device that powers on produces is received on the VCC and GND of chip under test, CLK, I-O, the GND of chip under test connected respectively and CLK, I-O, the GND of the upper equipment of chip communication, making chip under test not stop cycling hot resets, when carrying out the electrification reset action, fly if there is race, chip under test is counted; After test a period of time, the race of reading chip under test flies enumeration data, obtains the number of times that the unusual race of electrification reset flies in a period of time, and then obtains the jamproof ability of chip under test electrify restoration circuit.

4. device as claimed in claim 3, it is characterized in that: the described waveshape generating device that unusually powers on comprises direct current generator, pointer, spring, baffle plate, wherein:

Direct supply with chip under test drives direct current generator, on the wheel of direct current generator pointer is installed, and pointer meets the VCC of chip under test, and the spring on the pointer connects stationary installation, and the place ahead at pointer arranges baffle plate, and baffle plate meets GND;

When the power drives direct current generator rotates, the pulling force that pointer overcomes spring rotates until touch baffle plate, because pointer is connected with VCC, baffle plate is connected with GND, when pointer is run into baffle plate, can produce instantaneous short circuit phenomenon, simultaneously, the driving power voltage of direct current generator also can instantaneously drag down, and pointer is return under the pulling force effect of spring, when thereby pointer leaves baffle plate, it is normal that the driving power voltage of direct current generator recovers, and drive direct current generator again and rotate this moment, realizes the repeatedly process of instantaneous short circuit of VCC and GND, repeatedly in the process of instantaneous short circuit, produce random interference waveform at VCC and GND.